专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 外观设计

USD635434S1 Fitting hinge 有权
公开(公告)号：USD635434S1
公开(公告)日：2011-04-05
申请号：US29347677
申请日：2010-04-09
申请人： Kazuyoshi Oshima
设计人： Kazuyoshi Oshima

92. 外观设计

USD632540S1 Fitting hinge 有权
标题翻译：配件铰链
公开(公告)号：USD632540S1
公开(公告)日：2011-02-15
申请号：US29347680
申请日：2010-04-09
申请人： Kazuyoshi Oshima
设计人： Kazuyoshi Oshima

93. 发明授权

US07484271B2 Device case opening/closing device, and 2-axis hinge device 失效
标题翻译：装置壳体开/关装置，以及2轴铰链装置
公开(公告)号：US07484271B2
公开(公告)日：2009-02-03
申请号：US10551623
申请日：2004-04-02
申请人： Kazuyoshi Oshima , Kenji Tomizawa , Manabu Hasegawa
发明人： Kazuyoshi Oshima , Kenji Tomizawa , Manabu Hasegawa
IPC分类号： E05D3/06
CPC分类号： H04M1/022 , E05D3/12 , E05D11/1078 , E05Y2900/606 , Y10T16/540255 , Y10T16/547
摘要： A first abutment surface 24 for restricting an initial position of a hinge main body 5, and a second abutment surface 25 for restricting a terminal position of the hinge main body 5 are formed on the transmission case 2. A third abutment surface 34 for restricting an intermediate position of a reception case 3 is formed on the reception case 3. Between the transmission case 2 and the hinge main body 5, there are provided a first turn biasing means (not shown) adapted to turn bias the hinge main body 5 to the initial position, and a second turn biasing means (not shown) adapted to turn bias the hinge main body 5 to the terminal position. Between the reception case 3 and the hinge main body 5, there are provided a third turn biasing means (not shown) adapted to turn bias the reception case 3 to a folded position, and a fourth turn biasing means (not shown) adapted to turn bias the reception case 3 to a transmission position. The turn biasing force of the first turn biasing means is larger than that of the third turn biasing means. The turn biasing force of the fourth turn biasing means is larger than that of the second turn biasing means.
摘要翻译：用于限制铰链主体5的初始位置的第一邻接表面24和用于限制铰链主体5的终端位置的第二邻接表面25形成在变速箱2上。第三抵接表面34用于限制接收盒3的中间位置形成在接收盒3上。在变速器壳体2和铰链主体5之间设置有第一转弯偏置装置（未示出），其适于将铰链主体5偏压到初始位置和适于将铰链主体5偏置到终端位置的第二转弯偏置装置（未示出）。在接收盒3和铰链主体5之间设置有适于将接收盒3偏压到折叠位置的第三转弯偏置装置（未示出）和适于转动的第四转弯偏置装置（未示出）将接收盒3偏置到传送位置。第一转弯偏置装置的转动偏置力大于第三转弯偏置装置的转动偏置力。第四转弯偏置装置的转动偏置力大于第二转弯偏置装置的转动偏置力。

94. 发明授权

US06789292B2 Hinge assembly 失效
标题翻译：铰链总成
公开(公告)号：US06789292B2
公开(公告)日：2004-09-14
申请号：US10311102
申请日：2002-12-12
申请人： Kazuyoshi Oshima , Katsuya Imai
发明人： Kazuyoshi Oshima , Katsuya Imai
IPC分类号： E05F108
CPC分类号： H04M1/0216 , E05D11/1007 , E05D11/1078 , E05F1/1215 , E05F1/14 , E05Y2900/606 , G06F1/1616 , G06F1/1679 , G06F1/1681 , Y10T16/53828 , Y10T16/5385 , Y10T16/54024 , Y10T16/540255
摘要： A hinge assembly for switching a closed position and an open position of two articles by engagement between a first hinge member which is disposed at one of the two articles such that the first hinge member is non-turnable and non-movable in the axial direction and a second hinge member which is disposed at the other article such that the second hinge member is non-turnable but movable in the axial direction, wherein the locking mechanism comprises a plurality of engagement members disposed between the first hinge member and the second hinge member in such a manner as to be away from each other in the circumferential direction, biasing means for pressing the engagement member against the first hinge member, a guide portion for connecting the engagement members, which are disposed at the first hinge member, such that the engagement members are movable only in the radial direction, and a locking portion, which is disposed at the second hinge member, being raised towards the first hinge member and varied in height along the radial direction, the engagement members being locked by a high part of said locking portion, thereby maintaining the first and second hinge members in the closed position, and wherein movement means moves the engagement members from a high side towards a low side of the locking portion in accordance with movement of the control member, which is externally controlled, from the first position towards the second position side, and the first hinge member is turned to the open position by turning force of the biasing means.
摘要翻译：一种铰链组件，用于通过设置在所述两个物品中的一个物体上的第一铰链构件与所述第一铰链构件在所述轴向方向上不可转动且不可移动的接合来切换两个物品的关闭位置和打开位置，以及第二铰链构件，其设置在另一个物品处，使得第二铰链构件不可转动但可在轴向方向上移动，其中锁定机构包括多个接合构件，该接合构件设置在第一铰链构件和第二铰链构件之间，这种在圆周方向上彼此远离的方式，用于将接合构件压靠在第一铰链构件上的偏置装置，用于连接配合在第一铰链构件上的接合构件的引导部分，构件只能在径向方向上移动，并且设置在第二铰链构件处的锁定部分朝向第一铰链m 并且所述接合构件被所述锁定部分的高部分锁定，从而将所述第一和第二铰链构件保持在关闭位置，并且其中移动装置将所述接合构件从高侧朝向根据从外部控制的控制构件的移动，锁定部分的低侧从第一位置朝向第二位置侧，并且第一铰链构件通过偏置装置的转动力而转动到打开位置。

95. 发明授权

US06634033B2 Rotating damper 有权
标题翻译：旋转阻尼器
公开(公告)号：US06634033B2
公开(公告)日：2003-10-21
申请号：US10182416
申请日：2002-07-29
申请人： Tsuyoshi Mizuno , Kazuyoshi Oshima , Youjirou Nakayama
发明人： Tsuyoshi Mizuno , Kazuyoshi Oshima , Youjirou Nakayama
IPC分类号： A47K1304
CPC分类号： F16F9/516 , F16F9/14 , F16F9/145 , F16F9/19 , F16F9/3221 , F16F2230/0064
摘要： A cam member 5 is disposed within a first chamber R1 such that the cam member 5 is rotatable but non-movable in the axial direction. The cam member 5 is non-rotatably connected to a rotor 3 through a connection shaft portion 52 piercing into a piston 4. A second cam mechanism 10 is disposed between the cam member 5 and the piston 4. When the cam mechanism 7 causes the piston 4 to move from the second chamber R2 side to the first chamber R1 side in accordance with rotation of the rotor 3 in one direction, the second cam mechanism 10 allows the piston 4 to move from the second chamber R2 side to the first chamber R1 side by the same amount of movement. When the second cam mechanism 10 causes the piston 4 to move from the first chamber R1 side to the second chamber R2 side in accordance with rotation of the rotor 3 in the other direction, the cam mechanism 7 allows the piston 4 to move from the first chamber R1 side to the second chamber R2 side by the same amount of movement.
摘要翻译：凸轮构件5设置在第一室R1内，使得凸轮构件5可旋转但在轴向方向上不可移动。凸轮构件5通过穿入活塞4的连接轴部52不可旋转地连接到转子3.第二凸轮机构10设置在凸轮构件5和活塞4之间。当凸轮机构7使活塞 4根据转子3沿一个方向的旋转，从第二室R2侧移动到第一室R1侧，第二凸轮机构10使活塞4从第二室R2侧移动到第一室R1侧通过相同的运动量。当第二凸轮机构10根据转子3沿另一方向的旋转使活塞4从第一室R1侧移动到第二室R2侧时，凸轮机构7使活塞4从第一室R1移动到第二室R2侧。室R1侧到第二室R2侧移动相同量的运动。

96. 发明授权

US06588063B2 Hinge assembly 失效
标题翻译：铰链总成
公开(公告)号：US06588063B2
公开(公告)日：2003-07-08
申请号：US09979896
申请日：2001-11-28
申请人： Kazuyoshi Oshima , Katsuya Imai
发明人： Kazuyoshi Oshima , Katsuya Imai
IPC分类号： E05C1764
CPC分类号： G06F1/1681 , E05D11/105 , E05Y2900/606 , G06F1/1616 , G06F1/1679 , H04M1/0216 , Y10T16/54038
摘要： A cam portion 5 is composed of a first to fifth arcuate surfaces 51 to 55. The first arcuate surface 51 is arranged such that when a cover member C of a cellular telephone is located in a neutral position, a plate spring portion 22 contacts a crossing portion 56 where the first arcuate surface 51 crosses an orthogonal line Lp passing through a center of curvature of the first arcuate surface 51 and orthogonal to a rotation axis L. A second and a third arcuate surface 52, 53 are arranged on both sides of the first arcuate surface 51. Radii of curvature of the second and third arcuate surfaces are set to be larger than a radius of curvature of the fist arcuate surface 51.
摘要翻译：凸轮部分5由第一至第五弧形表面51至55组成。第一弧形表面51被布置成使得当蜂窝电话的盖构件C位于中立位置时，板簧部分22接触交叉第一弧形表面51与穿过第一弧形表面51的曲率中心并且与旋转轴线L正交的正交线Lp交叉。第二和第三弓形表面52,53布置在第一弧形表面51.第二和第三弧形表面的曲率半径被设定为大于第一弧形表面51的曲率半径。

97. 发明授权

US5808944A Semiconductor memory device having a defect relief arrangement 失效
标题翻译：具有缺陷排除装置的半导体存储器件
公开(公告)号：US5808944A
公开(公告)日：1998-09-15
申请号：US797654
申请日：1997-01-31
申请人： Takayuki Yoshitake , Kazuyoshi Oshima , Kazuyuki Miyazawa , Toshihiro Tanaka , Yasuhiro Nakamura , Shigeru Tanaka , Atsushi Ohba
发明人： Takayuki Yoshitake , Kazuyoshi Oshima , Kazuyuki Miyazawa , Toshihiro Tanaka , Yasuhiro Nakamura , Shigeru Tanaka , Atsushi Ohba
IPC分类号： G11C17/00 , G11C16/06 , G11C29/00 , G11C29/04 , G11C7/00
CPC分类号： G11C29/80
摘要： In a semiconductor storage device wherein data lines connected to a plurality of memory cells selected by a select operation of word lines are sequentially selected by using an address signal generated by an address counter to serially read data in individual unit of at least one word line: redundancy data lines disposed perpendicular to the word lines are provided; a column select circuit receiving a Y address signal selects one of the data lines or redundancy data lines; a redundancy memory circuit stores, in the order of the selection operation by the column select circuit, a defect address signal of a defect data line among the data lines and a redundancy address signal of a corresponding redundancy data line; an address comparator circuit compares one defect address signal read from the redundancy memory circuit with an address signal generated by the address counter; an address signal for the redundancy memory circuit is generated by performing a count operation in response to a coincidence signal generated by the address comparator circuit; and the address signal generated by the address counter is replaced by a redundancy address signal read in response to the coincidence signal from the redundancy memory circuit and used as the Y address signal. Accordingly, a redundancy circuit of simple configuration can be obtained because only a single address comparator circuit is used.
摘要翻译：在半导体存储装置中，通过使用地址计数器生成的地址信号来顺序地选择连接到通过字线的选择操作选择的多个存储单元的数据线，以至少一个字线的单独串行读取数据：提供与字线垂直设置的冗余数据线; 接收Y地址信号的列选择电路选择数据线或冗余数据线之一; 冗余存储电路按照列选择电路的选择操作的顺序存储数据线之间的缺陷数据线的缺陷地址信号和对应的冗余数据线的冗余地址信号; 地址比较器电路将从冗余存储器电路读取的一个缺陷地址信号与由地址计数器产生的地址信号进行比较; 通过响应于由地址比较器电路产生的一致信号执行计数操作来产生用于冗余存储器电路的地址信号; 并且由地址计数器产生的地址信号被响应于来自冗余存储器电路的符合信号读取并用作Y地址信号的冗余地址信号所替代。因此，由于仅使用单个地址比较器电路，所以可以获得简单配置的冗余电路。

98. 发明授权

US5459684A Dynamic RAM, dynamic RAM plate voltage setting method, and information processing system 失效
标题翻译：动态RAM，动态RAM板电压设定方法和信息处理系统
公开(公告)号：US5459684A
公开(公告)日：1995-10-17
申请号：US197768
申请日：1994-02-16
申请人： Masayuki Nakamura , Tetsuro Matsumoto , Kazuyoshi Oshima
发明人： Masayuki Nakamura , Tetsuro Matsumoto , Kazuyoshi Oshima
IPC分类号： G11C11/404 , G11C11/407 , G11C11/4074 , G11C7/00 , G11C11/40
CPC分类号： G11C11/4074
摘要： A dynamic RAM enhanced in integration and storage capacity, a method of setting a plate voltage of the dynamic RAM, and an information processing system reduced in size and enhanced in performance are provided. The plate voltage is set such that a leakage current of an information storage capacitor when a bit line voltage is positive relative to the plate voltage is made substantially equal to a leakage current of the capacitor when the bit line voltage is negative relative to the plate voltage. For this plate voltage setting, a plate voltage generating circuit is provided with an output voltage adjusting capability. A monitoring capacitor is formed on the same semiconductor wafer on which the information storage capacitor is formed. This monitoring capacitor is formed by a same method by which the information storage capacitor is formed, and is made of a same material of which the information storage capacitor is made. The monitoring capacitor is tested in a wafer probing process. Based on a measurement result, the plate voltage is set to an optimum level. The information processing system is constituted with the dynamic RAM as its memory device having the optimum plate voltage.
摘要翻译：提供集成和存储容量增强的动态RAM，设置动态RAM的板电压的方法以及尺寸减小和性能提高的信息处理系统。板电压被设定为当位线电压相对于板电压为正时，信息存储电容器的漏电流基本上等于当位线电压相对于板电压为负时电容器的漏电流。对于该板电压设定，板电压发生电路具有输出电压调整能力。在形成信息存储电容器的同一半导体晶片上形成监视电容器。该监视电容器由形成信息存储电容器的相同方法形成，并且由与信息存储电容器相同的材料制成。监测电容器在晶圆探测过程中进行测试。基于测量结果，将板电压设置为最佳水平。该信息处理系统由动态RAM作为具有最佳板电压的存储器件构成。

99. 发明授权

US5426603A Dynamic RAM and information processing system using the same 失效
标题翻译：动态RAM和信息处理系统使用相同
公开(公告)号：US5426603A
公开(公告)日：1995-06-20
申请号：US186460
申请日：1994-01-25
申请人： Masayuki Nakamura , Takayuki Kawahara , Kazuhiko Kajigaya , Kazuyoshi Oshima , Tsugio Takahashi , Hiroshi Otori , Tetsuro Matsumoto
发明人： Masayuki Nakamura , Takayuki Kawahara , Kazuhiko Kajigaya , Kazuyoshi Oshima , Tsugio Takahashi , Hiroshi Otori , Tetsuro Matsumoto
IPC分类号： G11C11/4091 , G11C11/4097 , G11C11/24
CPC分类号： G11C11/4097 , G11C11/4091
摘要： A dynamic RAM is provided using a sense amplifier compensating for the disparities of characteristics for paired MOSFET's. With this arrangement parasitic capacitance of the bit lines can be increased to be at least 20 times the capacitance of the memory cells. Each bit line is bisected by a switch MOSFET and is disconnected thereby as needed. A plurality of sets of memory arrays are furnished, each including a switch MOSFET for interconnecting common source lines to which the sense amplifier is connected. This permits recycling of the charges of the common source lines.
摘要翻译：使用读出放大器提供动态RAM来补偿成对MOSFET的特性差异。利用这种布置，位线的寄生电容可以增加到存储器单元的电容的至少20倍。每个位线由开关MOSFET二等分，并根据需要断开。提供了多组存储器阵列，每组存储器阵列包括用于互连连接读出放大器的公共源极线的开关MOSFET。这允许回收公共源线的电荷。

100. 发明授权

US5426326A Semiconductor device including arrangement for reducing junction degradation 失效
标题翻译：半导体器件包括用于减少结退化的装置
公开(公告)号：US5426326A
公开(公告)日：1995-06-20
申请号：US103206
申请日：1993-08-09
申请人： Kiyonori Ohyu , Kozo Watanabe , Osamu Tsuchiya , Kazuyoshi Oshima , Yoshifumi Kawamoto , Atsushi Hiraiwa , Takashi Nishida
发明人： Kiyonori Ohyu , Kozo Watanabe , Osamu Tsuchiya , Kazuyoshi Oshima , Yoshifumi Kawamoto , Atsushi Hiraiwa , Takashi Nishida
IPC分类号： H01L27/10 , H01L29/08 , H01L29/36 , H01L29/78 , H01L29/165
CPC分类号： H01L29/0847 , H01L29/08 , H01L29/36
摘要： An arrangement is provided to decrease the junction degradation caused by the leakage current at a p-n junction in semiconductor devices. This arrangement can be useful for a variety of devices, and is especially effective for reducing junction degradation at the source or drain region of a MOSFET. To achieve such a reduction, a p-n junction layer is provided at a p-n junction of a semiconductor region and a substrate. Carrier concentration distributions of a p-type layer and an n-type layer of the p-n junction layer are set so that an electric field which tends to be increased by a local electric field enhancement in a depletion layer of the p-n junction due to a precipitate introduced from a semiconductor surface will not exceed 1 MV/cm. When the depth of a depletion layer of the p-type layer or the n-type layer is referred to as Xp or Xn, and the slope of the carrier concentration, Ap or An, the following relation is provided:4.3.times.10.sup.12 (/cm.sup.2).gtoreq.An.multidot.Xn.sup.2 =Ap.multidot.Xp.sup.2Preferably, the p-n junction layer is formed under a contact hole of a source or drain region if the device in question is a MOSFET. As a result of using this arrangement, the leakage current caused by a local Zener effect decreases so that the electric field locally increased by the precipitate will not be greater than 1 MV/cm.
摘要翻译：提供了一种布置，以减少由半导体器件中的p-n结处的漏电流引起的结劣化。这种布置对于各种器件可能是有用的，并且对于降低MOSFET的源极或漏极区域处的结退化特别有效。为了实现这种减少，在半导体区域和衬底的p-n结处提供p-n结层。 pn结层的p型层和n型层的载流子浓度分布被设定为使得由于沉淀引起的在pn结的耗尽层中的局部电场增强倾向于增加的电场从半导体表面引入的电流不超过1MV / cm。当p型层或n型层的耗尽层的深度被称为Xp或Xn以及载流子浓度Ap或An的斜率时，提供以下关系：4.3×10 12（/ cm 2））> / = AnxXn2 = ApxXp2如果所讨论的器件是MOSFET，则优选地，在源极或漏极区域的接触孔下方形成pn结层。作为使用这种布置的结果，由局部齐纳效应引起的漏电流减小，使得由沉淀物局部增加的电场将不会大于1MV / cm。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式