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    • 94. 发明申请
    • MEMORY CELL HAVING STRESSED LAYERS
    • 具有压力层的记忆体
    • US20070132054A1
    • 2007-06-14
    • US11609851
    • 2006-12-12
    • Reza ArghavaniEllie YiehHichem M'Saad
    • Reza ArghavaniEllie YiehHichem M'Saad
    • H01L29/00
    • H01L29/7846H01L27/105H01L27/1052H01L29/66825H01L29/7883
    • A memory cell comprises a p-doped substrate with a pair of spaced apart n-doped regions on the substrate that form a source and drain about the channel. A stack of layers on the channel comprises, in sequence, (i) a tunnel oxide layer, (ii) a floating gate, (iii) an inter-gate dielectric, and (iv) a control gate. A polysilicon layer is on the source and drain. A cover layer covering the stack of layers comprises a spacer layer and a pre-metal-deposition layer. Optionally, contacts are used to contact each of the source, drain, and silicide layers, and each have exposed portions. A shallow isolation trench is provided about n-doped regions, the trench comprising a stressed silicon oxide layer having a tensile stress of at least about 200 MPa. The stressed layer reduces leakage of charge held in the floating gate during operation of the memory cell.
    • 存储单元包括在基板上具有一对间隔开的n掺杂区域的p掺杂衬底,其在沟道周围形成源极和漏极。 通道上的层叠层包括(i)隧道氧化物层,(ii)浮动栅极,(iii)栅极间电介质和(iv)控制栅极。 源极和漏极上的多晶硅层。 覆盖层叠层的覆盖层包括间隔层和预金属沉积层。 可选地,使用触点来接触源极,漏极和硅化物层中的每一个,并且每个都具有暴露部分。 围绕n掺杂区域提供浅的隔离沟槽,沟槽包括具有至少约200MPa的拉伸应力的应力氧化硅层。 应力层在存储器单元的操作期间减少了保持在浮动栅极中的电荷的泄漏。
    • 97. 发明授权
    • Barrier layer deposition using HDP-CVD
    • 使用HDP-CVD进行阻挡层沉积
    • US06399489B1
    • 2002-06-04
    • US09431411
    • 1999-11-01
    • Hichem M'SaadSeon Mee ChoDana Tribula
    • Hichem M'SaadSeon Mee ChoDana Tribula
    • C23C16/50C23C16/32H01L21/205H01L21/314H01L21/316H01L21/768H01L23/522H01L21/44
    • C23C16/325H01L21/314H01L21/3146Y10S438/931
    • A method of depositing a film, such as a barrier layer, on a substrate using a gaseous mixture including a hydrocarbon-containing gas and a silicon-containing gas. Suitable hydrocarbon-containing gases include alkanes such as methane (CH4), ethane (C2H6), butane (C3H8), propane (C4H10), etc. Suitable silicon-containing gases include silanes such as monosilane (SiH4). The method generally comprises providing a suitable gaseous mixture to the chamber, generating a plasma from the gaseous mixture, and depositing a film onto the substrate using the plasma. In a preferred embodiment, the film is deposited in a high-density plasma chemical vapor deposition (HDP-CVD) system. The gaseous mixture typically includes a silicon containing gas, such as an alkane, and a hydrocarbon containing gas, such as a silane. Embodiments of the method of the present invention can integrated stack structures having overall dielectric constant of about 4.0 or less. Such a structure may include a barrier layer having a dielectric constant of 4.5 or less.
    • 使用包含含烃气体和含硅气体的气体混合物在衬底上沉积诸如阻挡层的膜的方法。 合适的含烃气体包括烷烃如甲烷(CH4),乙烷(C2H6),丁烷(C3H8),丙烷(C​​4H10)等。合适的含硅气体包括硅烷如硅烷(SiH 4)。 该方法通常包括向腔室提供合适的气体混合物,从气体混合物产生等离子体,以及使用等离子体将膜沉积到衬底上。 在优选的实施方案中,膜以高密度等离子体化学气相沉积(HDP-CVD)系统沉积。 气态混合物通常包括含硅气体,例如烷烃,和含烃气体,例如硅烷。 本发明方法的实施方案可以具有总体介电常数为约4.0或更小的堆叠结构。 这种结构可以包括介电常数为4.5或更小的阻挡层。