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91. 发明授权

US6110531A Method and apparatus for preparing integrated circuit thin films by chemical vapor deposition 失效
标题翻译：通过化学气相沉积制备集成电路薄膜的方法和装置
公开(公告)号：US6110531A
公开(公告)日：2000-08-29
申请号：US892485
申请日：1997-07-14
申请人： Carlos A. Paz de Araujo , Larry D. McMillan , Narayan Solayappan , Jeffrey W. Bacon
发明人： Carlos A. Paz de Araujo , Larry D. McMillan , Narayan Solayappan , Jeffrey W. Bacon
IPC分类号： B05D1/00 , B05D1/04 , B05D3/04 , B05D7/24 , C23C4/12 , C23C16/02 , C23C16/40 , C23C16/44 , C23C16/448 , C23C16/455 , C23C16/46 , C23C16/48 , C23C16/52 , C23C16/56 , C23C18/12 , C23C18/14 , C23C26/02 , C30B7/00 , C30B25/02 , H01C7/10 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/108 , H01L27/115 , H01L41/24 , H05K3/10 , C23C16/18 , H01L21/31
CPC分类号： C23C16/45565 , B05D1/00 , B05D1/007 , B05D1/04 , B05D1/60 , B05D3/0493 , C23C16/0218 , C23C16/40 , C23C16/4412 , C23C16/448 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C16/56 , C23C26/02 , C23C4/123 , C30B25/02 , C30B29/68 , C30B7/00 , C30B7/005 , H01C7/1013 , H01L21/02197 , H01L21/02274 , H01L21/02356 , H01L27/10805 , H01L27/11502 , H01L28/56 , H01L28/60 , H01L41/1871 , H01L41/316 , H01L28/55 , H05K3/105
摘要： A mist is generated by a venturi from liquid precursors containing compounds used in chemical vapor deposition, transported in carrier gas through tubing at ambient temperature, passed into a heated zone where the mist droplets are gasified at a temperature of between 100.degree. C. and 200.degree. C., which is lower than the decomposition temperature of the precursor compounds. The gasified liquid is injected through an inlet assembly into a deposition reactor in which there is a substrate heated to from 400.degree. C. to 600.degree. C., on which the gasified compounds decompose and form a thin film of layered superlattice compound.
摘要翻译：由文氏管产生的气雾包含化学气相沉积中使用的化合物的液体前体，在载气中通过管道在环境温度下运输，并通入加热区，雾化气滴在100℃至200℃的温度下气化 ℃，其低于前体化合物的分解温度。将气化液体通过入口组件注入到沉积反应器中，其中存在加热至400℃至600℃的基底，气化的化合物在其上分解并形成层状超晶格化合物的薄膜。

92. 发明授权

US05997642A Method and apparatus for misted deposition of integrated circuit quality thin films 失效
标题翻译：沉积集成电路质量薄膜的方法和装置
公开(公告)号：US05997642A
公开(公告)日：1999-12-07
申请号：US971799
申请日：1997-11-17
申请人： Narayan Solayappan , Larry D. McMillan , Carlos A. Paz de Araujo
发明人： Narayan Solayappan , Larry D. McMillan , Carlos A. Paz de Araujo
IPC分类号： B05D1/00 , B05D1/04 , C23C16/40 , C23C16/44 , C23C16/448 , C23C16/455 , H01L21/02 , H01L21/31 , H01L21/314 , H01L21/316 , C23C14/00
CPC分类号： C23C16/45565 , B05D1/007 , B05D1/04 , C23C16/40 , C23C16/448 , C23C16/45561 , C23C18/12 , H01L21/31691 , H01L28/55
摘要： A mass flow controller controls the delivery of a precursor to a mist generator. The precursor is misted utilizing a venturi in which a combination of oxygen and nitrogen gas is charged by a corona wire and passes over a precursor-filled throat. The mist is electrically filtered so that it comprises predominately negative ions, passes into a velocity reduction chamber, and then flows into a deposition chamber through inlet ports in an inlet plate that is both a partition between the chambers and a grounded electrode. The inlet plate is located above and substantially parallel to the plane of the substrate on which the mist is to be deposited. The substrate is positively charged to a voltage of about 5000 volts. There are 440 inlet ports per square inch in an 39 square inch inlet port area of the inlet plate directly above the substrate. The inlet port area is approximately equal to the substrate area. An exhaust port defines a channel about the periphery of an exhaust plane parallel to and below the substrate plane.
摘要翻译：质量流量控制器控制前体到雾发生器的输送。使用文丘里管雾化前体，其中氧气和氮气的组合由电晕丝充电并且通过前体填充的喉部。雾被电过滤，使得其主要包含负离子，进入减速室，然后通过入口板中的入口板的入口端口流入沉积室，该入口板是室之间的分隔件和接地电极。入口板位于要沉积雾的基底的平面上方并且基本上平行。基板被充电至约5000伏特的电压。在基板正上方的入口板的39平方英寸进口端口区域中每平方英寸有440个入口端口。入口面积大致等于衬底面积。排气口围绕平行于和低于衬底平面的排气平面的周边限定通道。

93. 发明授权

US5965219A Misted deposition method with applied UV radiation 失效
标题翻译：应用紫外线辐射沉积法
公开(公告)号：US5965219A
公开(公告)日：1999-10-12
申请号：US591341
申请日：1996-01-25
申请人： Shinichiro Hayashi , Larry D. McMillan , Carlos A. Paz de Araujo
发明人： Shinichiro Hayashi , Larry D. McMillan , Carlos A. Paz de Araujo
IPC分类号： B05D1/00 , B05D3/04 , B05D3/06 , B05D7/24 , C23C8/10 , C23C16/44 , C23C16/448 , C23C16/455 , C23C16/46 , C23C16/48 , C23C16/52 , C23C18/12 , C23C18/14 , C23C26/02 , C30B7/00 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/115 , H01L41/24 , H05K3/10 , C23C8/00
CPC分类号： C23C18/1216 , B05D1/00 , B05D1/60 , B05D3/0493 , B05D3/062 , B05D3/065 , C23C16/4412 , C23C16/448 , C23C16/4486 , C23C16/45561 , C23C16/4558 , C23C16/46 , C23C16/482 , C23C16/52 , C23C18/14 , C23C26/02 , C23C8/10 , C30B29/68 , C30B7/00 , C30B7/005 , H01L21/31691 , H01L27/11502 , H01L28/56 , H01L28/60 , H01L41/317 , H01L28/55 , H01L41/1871 , H05K3/105
摘要： UV radiation is applied to a substrate in a deposition chamber to desorb water and other contaminates from it. A liquid precursor is misted, flowed into the deposition chamber and deposited on a substrate while UV radiation is applied to the mist. The film of liquid on the substrate is dried and annealed on the substrate while the UV radiation is applied to form a solid thin film of a metal oxide. The thin film is then incorporated into an electronic device of an integrated circuit fabricated on the substrate. The application of UV radiation to both the mist during deposition and the thin film after deposition significantly increases the quality of the resulting integrated circuits. The process has been found to be particularly excellent for making BST, strontium bismuth tantalate, and strontium bismuth niobate.
摘要翻译：将UV辐射施加到沉积室中的基底以从其中解吸水和其它污染物。液体前体被雾化，流入沉积室并沉积在基底上，同时将紫外线辐射施加于雾。将衬底上的液体膜干燥并在衬底上退火，同时施加UV辐射以形成金属氧化物的固体薄膜。然后将薄膜并入到在衬底上制造的集成电路的电子器件中。在沉积期间将UV辐射施加到雾和沉积后的薄膜显着增加了所得到的集成电路的质量。已经发现该方法对于制备BST，钽酸锶锶和铌酸铋锶特别优异。

94. 发明授权

US5840110A Integrated circuits having mixed layered superlattice materials and precursor solutions for use in a process of making the same 失效
标题翻译：具有混合分层超晶格材料的集成电路和用于制造其的前体溶液
公开(公告)号：US5840110A
公开(公告)日：1998-11-24
申请号：US644453
申请日：1996-05-10
申请人： Masamichi Azuma , Carlos A. Paz De Araujo , Larry D. McMillan
发明人： Masamichi Azuma , Carlos A. Paz De Araujo , Larry D. McMillan
IPC分类号： H01L27/10 , C04B35/622 , C23C16/448 , C23C18/12 , C30B7/00 , H01L21/02 , H01L21/314 , H01L21/316 , H01L21/8242 , H01L21/8246 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/92 , C09D5/00 , C09D5/24
CPC分类号： C23C16/448 , C04B35/62227 , C23C16/45561 , C23C18/1216 , C23C18/1225 , C23C18/1279 , C30B29/68 , C30B7/00 , C30B7/005 , H01L21/314 , H01L21/31691 , H01L27/10805 , H01L27/11502 , H01L28/40 , H01L28/56 , H01L28/60 , H01L28/55
摘要： Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials of a type having discrete oxygen octahedral layers and collated with a superlattice-generator layer. The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer, a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer, and a superlattice-generator portion capable of forming the superlattice-generator layer. The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.
摘要翻译：使用基于金属烷氧基羧酸盐的液体前体溶液来形成电子器件（100），其包括具有离散氧八面体层并与超晶格 - 发生器层对照的类型的混合层状超晶格材料。前体溶液包括有效量的用于产生层状超晶格材料的多个金属部分。这些金属部分被混合以包括能够形成A / B层的A / B部分，能够形成钙钛矿型AB八面体层的类钙钛矿型AB层部分和能够形成超晶格的超晶格发生部分发电机层。前体以液体形式沉积在基底上并退火以提供层状超晶格材料。

95. 发明授权

US5541870A Ferroelectric memory and non-volatile memory cell for same 失效
标题翻译：铁电存储器和非易失性存储器单元相同
公开(公告)号：US5541870A
公开(公告)日：1996-07-30
申请号：US330989
申请日：1994-10-28
申请人： Takashi Mihara , Hitoshi Watanabe , Hiroyuki Yoshimori , Carlos A. Paz de Araujo , Larry D. McMillan
发明人： Takashi Mihara , Hitoshi Watanabe , Hiroyuki Yoshimori , Carlos A. Paz de Araujo , Larry D. McMillan
IPC分类号： G11C17/00 , G11C11/22 , G11C16/04 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11502 , G11C11/22
摘要： A non-volatile integrated circuit memory in which the memory cell includes a first transistor gate overlying a first channel region, a ferroelectric material overlying a second channel region, and a second transistor gate overlying a third channel region. The channel regions are connected in series, and preferably are contiguous portions of a single semiconducting channel. The firm channel is connected to a plate voltage that is 20% to 50% of the coercive voltage of the ferroelectric material. A sense amplifier is connected to the third channel region via a bit line. The rise of the bit line after reading a logic "1" state of the cell is prevented from disturbing the ferroelectric material by shutting off the third channel before the sense amplifier rises.
摘要翻译：一种非易失性集成电路存储器，其中存储单元包括覆盖第一沟道区的第一晶体管栅极，覆盖第二沟道区的铁电材料和覆盖第三沟道区的第二晶体管栅极。通道区域串联连接，优选地是单个半导体通道的连续部分。固体通道连接到铁电体的矫顽电压的20％至50％的板电压。读出放大器通过位线连接到第三通道区域。读出逻辑“1”状态之后的位线的上升通过在读出放大器上升之前切断第三通道来防止铁电材料的干扰。

96. 发明授权

US5316579A Apparatus for forming a thin film with a mist forming means 失效
标题翻译：用雾形成装置形成薄膜的装置
公开(公告)号：US5316579A
公开(公告)日：1994-05-31
申请号：US877749
申请日：1992-05-04
申请人： Larry D. McMillan , Carlos A. Paz de Araujo , Tom L. Roberts
发明人： Larry D. McMillan , Carlos A. Paz de Araujo , Tom L. Roberts
IPC分类号： B05D1/00 , B05D3/04 , B05D7/24 , C23C16/44 , C23C16/448 , C23C16/455 , C23C16/46 , C23C16/48 , C23C16/52 , C23C18/12 , C23C26/02 , C30B7/00 , H01C7/10 , H01L21/02 , H01L21/314 , H01L21/316 , H01L27/108 , H01L27/115 , H01L41/24 , H05K3/10 , B05C11/04
CPC分类号： C23C16/4558 , B05D1/00 , B05D1/60 , B05D3/0493 , C23C16/4412 , C23C16/4486 , C23C16/45561 , C23C16/46 , C23C16/482 , C23C16/52 , C23C26/02 , C30B29/68 , C30B7/00 , H01C7/1013 , H01L21/31691 , H01L27/10805 , H01L27/11502 , H01L28/56 , H01L41/316 , H01L28/55 , H05K3/105 , Y10S505/734 , Y10S505/741 , Y10S505/786 , Y10S505/826
摘要： A method and apparatus are disclosed for generating fine mists of liquids using a rotating turbine blade disposed within an enclosure. A mixture of a liquid and a carrier gas are flowed into the enclosure such that it immediately impacts on the rotating turbine blade disposed near a lower end of the enclosure, and the resulting mist is withdrawn under vacuum near an upper end of the enclosure. A method and apparatus are also disclosed for chemical vapor deposition of thin films of complex chemical compounds using the discussed mists.
摘要翻译：公开了一种用于使用设置在外壳内的旋转涡轮叶片产生细液体的方法和装置。液体和载体气体的混合物流入外壳，使得其立即冲击设置在外壳下端附近的旋转涡轮叶片，并且所得雾在外壳附近的真空附近被抽出。还公开了使用所讨论的薄膜化学气相沉积复合化学化合物薄膜的方法和装置。

97. 发明授权

US5463244A Antifuse programmable element using ferroelectric material 失效
标题翻译：防腐可编程元件采用铁电材料
公开(公告)号：US5463244A
公开(公告)日：1995-10-31
申请号：US249870
申请日：1994-05-26
申请人： Carlos A. P. De Araujo , Larry D. McMillan , Joseph D. Cuchiaro
发明人： Carlos A. P. De Araujo , Larry D. McMillan , Joseph D. Cuchiaro
IPC分类号： H01L23/525 , H01L27/02
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011
摘要： An electrically programmable antifuse element using ferroelectric materials for the insulative dielectric layer, methods for producing same, and an integrated circuit applying a plurality of ferroelectric antifuse elements in a two dimensional matrix of rows and columns for use as a programmable logic device (PLD) or as a programmable read-only memory (PROM). A ferroelectric material is formed between two conductive electrodes to create a ferroelectric antifuse element. In an alternative embodiment, a plurality of chemically distinct materials is layered to form the dielectric layer. The combined application of an AC electric field and a DC electric field breaks down the ferroelectric material to form a low-resistance conductive filament. The synergy of the two electric fields permits programming antifuse elements of the present invention by applying DC electric fields as low as 2 volts amplitude. In the preferred embodiment, as compared to prior designs, antifuse devices of the present invention display higher resistivity in the unprogrammed state due to the high dielectric constant of ferroelectric materials and lower resistivity in the programmed state because the ferroelectric material breaks down into metal oxide conductive filaments. The resistivity of the conductive filament may be reduced further by the blending of materials through substitution rather than doping processes.
摘要翻译：使用用于绝缘介电层的铁电材料的电可编程反熔丝元件，其制造方法和在行和列的二维矩阵中施加多个铁电反熔丝元件的集成电路，用作可编程逻辑器件（PLD）或作为可编程只读存储器（PROM）。在两个导电电极之间形成铁电材料以产生铁电反熔丝元件。在替代实施例中，层叠多个化学上不同的材料以形成电介质层。交流电场和直流电场的组合应用使铁电材料分解形成低电阻导电细丝。两个电场的协同作用允许通过施加低至2伏的DC电场来编程本发明的反熔丝元件。在优选实施例中，与现有设计相比，本发明的反熔丝器件由于铁电材料的高介电常数和编程状态下的较低电阻率而在未编程状态下显示较高的电阻率，因为铁电材料分解为金属氧化物导电细丝。导电丝的电阻率可以通过代替而不是掺杂工艺的材料掺合进一步降低。

98. 发明授权

US06203619B1 Multiple station apparatus for liquid source fabrication of thin films 失效
标题翻译：用于薄膜液体源制造的多站装置
公开(公告)号：US06203619B1
公开(公告)日：2001-03-20
申请号：US09179121
申请日：1998-10-26
申请人： Larry D. McMillan
发明人： Larry D. McMillan
IPC分类号： C23C1600
CPC分类号： H01L21/6719 , H01L21/67196
摘要： An apparatus and method are disclosed for fabricating thin films for use in an active component of an integrated circuit by the use of an assembly line type process. A plurality of substrate stations are located on a platen which is rotated to move each station sequentially between a misted deposition device, a drying device, and a solidification device. The misted deposition device includes a mist showerhead in a movable housing. The mist showerhead separates a velocity reduction chamber from a deposition chamber.
摘要翻译：公开了一种用于通过使用装配线型工艺制造用于集成电路的有源部件的薄膜的装置和方法。多个基板台位于压板上，该台板被旋转以在雾化的沉积装置，干燥装置和固化装置之间依次移动每个工位。雾化的沉积装置在可动壳体中包括喷雾头。雾喷头将减速室与沉积室分开。

99. 发明授权

US3986897A Aluminum treatment to prevent hillocking 失效
标题翻译：铝处理以防止破裂
公开(公告)号：US3986897A
公开(公告)日：1976-10-19
申请号：US510532
申请日：1974-09-30
申请人： Larry D. McMillan , Richard E. Shipley
发明人： Larry D. McMillan , Richard E. Shipley
IPC分类号： C23C22/68 , H01L21/316 , H01L21/321 , C23F7/06
CPC分类号： H01L21/321 , C23C22/68 , H01L21/31683 , Y10S438/937
摘要： A method of surface treating aluminum, particularly aluminum metallization for semiconductors, which includes subjecting the aluminum surface to be treated with fuming nitric acid for one to ten minutes at room temperature. Following cleaning, the surface is subjected to boiling water for 5 to 15 minutes. The foregoing treatment appears to form a boehmite (AlO(OH)) layer on the surface of the aluminum, thereby substantially eliminating hillocking.

100. 发明授权

US5561307A Ferroelectric integrated circuit 失效
标题翻译：铁电集成电路
公开(公告)号：US5561307A
公开(公告)日：1996-10-01
申请号：US276474
申请日：1994-07-18
申请人： Takashi Mihara , Hiroyuki Yoshimori , Hitoshi Watanabe , Larry D. McMillan , Carlos P. De Araujo
发明人： Takashi Mihara , Hiroyuki Yoshimori , Hitoshi Watanabe , Larry D. McMillan , Carlos P. De Araujo
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/76 , C23C14/00 , H01L29/94
CPC分类号： H01L27/10852 , H01L27/10808 , H01L28/60 , H01L28/55
摘要： An oversize ferroelectric capacitor is located against the contact hole to the MOSFET source/drain in a DRAM. A barrier layer made of titanium nitride, titanium tungsten, tantalum, titanium, tungsten, molybdenum, chromium, indium tin oxide, tin dioxide, ruthenium oxide, silicon, silicide, or polycide lies between the ferroelectric layer and the source drain. The barrier layer may act as the bottom electrode of the ferroelectric capacitor, or a separate bottom electrode made of platinum may be used. In another embodiment in which the barrier layer forms the bottom electrode, an oxide layer less than 5 nm thick is located between the barrier layer and the ferroelectric layer and the barrier layer is made of silicon, silicide, or polycide. A thin silicide layer forms and ohmic contact between the barrier layer and the source/drain. The capacitor and the barrier layer are patterned in a single mask step. The ends of the capacitor are stepped or tapered. In another embodiment both the bottom and top electrode may be made of silicon, silicide, polycide or a conductive oxide, such as indium tin oxide, tin dioxide, or ruthenium oxide.
摘要翻译：超大型铁电电容器位于DRAM中的MOSFET源极/漏极的接触孔处。在铁电层和源极漏极之间，由氮化钛，钛钨，钽，钛，钨，钼，铬，氧化铟锡，二氧化锡，氧化钌，硅，硅化物或多晶硅化物形成的阻挡层。阻挡层可以用作铁电电容器的底部电极，或者可以使用由铂制成的单独的底部电极。在其中阻挡层形成底部电极的另一个实施例中，小于5nm厚的氧化物层位于势垒层和铁电层之间，阻挡层由硅，硅化物或多硅化物制成。薄的硅化物层在阻挡层和源极/漏极之间形成欧姆接触。在单个掩模步骤中对电容器和阻挡层进行图案化。电容器的端部是阶梯式或锥形的。在另一个实施例中，底部和顶部电极可以由硅，硅化物，多晶硅或导电氧化物，例如氧化铟锡，二氧化锡或氧化钌制成。

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