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91. 发明申请

US20050040461A1 Semiconductor device 审中-公开
公开(公告)号：US20050040461A1
公开(公告)日：2005-02-24
申请号：US10951651
申请日：2004-09-29
申请人： Mizuki Ono , Akira Nishiyama
发明人： Mizuki Ono , Akira Nishiyama
IPC分类号： H01L21/28 , H01L21/8234 , H01L27/088 , H01L29/51 , H01L29/78 , H01L29/76
CPC分类号： H01L21/28194 , H01L21/28202 , H01L21/823456 , H01L21/823462 , H01L21/823475 , H01L21/823857 , H01L27/088 , H01L27/0922 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/78 , H01L29/785
摘要： A semiconductor device comprises a semiconductor substrate, a first circuit formed on the substrate, and a second circuit connected to the first circuit as an input/output portion thereof and powered by a voltage higher than that for the first circuit, the first circuit including a first and a second field-effect transistor, the first drain region of the first transistor accompanying a first load capacitance, the second drain region of the second transistor accompanying a second load capacitance smaller than the first load capacitance, and the first gate insulation film of the first transistor having an average relative dielectric constant higher than that of the second gate insulation film of the second transistor, thereby realizing a high operation speed.

92. 发明申请

US20050017305A1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050017305A1
公开(公告)日：2005-01-27
申请号：US10863204
申请日：2004-06-09
申请人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
发明人： Masato Koyama , Akira Nishiyama , Masamichi Suzuki , Yuuichi Kamimuta , Tsunehiro Ino
IPC分类号： H01L21/28 , H01L21/336 , H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78 , H01L21/84 , H01L29/94
CPC分类号： H01L21/823814 , H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device can be manufactured which has a low resistance, and device characteristics of which do not vary. The semiconductor device includes a silicon layer, a gate dielectric film formed on the silicon layer, a gate electrode formed on the gate dielectric film and including a nitrided metal silicide layer which is partially crystallized, and source and drain regions formed in a surface region of the silicon layer at both sides of the gate electrode.
摘要翻译：可以制造具有低电阻的半导体器件，其器件特性不变化。半导体器件包括硅层，形成在硅层上的栅极电介质膜，形成在栅极电介质膜上的栅电极，并且包括被部分结晶的氮化金属硅化物层，以及形成在栅电极两侧的硅层。

93. 发明授权

US06504237B2 Semiconductor with multilayer metal structure using copper that offer high speed performance 失效
标题翻译：具有多层金属结构的半导体，使用铜，提供高速性能
公开(公告)号：US06504237B2
公开(公告)日：2003-01-07
申请号：US10188752
申请日：2002-07-05
申请人： Mitsuhiro Noguchi , Akira Nishiyama
发明人： Mitsuhiro Noguchi , Akira Nishiyama
IPC分类号： H01L23495
CPC分类号： H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： An electrical wiring structure capable of improving a wiring delay to thereby achieve both low power consumption and high-speed performances without accompanying any significant changes in circuit layout and wiring structure of prior known CMOS logic circuitry and also alterations of the multilayer configuration of wiring layers is provided. A local wiring 1 and global wirings 2, 3 are stacked over a semiconductor substrate 10 in this order of sequence when looked at from lower part in a lamination direction, with dielectric layers sandwiched between adjacent ones of these layers. A distance between the local wiring 1 and the global wiring 2 is so formed as to be greater than a distance between the global wiring layer 2 and the global wiring, 3. Thus provided is a semiconductor device featured in that a drive voltage used to drive the global wirings 2, 3 is potentially lower than a drive voltage for driving inside of the local wiring 1.
摘要翻译：一种能够改善布线延迟从而实现低功耗和高速性能的电布线结构，而不伴随现有已知CMOS逻辑电路的电路布局和布线结构的任何显着变化以及布线层的多层配置的改变。当从层叠方向的下部观察时，局部布线1和全局布线2,3以顺序的顺序堆叠在半导体基板10上，其中介电层夹在这些层中的相邻层之间。本地布线1和全局布线2之间的距离被形成为大于全局布线层2和全局布线3之间的距离。因此，提供了一种半导体器件，其特征在于用于驱动的驱动电压全局布线2,3可能低于用于驱动本地布线1内部的驱动电压。

94. 发明授权

US06407281B1 Process for producing optically active cysteine derivatives 失效
标题翻译：光学活性半胱氨酸衍生物的制备方法
公开(公告)号：US06407281B1
公开(公告)日：2002-06-18
申请号：US09600253
申请日：2000-08-25
申请人： Yasuyoshi Ueda , Hiroshi Murao , Takeshi Kondo , Noboru Ueyama , Hajime Manabe , Kenji Yoneda , Akira Nishiyama
发明人： Yasuyoshi Ueda , Hiroshi Murao , Takeshi Kondo , Noboru Ueyama , Hajime Manabe , Kenji Yoneda , Akira Nishiyama
IPC分类号： C07C32100
CPC分类号： C07C319/28 , C07B2200/07 , C07C319/20 , Y02P20/55 , C07C323/59
摘要： A process for producing optically active cysteine derivatives with high optical purity and good quality which is economically advantageous and is high in productivity even on a commercial scale is provided. A process for producing an optically active cysteine derivative which comprises synthesizing a D-form or L-form optically active cysteine derivative of the general formula (2) shown below (R1 represents an amino-protecting group of the urethane or acyl type, R0 represents a hydrogen atom or, taken together with R1, an amino-protecting group, R2 represents an alkyl, aryl or aralkyl group, R3 represents a univalent organic group and * represents the position of an asymmetric carbon) by reacting the corresponding D-form or L-form optically active amino acid derivative of the general formula (1) shown below with an alcohol of the general formula (3) shown below and a strong acid and/or a thionyl halide and recovering the above cysteine derivative (2) from the reaction mixture, the procedural series from reaction to recovery being carried out under conditions such that the medium contacting the above optically active cysteine derivative (2) is within the range from acidic to weakly basic to thereby recover the above cysteine derivative (2) from the reaction mixture while suppressing the decomposition and racemization thereof.
摘要翻译：提供一种制造光学活性半胱氨酸衍生物的方法，该方法具有高光学纯度和良好的质量，其在经济上是有利的并且即使在商业规模下也具有高生产率。1.一种光学活性半胱氨酸衍生物的制备方法，其包括合成D型或L型（2）的光学活性半胱氨酸衍生物（R1表示氨基甲酸酯或酰基型氨基保护基，R 0表示氢原子，或与R 1一起形成氨基保护基，R2表示烷基，芳基或芳烷基，R 3表示一价有机基团，*表示不对称碳的位置），通过使下述通式（1）的相应的D型或L型光学活性氨基酸衍生物与如下所示的通式（3）的醇和强酸和/或亚硫酰卤并从反应混合物中回收上述半胱氨酸衍生物（2），程序在与上述光学活性半胱氨酸衍生物（2）接触的介质在酸性至弱碱性的范围内，从反应混合物中回收上述半胱氨酸衍生物（2）的条件下进行反应回收的ural系列，同时抑制其分解和外消旋化。

95. 发明授权

US06388086B1 Process for production of 3-(3-pyridyl)-1-propanol derivatives 失效
标题翻译： 3-（3-吡啶基）-1-丙醇衍生物的制备方法
公开(公告)号：US06388086B1
公开(公告)日：2002-05-14
申请号：US09631678
申请日：2000-08-02
申请人： Akira Nishiyama , Kazumi Okuro , Kenji Inoue
发明人： Akira Nishiyama , Kazumi Okuro , Kenji Inoue
IPC分类号： C07D21330
CPC分类号： C07D213/30
摘要： A process for producing a 3-(3-pyridyl)-1-propanol derivative of use as a pharmaceutical intermediate expediently with an inexpensive material is provided. The process is concerned with a 3-(3-pyridyl)-1-propanol derivative (3): in the formula, R1 represents an alkyl group of 1 to 20 carbon atoms, aryl group of 6 to 20 carbon atoms or aralkyl group of 7 to 20 carbon atoms, which may be substituted, and comprises reacting a 3-methylpyridine with a strong base to prepare a 3-methylpyridine metal (1): in the formula, M represents lithium, sodium, potassium or a magnesium halide, where the halide is chloride or bromide, and then reacting said metal salt with an epoxy compound (2):
摘要翻译：提供了以便宜的材料制备用作药物中间体的3-（3-吡啶基）-1-丙醇衍生物的方法。该方法涉及3-（3-吡啶基）-1-丙醇衍生物（3）：式中，R1表示碳原子数为1〜20的烷基，碳原子数为6〜20的芳基或芳烷基可以被取代的7至20个碳原子，并且使3-甲基吡啶与强碱反应以制备3-甲基吡啶金属（1）：在该式中，M表示锂，钠，钾或卤化镁，其中卤化物是氯化物或溴化物，然后使所述金属盐与环氧化合物（2）反应：

96. 发明授权

US06326670B1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06326670B1
公开(公告)日：2001-12-04
申请号：US09522593
申请日：2000-03-10
申请人： Akira Nishiyama , Masahiro Koike
发明人： Akira Nishiyama , Masahiro Koike
IPC分类号： H01L31119
CPC分类号： H01L21/28185 , H01L21/28176 , H01L21/28194 , H01L21/28211 , H01L21/28247 , H01L21/31604 , H01L21/31637 , H01L21/31641 , H01L21/31662 , H01L21/31691 , H01L29/41783 , H01L29/513 , H01L29/517 , H01L29/66545 , H01L29/66553 , H01L29/66575 , H01L29/66659 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a Si oxide film formed between a Si substrate and a metallic oxide film is prevented from growing when an annealing treatment is performed after the metallic oxide film is formed, and a method for manufacturing the same. A semiconductor device comprises a silicon substrate, a gate insulating film formed on the silicon substrate and made of the metallic oxide film, and a gate electrode formed on the gate insulating film, wherein an interface film formed between the gate insulating film and the Si substrate is thinner at the ends of the gate insulating film than in the center thereof.
摘要翻译：一种半导体器件包括在形成在Si衬底和金属氧化物膜之间形成的Si氧化物膜时，在形成金属氧化物膜之后进行退火处理时，可以防止生长Si氧化膜及其制造方法。1。一种半导体器件，包括硅基板，形成在硅基板上并由金属氧化物膜构成的栅极绝缘膜和形成在栅极绝缘膜上的栅电极，其中形成在栅极绝缘膜和Si基板之间的界面膜在端部处较薄栅绝缘膜比其中心。

97. 发明授权

US06278165B1 MIS transistor having a large driving current and method for producing the same 有权
标题翻译：具有大驱动电流的MIS晶体管及其制造方法
公开(公告)号：US06278165B1
公开(公告)日：2001-08-21
申请号：US09340149
申请日：1999-06-28
申请人： Yukihito Oowaki , Mizuki Ono , Mitsuhiro Noguchi , Daisaburo Takashima , Akira Nishiyama
发明人： Yukihito Oowaki , Mizuki Ono , Mitsuhiro Noguchi , Daisaburo Takashima , Akira Nishiyama
IPC分类号： H01L2976
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/66621 , H01L29/78
摘要： In a MIS transistor, the top surfaces of source/drain regions (S/D diffusion layers) formed on a semiconductor substrate 1 are arranged nearer to a gate electrode than a channel plane on the semiconductor substrate, and the top surfaces of the source/drain regions are arranged nearer than the channel plane than the interface between a gate insulator film provided on the upper side of the channel plane and the gate electrode. In this transistor, a groove is selectively formed in the surface of the semiconductor substrate, and a polycrystalline silicon deposited in the groove may be used as a mask to form impurity diffusion layers serving as source/drain regions to laminate and form a gate insulator film of a high dielectric film and a gate electrode. Alternatively, the polycrystalline silicon may be selectively formed to be used as a mask to elevate and form the impurity diffusion layer to laminate and form the gate insulator film and the gate electrode. Thus, it is possible to achieve both of the reduction of the resistance of the S/D diffusion layers and the reduction of the gate parasitic capacitance.
摘要翻译：在MIS晶体管中，形成在半导体基板1上的源极/漏极区域（S / D扩散层）的上表面布置成比半导体衬底上的沟道平面更靠近栅电极，源极/漏极区域的顶表面漏区比布置在沟道平面上侧的栅极绝缘膜与栅电极之间的界面更靠近沟道平面。在该晶体管中，在半导体衬底的表面中选择性地形成沟槽，并且可以将沉积在沟槽中的多晶硅用作掩模，以形成用作源极/漏极区域的杂质扩散层，以层压并形成栅极绝缘膜的高介电膜和栅电极。或者，可以选择性地形成多晶硅以用作掩模以升高和形成杂质扩散层以层压并形成栅极绝缘膜和栅电极。因此，可以实现S / D扩散层的电阻的降低和栅极寄生电容的降低。

98. 发明授权

US6107511A Process for the purification or isolation of (2S,3R)-1-halo-2-hydroxy-3-(protected amino)4-phenylthiobutanes or optical antipodes thereof 失效
标题翻译：纯化或分离（2S，3R）-1-卤代-2-羟基-3-（被保护的氨基）-4-苯硫基丁烷或其光学对映体的方法
公开(公告)号：US6107511A
公开(公告)日：2000-08-22
申请号：US269298
申请日：1999-05-14
申请人： Yasuyoshi Ueda , Katsuji Maehara , Tadashi Sugawa , Hiroshi Murao , Akira Nishiyama , Hajime Manabe
发明人： Yasuyoshi Ueda , Katsuji Maehara , Tadashi Sugawa , Hiroshi Murao , Akira Nishiyama , Hajime Manabe
IPC分类号： C07C319/28 , C07C323/43 , C07C261/00
CPC分类号： C07C319/28 , Y02P20/55
摘要： The present invention has for its object to provide a commercially useful, expedient and efficient method for purification and isolation of an N-protected (2S,3R)-1-halo-2-hydroxy-3-amino-4-phenylthiobutane (1) or its enantiomer, which is capable of removing the various contaminants, particularly said byproducts, whereby the problem of instability of the compound (1) or its enantiomer can be overcome and a high product yield can be insured.The present invention relates to a method of purifying and isolating an N-protected (2S,3R)-1-halo-2-hydroxy-3-amino-4-phenylthiobutane (1): ##STR1## (wherein X represents a halogen atom; one of P.sup.1 and P.sup.2 represents a hydrogen atom and the other represents an amino-protecting group, or P.sup.1 and P.sup.2 taken together represents an amino-protecting group) or its enantiomer, which comprises using an aromatic hydrocarbon solvent to remove impurities occurring in said compound (1) or impurities occurring in said enantiomer from said compound (1) containing impurities or its enantiomer containing impurities and isolate said compound (1) or said enantiomer as crystals.
摘要翻译： PCT No.PCT / JP98 / 03375 Sec。 371日期1999年5月14日 102（e）日期1999年5月14日PCT提交1998年7月29日PCT公布。出版物WO99 / 06364 日期1999年2月11日本发明的目的是提供用于纯化和分离N-保护的（2S，3R）-1-卤代-2-羟基-3-氨基-4 （1）或其对映异构体，其能够除去各种污染物，特别是所述副产物，由此可以克服化合物（1）或其对映体的不稳定性问题，并且可以保证高产率。本发明涉及纯化和分离N-保护的（2S，3R）-1-卤代-2-羟基-3-氨基-4-苯基硫代丁烷（1）的方法：（其中X表示卤素原子; P1和P2表示氢原子，另一个表示氨基保护基，或P1和P2一起表示氨基保护基）或其对映异构体，其包括使用芳烃溶剂除去在所述化合物（1）中发生的杂质）或杂质存在于所述含有杂质的化合物（1）的所述对映异构体中，或将所述化合物（1）或所述对映异构体分离为晶体。

99. 发明授权

US5886385A Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5886385A
公开(公告)日：1999-03-23
申请号：US914752
申请日：1997-08-20
申请人： Osamu Arisumi , Akira Nishiyama , Makoto Yoshimi
发明人： Osamu Arisumi , Akira Nishiyama , Makoto Yoshimi
IPC分类号： H01L21/8242 , H01L21/336 , H01L27/108 , H01L29/45 , H01L29/786 , H01L27/01 , H01L29/78
CPC分类号： H01L29/66772 , H01L29/458 , H01L29/78612 , H01L29/78618
摘要： A semiconductor device comprises: a first semiconductor layer 6 having a first conductivity formed on a substrate having a surface of an insulating material 4; a source region 16a and a drain region 16b, which are formed on the first semiconductor layer so as to be separated from each other and which have a second conductivity different from the first conductivity; a channel region 6 formed on the first semiconductor layer between the source region and the drain region; a gate electrode 10 formed on the channel region a gate sidewall 14 of an insulating material formed on a side of the gate electrode; and a second semiconductor layer 18 having the first conductivity formed on at least the source region. This semiconductor device can effectively suppress the floating-body effect with a simple structure.
摘要翻译：半导体器件包括：具有第一导电性的第一半导体层6，其形成在具有绝缘材料4的表面的基板上; 源极区域16a和漏极区域16b，其形成在第一半导体层上以彼此分离并且具有不同于第一导电性的第二导电性; 形成在源极区域和漏极区域之间的第一半导体层上的沟道区域6; 形成在形成在栅极侧的绝缘材料的栅极侧壁14的沟道区域上的栅电极10; 以及在至少源极区上形成具有第一导电性的第二半导体层18。该半导体装置能够以简单的结构有效地抑制浮体效应。

100. 发明授权

US5763953A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5763953A
公开(公告)日：1998-06-09
申请号：US588511
申请日：1996-01-18
申请人： Tadashi IIjima , Hisako Ono , Yukihiro Ushiku , Akira Nishiyama , Naomi Nakasa
发明人： Tadashi IIjima , Hisako Ono , Yukihiro Ushiku , Akira Nishiyama , Naomi Nakasa
IPC分类号： H01L21/285 , H01L21/768 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76834 , H01L21/28512 , H01L21/76801 , H01L21/76816 , H01L21/76831 , H01L21/76841 , H01L21/76843 , H01L21/76844 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/76864 , H01L21/76867 , H01L21/76874 , H01L21/76882 , H01L21/76886 , H01L23/53242 , H01L23/53247 , H01L23/53252 , H01L2924/0002 , Y10S148/015 , Y10S148/035 , Y10S438/922
摘要： A semiconductor device includes a first metal film formed on a semiconductor substrate, a second metal film formed on the first metal film and containing silver as a main component, and a protective film containing a metal element of the first metal film and covering at least the upper surface of the second metal film. The protective film is formed by annealing in an atmosphere containing a predetermined element. That is, the metal element of the first metal film is diffused into the second metal film and reacts with the predetermined element in the atmosphere on the surface of the second metal film, thereby forming the protective film. Aggregation of silver is prevented in the presence of the protective film.
摘要翻译：半导体器件包括形成在半导体衬底上的第一金属膜，形成在第一金属膜上并含有银作为主要成分的第二金属膜和包含第一金属膜的金属元素的保护膜，并且至少覆盖第二金属膜的上表面。保护膜通过在含有规定元素的气氛中进行退火而形成。也就是说，第一金属膜的金属元素扩散到第二金属膜中并与第二金属膜的表面上的大气中的预定元素反应，从而形成保护膜。在保护膜的存在下防止银的聚集。

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