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91. 发明授权

US5627391A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5627391A
公开(公告)日：1997-05-06
申请号：US492913
申请日：1995-06-20
申请人： Yasuhiro Shimada , Atsuo Inoue , Koji Arita , Toru Nasu , Yoshihisa Nagano , Akihiro Matsuda
发明人： Yasuhiro Shimada , Atsuo Inoue , Koji Arita , Toru Nasu , Yoshihisa Nagano , Akihiro Matsuda
IPC分类号： H01L21/28 , H01L21/02 , H01L21/822 , H01L27/04 , H01L27/10 , H01L27/115 , H01L29/76 , H01L23/48 , H01L27/108
CPC分类号： H01L27/11502 , H01L28/40
摘要： A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at the bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.
摘要翻译：半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有接触孔13的第二绝缘膜11，其独立地引导到下电极7和上电极9，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和扩散形成的互连层15 在接触孔13的底部的扩散阻挡层17中形成由粒状晶体构成的层状区域。

92. 发明授权

US5012651A Heat pump apparatus 失效
标题翻译：热泵设备
公开(公告)号：US5012651A
公开(公告)日：1991-05-07
申请号：US457234
申请日：1989-12-26
申请人： Kazuo Nakatani , Mitsuhiro Ikoma , Yuji Yoshida , Takeshi Tomizawa , Koji Arita , Minoru Tagashira
发明人： Kazuo Nakatani , Mitsuhiro Ikoma , Yuji Yoshida , Takeshi Tomizawa , Koji Arita , Minoru Tagashira
IPC分类号： F25B9/00 , F25B13/00
CPC分类号： F25B13/00 , F25B9/006
摘要： The structure is arranged in such a manner that nonazeotropic mixed refrigerant is enclosed therein and a fractioning/separating device is disposed in a low pressure circuit in the main circuit of refrigerating cycle so as to conduct separation operation, the fraction/separation can be conducted at a low pressure in a separation mode, the specific volume of refrigerant gas generated in a reservoir due to heat supplied from a heater is enlarged, and the velocity of gas which moves upwards in the fractioning/separating device can be increased, causing a gas-liquid contact to be promoted. As a result, high performance separation can be conducted at reduced quantity of heat, causing the density of high boiling point refrigerant reserved to be significantly raised. Thus, the composition in the main circuit becomes a composition enriched with low boiling point refrigerant exhibiting excellent heating performance so as to satisfactorily cope with an increase in the load.

93. 发明授权

US08445886B2 Nonvolatile memory element, nonvolatile memory device, nonvolatile semiconductor device, and method of manufacturing nonvolatile memory element 有权
标题翻译：非易失性存储元件，非易失性存储器件，非易失性半导体器件以及制造非易失性存储元件的方法
公开(公告)号：US08445886B2
公开(公告)日：2013-05-21
申请号：US13147321
申请日：2010-02-02
申请人： Satoru Fujii , Koji Arita , Satoru Mitani , Takumi Mikawa
发明人： Satoru Fujii , Koji Arita , Satoru Mitani , Takumi Mikawa
IPC分类号： H01L29/02
CPC分类号： H01L45/146 , H01L27/2418 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/1273
摘要： A nonvolatile memory element comprises a first electrode (103); a second electrode (105); and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes (103, 105); the resistance variable layer (104) including a first tantalum oxide layer (107) comprising a first tantalum oxide and a second tantalum oxide layer (108) comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0
摘要翻译：非易失性存储元件包括第一电极（103）; 第二电极（105）; 以及设置在所述第一电极（103）和所述第二电极（105）之间的电阻变化层（104），所述电阻变化层的电阻值响应于施加在所述电极（103,105）之间的电信号而可逆地变化; 电阻变化层（104）包括包含第一钽氧化物的第一钽氧化物层（107）和包含与第一钽氧化物不同氧含量的第二氧化钽的第二钽氧化物层（108），第一钽氧化物层和第二钽氧化物层堆叠在一起，并且被配置为当第一钽氧化物表示为TaO x时满足0

94. 发明授权

US08422268B2 Current control element, memory element, and fabrication method thereof 有权
标题翻译：电流控制元件，存储元件及其制造方法
公开(公告)号：US08422268B2
公开(公告)日：2013-04-16
申请号：US12677413
申请日：2009-05-01
申请人： Koji Arita , Takumi Mikawa , Mitsuteru Iijima , Takashi Okada
发明人： Koji Arita , Takumi Mikawa , Mitsuteru Iijima , Takashi Okada
IPC分类号： G11C11/34 , G11C11/36 , H01L29/12
CPC分类号： H01L27/101 , H01L27/24 , H01L45/00
摘要： A memory element (3) arranged in matrix in a memory device and including a resistance variable element (1) which switches its electrical resistance value in response to a positive or negative electrical pulse applied thereto and retains the switched electrical resistance value; and a current control element (2) for controlling a current flowing when the electrical pulse is applied to the resistance variable element (1); wherein the current control element (2) includes a first electrode; a second electrode; and a current control layer sandwiched between the first electrode and the second electrode; and wherein the current control layer comprises SiNx, and at least one of the first electrode and the second electrode comprises α-tungsten.
摘要翻译：一种存储元件（3），其以矩阵形式布置在存储器件中，并且包括响应于施加到其上的正或负电脉冲而切换其电阻值的电阻可变元件（1），并保持所述开关电阻值; 以及电流控制元件（2），用于控制当电脉冲施加到电阻可变元件（1）时流动的电流; 其中所述电流控制元件（2）包括第一电极; 第二电极; 以及夹在所述第一电极和所述第二电极之间的电流控制层; 并且其中所述电流控制层包括SiN x，并且所述第一电极和所述第二电极中的至少一个包括α-钨。

95. 发明申请

US20120069632A1 CURRENT CONTROL, MEMORY ELEMENT, MEMORY DEVICE, AND PRODUCTION METHOD FOR CURRENT CONTROL ELEMENT 有权
标题翻译：电流控制，存储元件，存储器件和电流控制元件的生产方法
公开(公告)号：US20120069632A1
公开(公告)日：2012-03-22
申请号：US13321018
申请日：2011-03-10
申请人： Yukio Hayakawa , Koji Arita , Takumi Mikawa , Takeki Ninomiya
发明人： Yukio Hayakawa , Koji Arita , Takumi Mikawa , Takeki Ninomiya
IPC分类号： G11C11/00 , H01L21/66 , H01L47/00
CPC分类号： H01L27/2409 , H01L45/146
摘要： Provided is a current steering element that can prevent write didturb even when an electrical pulse with different polarities is applied and that can cause a large current to flow through a variable resistance element. The current steering element includes a first electrode (32), a second electrode (31), and a current steering layer (33). The current steering layer (33) comprises SiNx (where 0
摘要翻译：提供了即使当施加具有不同极性的电脉冲并且可能导致大电流流过可变电阻元件时也能够防止写入干扰的电流导向元件。当前的转向元件包括第一电极（32），第二电极（31）和电流转向层（33）。当前的转向层（33）包括添加有氢或氟的SiNx（其中0

96. 发明申请

US20110284816A1 NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY DEVICE, NONVOLATILE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储器元件，非易失性存储器件，非易失性半导体器件以及制造非易失性存储器元件的方法
公开(公告)号：US20110284816A1
公开(公告)日：2011-11-24
申请号：US13147321
申请日：2010-02-02
申请人： Satoru Fujii , Koji Arita , Satoru Mitani , Takumi Mikawa
发明人： Satoru Fujii , Koji Arita , Satoru Mitani , Takumi Mikawa
IPC分类号： H01L45/00
CPC分类号： H01L45/146 , H01L27/2418 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/1273
摘要： A nonvolatile memory element comprises a first electrode (103); a second electrode (105); and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes (103, 105); the resistance variable layer (104) including a first tantalum oxide layer (107) comprising a first tantalum oxide and a second tantalum oxide layer (108) comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0
摘要翻译：非易失性存储元件包括第一电极（103）; 第二电极（105）; 以及设置在所述第一电极（103）和所述第二电极（105）之间的电阻变化层（104），所述电阻变化层的电阻值响应于施加在所述电极（103,105）之间的电信号而可逆地变化; 电阻变化层（104）包括包含第一钽氧化物的第一钽氧化物层（107）和包含与第一钽氧化物不同氧含量的第二氧化钽的第二钽氧化物层（108），第一钽氧化物层和第二钽氧化物层堆叠在一起，并且被配置为当第一钽氧化物表示为TaO x并且x

97. 发明申请

US20110164447A1 CURRENT STEERING ELEMENT, STORAGE ELEMENT, STORAGE DEVICE, AND METHOD FOR MANUFACTURING CURRENT STEERING ELEMENT 有权
标题翻译：电流转向元件，存储元件，存储器件和制造电流转向元件的方法
公开(公告)号：US20110164447A1
公开(公告)日：2011-07-07
申请号：US13061312
申请日：2009-09-17
申请人： Koji Arita , Takumi Mikawa , Mitsuteru Iijima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Mitsuteru Iijima , Kenji Tominaga
IPC分类号： G11C11/00 , H01L45/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/15 , G11C2213/51 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0
摘要翻译：即使施加具有不同极性的电脉冲也能够防止写入干扰的发生，并且可能导致大的电流流过可变电阻元件并且可以无限制地写入数据的电流导向元件。在一种存储元件（3）中，包括：可变电阻元件（1），其电阻值响应于具有正极性和负极性的电脉冲的应用而改变并且保持改变的电阻值; 以及当施加电脉冲时转向流过可变电阻元件（1）的电流的当前操舵元件（2），所述电流操舵元件（2）包括：第一电极（32）; 第二电极（31）; 和介于所述第一电极（32）和所述第二电极（31）之间的电流转向层（33）。当电流导向层（33）包括SiNx（0

98. 发明申请

US20110114912A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20110114912A1
公开(公告)日：2011-05-19
申请号：US12867437
申请日：2009-02-09
申请人： Takumi Mikawa , Yoshio Kawashima , Koji Arita , Takeki Ninomiya
发明人： Takumi Mikawa , Yoshio Kawashima , Koji Arita , Takeki Ninomiya
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/101 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A nonvolatile semiconductor memory device (100) comprises a substrate (102) provided with a transistor (101); a first interlayer insulating layer (103) formed over the substrate to cover the transistor; a first contact plug (104) formed in the first interlayer insulating layer and electrically connected to either of a drain electrode (101a) or a source electrode (101b) of the transistor, and a second contact plug (105) formed in the first interlayer insulating layer and electrically connected to the other of the drain electrode or the source electrode of the transistor; a resistance variable layer (106) formed to cover a portion of the first contact plug; a first wire (107) formed on the resistance variable layer; and a second wire (108) formed to cover a portion of the second contact plug; an end surface of the resistance variable layer being coplanar with an end surface of the first wire.
摘要翻译：非易失性半导体存储器件（100）包括设置有晶体管（101）的衬底（102）; 形成在所述衬底上以覆盖所述晶体管的第一层间绝缘层（103）形成在所述第一层间绝缘层中并电连接到所述晶体管的漏电极（101a）或源电极（101b）中的任一个的第一接触插塞（104）和形成在所述第一中间层绝缘层并与晶体管的漏电极或源电极中的另一个电连接; 形成为覆盖所述第一接触插塞的一部分的电阻变化层（106）形成在电阻变化层上的第一线（107）以及形成为覆盖所述第二接触插塞的一部分的第二线（108）所述电阻变化层的端面与所述第一线的端面共面。

99. 发明申请

US20100061142A1 MEMORY ELEMENT AND MEMORY APPARATUS 审中-公开
标题翻译：记忆元素和记忆装置
公开(公告)号：US20100061142A1
公开(公告)日：2010-03-11
申请号：US12532552
申请日：2007-11-30
申请人： Koji Arita , Takeshi Takagi , Takumi Mikawa , Yoshio Kawashima , Zhiqiang Wei
发明人： Koji Arita , Takeshi Takagi , Takumi Mikawa , Yoshio Kawashima , Zhiqiang Wei
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/31 , G11C2213/32 , G11C2213/33 , G11C2213/34 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/147
摘要： Memory elements (3) arranged in matrix in a memory apparatus (21), each includes a resistance variable element (1) which changes an electrical resistance value in response to an applied electrical pulse having a positive polarity or a negative polarity and maintains the changed electrical resistance value, and a current suppressing element (2) for suppressing a current flowing when the electrical pulse is applied to the resistance variable element. The current suppressing element includes a first electrode, a second electrode, and a current suppressing layer provided between the first electrode and the second electrode, and the current suppressing layer comprises SiNx (x: positive actual number).
摘要翻译：在存储装置（21）中排列成矩阵的存储元件（3），每个包括电阻变化元件（1），其响应于所施加的具有正极性或负极性的电脉冲改变电阻值，并保持改变电阻值和电流抑制元件（2），用于抑制当电脉冲施加到电阻可变元件时流动的电流。电流抑制元件包括第一电极，第二电极和设置在第一电极和第二电极之间的电流抑制层，并且电流抑制层包括SiNx（x：正实数）。

100. 发明申请

US20050189654A1 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050189654A1
公开(公告)日：2005-09-01
申请号：US11063565
申请日：2005-02-24
申请人： Tetsuya Kurokawa , Koji Arita
发明人： Tetsuya Kurokawa , Koji Arita
IPC分类号： H01L23/52 , H01L21/288 , H01L21/3205 , H01L21/44 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/532 , H01L29/40
CPC分类号： H01L21/76877 , H01L21/288 , H01L21/76849 , H01L21/76879 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having interconnects is reduced in leakage current between the interconnects and improved in the TDDB characteristic. It includes an insulating interlayer 108, and interconnects 160 filled in grooves formed in the insulating interlayer, including a copper layer 124 mainly composed of copper, having the thickness smaller than the depth of the grooves, and a low-expansion metal layer 140, which is a metal layer having a heat expansion coefficient smaller than that of the copper layer, formed on the copper layer.
摘要翻译：具有互连的半导体器件减少了互连之间的漏电流并且改善了TDDB特性。它包括绝缘夹层108和填充在绝缘中间层中形成的凹槽中的互连160，其中包括厚度小于凹槽深度的铜主要由铜组成的铜层124和低膨胀金属层140，是形成在铜层上的具有小于铜层的热膨胀系数的金属层。

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