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91. 发明申请

US20070218622A1 Method of fabricating local interconnects on a silicon-germanium 3D CMOS 有权
标题翻译：在硅 - 锗3D CMOS上制造局部互连的方法
公开(公告)号：US20070218622A1
公开(公告)日：2007-09-20
申请号：US11376542
申请日：2006-03-15
申请人： Jong-Jan Lee , Paul Schuele , Sheng Hsu , Jer-Shen Maa
发明人： Jong-Jan Lee , Paul Schuele , Sheng Hsu , Jer-Shen Maa
IPC分类号： H01L21/8238
CPC分类号： H01L21/823871 , H01L21/02532 , H01L21/02667 , H01L21/28525 , H01L21/76895 , H01L27/11 , H01L27/1108
摘要： A method of fabricating local interconnect on a silicon-germanium 3D CMOS includes fabricating an active silicon CMOS device on a silicon substrate. An insulator layer is deposited on the silicon substrate and a seed window is opened through the insulator layer to the silicon substrate and to a silicon CMOS device gate. A germanium thin film is deposited on the insulator layer and into windows, forming a contact between the germanium thin film and the silicon device. The germanium thin film is encapsulated in a dielectric material. The wafer is heated at a temperature sufficient to flow the germanium, while maintaining the other layers in a solid condition. The wafer is cooled to solidify the germanium as single crystal germanium and as polycrystalline germanium, which provides local interconnects. Germanium CMOS devices may be fabricated on the single crystal germanium thin film.
摘要翻译：在硅 - 锗3D CMOS上制造局部互连的方法包括在硅衬底上制造有源硅CMOS器件。绝缘体层沉积在硅衬底上，并且晶种窗通过绝缘体层向硅衬底和硅CMOS器件栅极打开。在绝缘体层和窗口上沉积锗薄膜，形成锗薄膜和硅器件之间的接触。锗薄膜被封装在电介质材料中。在足以使锗流动的温度下加热晶片，同时将其它层保持在固体状态。将晶片冷却以将锗固化为单晶锗和作为多晶锗，其提供局部互连。可以在单晶锗薄膜上制造锗CMOS器件。

92. 发明申请

US20070218578A1 Real-time CMOS imager having stacked photodiodes fabricated on SOI wafer 失效
标题翻译：具有在SOI晶片上制造的堆叠光电二极管的实时CMOS成像器
公开(公告)号：US20070218578A1
公开(公告)日：2007-09-20
申请号：US11384110
申请日：2006-03-17
申请人： Jong-Jan Lee , Sheng Hsu , Douglas Tweet , Jer-Shen Maa
发明人： Jong-Jan Lee , Sheng Hsu , Douglas Tweet , Jer-Shen Maa
IPC分类号： H01L21/00
CPC分类号： H01L27/14647
摘要： A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
摘要翻译： CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。层叠像素传感器单元包括：制造在硅衬底上的底部光电二极管，用于感测最长波长的光; 制造在硅衬底上的中间光电二极管，用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管，用于感测较短波长的光，该光被层叠在中间和底部光电二极管的上方。像素晶体管组被制造在顶部硅层上，并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。

93. 发明申请

US20070215921A1 Method for independently detecting signals in a double-junction filterless CMOS color imager cell 失效
标题翻译：用于独立检测双结无滤膜CMOS彩色成像器单元中的信号的方法
公开(公告)号：US20070215921A1
公开(公告)日：2007-09-20
申请号：US11805003
申请日：2007-05-22
申请人： Sheng Hsu , Jong-Jan Lee
发明人： Sheng Hsu , Jong-Jan Lee
IPC分类号： H01L31/113
CPC分类号： H01L27/14647 , H01L27/14603 , H01L27/14632 , H01L27/14645 , H01L27/14683 , H01L27/14689
摘要： A double-junction complimentary metal-oxide-semiconductor (CMOS) filterless color imager cell is provided. The imager cell is fabricated from a silicon-on-insulator (SOI) substrate including a silicon (Si) substrate, a silicon dioxide insulator overlying the substrate, and a Si top layer overlying the insulator. A photodiode set is formed in the SOI substrate, including a first and second photodiode formed as a double-junction structure in the Si substrate. A third photodiode is formed in the Si top layer. A (imager sensing) transistor set is formed in the top Si layer. The transistor set is connected to the photodiode set and detects an independent output signal for each photodiode. The transistor set may be an eight-transistor (8T), a nine-transistor (9T), or an eleven-transistor (11T) cell.
摘要翻译：提供了一种双结互补金属氧化物半导体（CMOS）无滤色彩色成像单元。成像器单元由包括硅（Si）衬底，覆盖衬底的二氧化硅绝缘体和覆盖绝缘体的Si顶层的绝缘体上硅（SOI）衬底制造。在SOI衬底中形成光电二极管组，包括在Si衬底中形成为双结结构的第一和第二光电二极管。在Si顶层中形成第三光电二极管。在顶部Si层中形成A（成像器感测）晶体管组。晶体管组连接到光电二极管组，并检测每个光电二极管的独立输出信号。晶体管组可以是八晶体管（8T），九晶体管（9T）或十一晶体管（11T）单元。

94. 发明申请

US20070190681A1 Silicon-on-insulator near infrared active pixel sensor array 审中-公开
标题翻译：绝缘体上的近红外有源像素传感器阵列
公开(公告)号：US20070190681A1
公开(公告)日：2007-08-16
申请号：US11352724
申请日：2006-02-13
申请人： Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet , Sheng Hsu
发明人： Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet , Sheng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L27/14649 , H01L27/14609 , H01L27/14689
摘要： A method is provided for forming a near infrared (NIR) active pixel sensor array on a silicon-on-insulator (SOI) substrate. The method forms a first wafer comprising a high resistance first Si substrate and a moderately doped first Si layer, and forms a second wafer comprising a first silicon oxide layer and a second Si layer. The method bonds the first wafer to the second wafer, forming a SOI substrate. Then, a diode is formed with a p-n junction space charge region extending into the first Si substrate. A thin-film transistor (TFT) is formed in the second Si layer, and interconnects are formed between the TFT and the diode. For example, first Si substrate may have a resistivity of greater than 100 ohm-cm, and the first Si layer may have a dopant concentration in the range of about 1×1016 to about 5×1018 cm−3.
摘要翻译：提供了一种用于在绝缘体上硅（SOI）衬底上形成近红外（NIR）有源像素传感器阵列的方法。该方法形成包括高电阻第一Si衬底和中度掺杂的第一Si层的第一晶片，并且形成包括第一氧化硅层和第二Si层的第二晶片。该方法将第一晶片连接到第二晶片，形成SOI衬底。然后，形成具有延伸到第一Si衬底中的p-n结空间电荷区域的二极管。在第二Si层中形成薄膜晶体管（TFT），并且在TFT和二极管之间形成互连。例如，第一Si衬底可以具有大于100欧姆 - 厘米的电阻率，并且第一Si层可以具有在约1×10 16至约5×10 18范围内的掺杂剂浓度， / SUP> cm 3 -3。

95. 发明授权

US07247545B2 Fabrication of a low defect germanium film by direct wafer bonding 失效
标题翻译：通过直接晶片接合制造低缺陷锗膜
公开(公告)号：US07247545B2
公开(公告)日：2007-07-24
申请号：US10985444
申请日：2004-11-10
申请人： Jer-Shen Maa , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jer-Shen Maa , Jong-Jan Lee , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/76254 , H01L21/02052 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/0262
摘要： A method of fabricating a low defect germanium thin film includes preparing a silicon wafer for germanium deposition; forming a germanium film using a two-step CVD process, annealing the germanium thin film using a multiple cycle process; implanting hydrogen ions; depositing and smoothing a layer of tetraethylorthosilicate oxide (TEOS); preparing a counter wafer; bonding the germanium thin film to a counter wafer to form a bonded structure; annealing the bonded structure at a temperature of at least 375° C. to facilitate splitting of the bonded wafer; splitting the bonded structure to expose the germanium thin film; removing any remaining silicon from the germanium thin film surface along with a portion of the germanium thin film defect zone; and incorporating the low-defect germanium thin film into the desired end-product device.
摘要翻译：制造低缺陷锗薄膜的方法包括制备用于锗沉积的硅晶片; 使用两步CVD工艺形成锗膜，使用多循环工艺退火锗薄膜; 植入氢离子; 沉积和平滑一层四乙基原硅酸盐氧化物（TEOS）; 准备一个反晶圆; 将锗薄膜结合到对置晶片上以形成结合结构; 在至少375℃的温度下对接合结构进行退火以促进键合晶片的分裂; 分离粘结结构以暴露锗薄膜; 从锗薄膜表面除去锗薄膜缺陷区的一部分剩余的硅; 并将低缺陷锗薄膜并入期望的最终产品装置中。

96. 发明申请

US20070099329A1 Method of fabricating a germanium photo detector on a high quality germanium epitaxial overgrowth layer 有权
标题翻译：在高质量锗外延生长层上制造锗光电探测器的方法
公开(公告)号：US20070099329A1
公开(公告)日：2007-05-03
申请号：US11260955
申请日：2005-10-27
申请人： Jer-Shen Maa , Jong-Jan Lee , Sheng Hsu , Douglas Tweet
发明人： Jer-Shen Maa , Jong-Jan Lee , Sheng Hsu , Douglas Tweet
IPC分类号： H01L21/00
CPC分类号： H01L31/1808 , H01L21/02532 , H01L21/02576 , H01L21/02647 , H01L31/105 , Y02E10/50
摘要： A method of fabricating a germanium photo detector includes preparing a silicon substrate; depositing and planarizing a silicon oxide layer; forming contact holes in the silicon oxide layer which communicate with the underlying silicon substrate; growing an epitaxial germanium layer of a first type on the silicon oxide layer and in the contact holes; growing an intrinsic germanium layer on the epitaxial germanium layer and any exposed silicon oxide layer; growing a germanium layer of a second type on the intrinsic germanium layer and any exposed silicon oxide layer; depositing a layer of covering material take from the group of materials consisting of polysilicon, polysilicon-germanium and In2O3—SnO2; and etching the covering material to form individual sensing elements.
摘要翻译：制造锗光电检测器的方法包括制备硅衬底; 沉积和平坦化氧化硅层; 在氧化硅层中形成与底层硅衬底连通的接触孔; 在氧化硅层和接触孔中生长第一类型的外延锗层; 在外延锗层和任何暴露的氧化硅层上生长内在的锗层; 在内部锗层和任何暴露的氧化硅层上生长第二类型的锗层; 沉积一层覆盖材料取自由多晶硅，多晶硅 - 锗和In 2 N 3 O 3 -SnO 2 2组成的材料组。并蚀刻覆盖材料以形成单独的感测元件。

97. 发明授权

US07138309B2 Integration of biaxial tensile strained NMOS and uniaxial compressive strained PMOS on the same wafer 有权
标题翻译：将双轴拉伸应变NMOS和单轴压应变PMOS集成在同一晶圆上
公开(公告)号：US07138309B2
公开(公告)日：2006-11-21
申请号：US11039542
申请日：2005-01-19
申请人： Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet , Sheng Teng Hsu
发明人： Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet , Sheng Teng Hsu
IPC分类号： H01L21/8234 , H01L21/8238
CPC分类号： H01L29/7842 , H01L21/76254 , H01L21/823807 , H01L21/823814 , H01L21/823828 , H01L21/84 , H01L27/1203
摘要： A method of fabricating a biaxial tensile strained layer for NMOS fabrication and a uniaxial compressive strained layer for PMOS fabrication on a single wafer for use in CMOS ICs, includes preparing a silicon substrate for CMOS fabrication; depositing, patterning and etching a first and second insulating layers; removing a portion of the second insulating layer from a PMOS active area; depositing a layer of epitaxial silicon on the PMOS active area; removing a portion of the second insulating layer from an NMOS active area; growing an epitaxial silicon layer and growing an epitaxial SiGe layer on the NMOS active area; implanting H2+ ions; annealing the wafer to relax the SiGe layer; removing the remaining second insulating layer from the wafer; growing a layer of silicon; finishing a gate module; depositing a layer of SiO2 to cover the NMOS wafer; etching silicon in the PMOS active area; selectively growing a SiGe layer on the PMOS active area; wherein the silicon layer in the NMOS active area is under biaxial tensile strain, and the silicon layer in the PMOS active area is uniaxial compressive strained; and completing the CMOS device.
摘要翻译：制造用于NMOS制造的双轴拉伸应变层的方法和用于CMOS IC的单个晶片上的用于PMOS制造的单轴压缩应变层包括制备用于CMOS制造的硅衬底; 沉积，图案化和蚀刻第一和第二绝缘层; 从PMOS有源区域去除所述第二绝缘层的一部分; 在PMOS有源区上沉积一层外延硅; 从NMOS有源区域去除所述第二绝缘层的一部分; 生长外延硅层并在NMOS有源区上生长外延SiGe层; 注入H 2 O 2 + + / - +离子; 退火晶片以松弛SiGe层; 从晶片上去除剩余的第二绝缘层; 生长一层硅; 完成门模块; 沉积SiO 2层以覆盖NMOS晶片; 蚀刻PMOS有源区中的硅; 在PMOS有源区上选择性地生长SiGe层; 其中所述NMOS有源区中的硅层处于双轴拉伸应变下，并且所述PMOS有源区中的硅层是单轴压缩应变的; 并完成CMOS设备。

98. 发明申请

US20060194357A1 High-density germanium-on-insulator photodiode array 有权
标题翻译：高密度锗绝缘体上的光电二极管阵列
公开(公告)号：US20060194357A1
公开(公告)日：2006-08-31
申请号：US11240969
申请日：2005-09-30
申请人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
发明人： Sheng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas Tweet
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L31/1126 , C30B19/00 , C30B29/08 , H01L21/02381 , H01L21/02488 , H01L21/02532 , H01L21/02623 , H01L21/02639 , H01L21/30625 , H01L21/7624 , H01L27/14683 , H01L27/14689 , H01L29/16 , H01L29/78 , H01L31/105 , H01L31/1804 , H01L31/1808 , Y02E10/547
摘要： A high-density Germanium (Ge)-on-Insulator (GOI) photodiode array and corresponding fabrication method are provided. The method includes: forming an array of pixel driver nMOST devices, each device having a gate connected to a row line in a first orientation, a first source/drain (S/D) region, and a second S/D region connected to Vdd; forming a P-I-N Ge diode for each pixel as follows: forming a n+ region; forming an intrinsic Ge region overlying the n+ region; forming a p+ junction in the intrinsic Ge; and, isolating the P-I-N Ge diodes; and, forming an Indium Tin oxide (ITO) column in a second orientation, about orthogonal to the first orientation, overlying the P-I-N Ge diodes.
摘要翻译：提供了高密度锗（Ge）绝缘体（GOI）光电二极管阵列和相应的制造方法。该方法包括：形成像素驱动器nMOST器件的阵列，每个器件具有以第一取向连接到行线的栅极，第一源极/漏极（S / D）区域和连接到Vdd的第二S / D区域 ; 如下形成每个像素的P-I-N Ge二极管：形成n +区; 形成覆盖n +区域的本征Ge区域; 在本征Ge中形成p +结; 并隔离P-I-N Ge二极管; 并且以与第一取向正交的第二取向形成铟锡氧化物（ITO）柱，覆盖P-I-N Ge二极管。

99. 发明授权

US07071042B1 Method of fabricating silicon integrated circuit on glass 失效
标题翻译：在玻璃上制造硅集成电路的方法
公开(公告)号：US07071042B1
公开(公告)日：2006-07-04
申请号：US11073163
申请日：2005-03-03
申请人： Jer-Shen Maa , Sheng Teng Hsu , Jong-Jan Lee , Douglas J. Tweet
发明人： Jer-Shen Maa , Sheng Teng Hsu , Jong-Jan Lee , Douglas J. Tweet
IPC分类号： H01L21/84
CPC分类号： H01L29/66757 , H01L27/12 , H01L29/78603 , H01L29/78606
摘要： A method of fabricating a silicon integrated circuit on a glass substrate includes preparing a glass substrate; fabricating a silicon layer on the glass substrate; implanting ions into the active areas of the silicon layer; covering the silicon layer with a heat pad material; activating the ions in the silicon layer by annealing while maintaining the glass substrate at a temperature below that of the thermal stability of the glass substrate; removing the heat pad material; and completing the silicon integrated circuit.
摘要翻译：在玻璃基板上制造硅集成电路的方法包括制备玻璃基板; 在玻璃基板上制造硅层; 将离子注入硅层的有源区; 用加热垫材料覆盖硅层; 通过退火激活硅层中的离子，同时将玻璃基板保持在低于玻璃基板的热稳定性的温度; 去除热垫材料; 并完成硅集成电路。

100. 发明申请

US20060110844A1 Fabrication of thin film germanium infrared sensor by bonding to silicon wafer 有权
标题翻译：通过粘合到硅晶片制造薄膜锗红外传感器
公开(公告)号：US20060110844A1
公开(公告)日：2006-05-25
申请号：US10993533
申请日：2004-11-19
申请人： Jong-Jan Lee , Jer-Shen Maa , Sheng Hsu , Douglas Tweet
发明人： Jong-Jan Lee , Jer-Shen Maa , Sheng Hsu , Douglas Tweet
IPC分类号： H01L21/00
CPC分类号： H01L31/1804 , H01L21/187 , H01L21/76254 , H01L27/1443 , H01L31/02327 , H01L31/105 , Y02E10/547 , Y02P70/521
摘要： A method of fabricating a thin film germanium photodetector includes preparing a silicon substrate; fabricating a CMOS device on the silicon substrate; preparing a germanium substrate; preparing surfaces of each substrate for bonding; bonding the germanium substrate to the CMOS-bearing silicon substrate to form a bonded structure; removing a portion of the germanium substrate from the bonded structure; forming a PIN diode in the germanium substrate; removing a portion of the germanium layer by etching; and completing the germanium photo detector.
摘要翻译：制造薄膜锗光电探测器的方法包括制备硅衬底; 在硅衬底上制造CMOS器件; 制备锗衬底; 准备每个基板的表面以进行接合; 将锗衬底结合到具有CMOS的硅衬底以形成结合结构; 从结合结构去除锗衬底的一部分; 在锗衬底中形成PIN二极管; 通过蚀刻去除锗层的一部分; 并完成锗光电检测器。

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