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1. 发明授权

US06805280B2 Z interconnect structure and method 失效
标题翻译： Z互连结构和方法
公开(公告)号：US06805280B2
公开(公告)日：2004-10-19
申请号：US10041261
申请日：2002-01-08
申请人： Lisa J. Jimarez , Mark V. Pierson
发明人： Lisa J. Jimarez , Mark V. Pierson
IPC分类号： B23K120
CPC分类号： H05K3/462 , H05K3/321 , H05K3/3463 , H05K3/3484 , H05K3/4623 , H05K2201/096
摘要： The current invention provides a method of attaching a plurality of cores wherein a core has a via with a conductive surface to be electrically connected to a conductive surface on another core. The method provides for applying a metallurgical paste to a conductive surface, removing a portion of the flux from the paste and joining the two cores. The current invention also provides a structure including a plurality of cores wherein a metallurgical paste electrically connects a via with a conductive surface on a core to a conductive surface on another core.
摘要翻译：本发明提供了一种附接多个芯的方法，其中芯具有导电表面的通孔以电连接到另一芯上的导电表面。该方法提供将冶金膏施加到导电表面，从糊料中去除一部分助熔剂并连接两个芯。本发明还提供了一种包括多个芯的结构，其中冶金膏将通孔与芯上的导电表面电连接到另一芯上的导电表面。

2. 发明授权

US07718902B2 Z interconnect structure and method 有权
标题翻译： Z互连结构和方法
公开(公告)号：US07718902B2
公开(公告)日：2010-05-18
申请号：US10937654
申请日：2004-09-09
申请人： Lisa J. Jimarez , Mark V. Pierson
发明人： Lisa J. Jimarez , Mark V. Pierson
IPC分类号： H05K1/03
CPC分类号： H05K3/462 , H05K3/321 , H05K3/3463 , H05K3/3484 , H05K3/4623 , H05K2201/096
摘要： The current invention provides a method of attaching a plurality of cores wherein a core has a via with a conductive surface to be electrically connected to a conductive surface on another core. The method provides for applying a metallurgical paste to a conductive surface, removing a portion of the flux from the paste and joining the two cores. The current invention also provides a structure including a plurality of cores wherein a metallurgical paste electrically connects a via with a conductive surface on a core to a conductive surface on another core.
摘要翻译：本发明提供了一种附接多个芯的方法，其中芯具有导电表面的通孔以电连接到另一芯上的导电表面。该方法提供将冶金膏施加到导电表面，从糊料中去除一部分助熔剂并连接两个芯。本发明还提供了一种包括多个芯的结构，其中冶金膏将通孔与芯上的导电表面电连接到另一芯上的导电表面。

3. 发明授权

US06836015B2 Optical assemblies for transmitting and manipulating optical beams 失效
标题翻译：用于传输和操纵光束的光学组件
公开(公告)号：US06836015B2
公开(公告)日：2004-12-28
申请号：US10428960
申请日：2003-05-02
申请人： Monty M. Denneau , Dinesh Gupta , Lisa J. Jimarez , Steven Ostrander , Brenda L. Peterson , Mark V. Pierson , Eugen Schenfeld , Subhash L. Shinde
发明人： Monty M. Denneau , Dinesh Gupta , Lisa J. Jimarez , Steven Ostrander , Brenda L. Peterson , Mark V. Pierson , Eugen Schenfeld , Subhash L. Shinde
IPC分类号： H01L2334
CPC分类号： G02B6/3522 , G02B6/2817 , G02B6/3544 , G02B6/3574 , G02B6/3598 , G02B6/4214 , G02B6/4244 , G02B6/4245 , G02B6/4246 , G02B6/4249 , G02B6/4259 , G02B6/4269 , G02B6/4281 , G02B6/43 , H01L2924/0002 , H01L2924/00
摘要： Optical cubes and optical cube assemblies for directing optical beams are provided. The optical cubes are optically transparent modules that can be adapted to reflect, transmit, and/or partially reflect and transmit optical beams. The optical cubes may include bi-direction or multi-direction beam directing elements for directing optical beams. The optical cube assemblies may include flexible chip assemblies attached to optical cubes. The chip assemblies may include vertical cavity surface-emitting lasers for emitting optical beams or receivers for receiving optical beams mounted on a flexible and electrical interconnect mounting assembly.
摘要翻译：提供用于引导光束的光学立方体和光学立方体组件。光学立方体是可以适于反射，透射和/或部分地反射和透射光束的光学透明模块。光学立方体可以包括用于引导光束的双向或多方向光束引导元件。光学立方体组件可以包括附接到光学立方体的柔性芯片组件。芯片组件可以包括用于发射光束的垂直腔表面发射激光器或用于接收安装在柔性和电互连安装组件上的光束的接收器。

4. 发明授权

US06497943B1 Surface metal balancing to reduce chip carrier flexing 失效
标题翻译：表面金属平衡，减少芯片载体弯曲
公开(公告)号：US06497943B1
公开(公告)日：2002-12-24
申请号：US09503395
申请日：2000-02-14
申请人： Lisa J. Jimarez , Miguel A. Jimarez , Mark V. Pierson
发明人： Lisa J. Jimarez , Miguel A. Jimarez , Mark V. Pierson
IPC分类号： B32B300
CPC分类号： B32B15/08 , B32B15/20 , B32B17/10229 , B32B2250/40 , B32B2425/00 , H01L23/142 , H01L23/49822 , H01L2224/16225 , H01L2924/00014 , H01L2924/01322 , H05K1/0271 , H05K3/4602 , H05K2201/0949 , H05K2201/09781 , H05K2201/10674 , H05K2201/10734 , Y10T428/24917 , H01L2924/00 , H01L2224/0401
摘要： A surface metal balancing structure for a chip carrier, and an associated method of fabrication, to reduce or eliminate thermally induced chip carrier flexing. A substrate, such as a chip carrier made of organic dielectric material, is formed and includes: internal circuitization layers, a plated through hole, and outer layers comprised of an allylated polyphenylene ether. A stiffener ring for mechanically stabilizing the substrate is bonded to an outer portion, such as an outer perimeter portion, of the top surface of the substrate, in light of the soft and conformal organic material of the substrate. The top and bottom surfaces of the substrate have metal structures, such as copper pads and copper circuitization, wherein a surface area (A) multiplied by a coefficient of thermal expansion (C) is greater for the metal structure at the bottom surface than for the metal structure at the top surface. A metal pattern is adjacent to the top surface so as to make the product AC of metal structures at or near the top and bottom surfaces approximately equal. The metal pattern reduces or eliminates flexing of the substrate in an elevated temperature environment, such as during a reflow of solder that couples a semiconductor chip to the substrate.
摘要翻译：用于芯片载体的表面金属平衡结构以及相关的制造方法，以减少或消除热诱导的芯片载体弯曲。形成诸如由有机电介质材料制成的芯片载体的衬底，其包括：内部电路层，电镀通孔和由烯丙基化聚苯醚构成的外层。根据衬底的软和保形有机材料，用于机械稳定衬底的加强环被结合到衬底的顶表面的外部部分，例如外周部分。衬底的顶表面和底表面具有诸如铜焊盘和铜电路的金属结构，其中在底表面处的金属结构的表面积（A）乘以热膨胀系数（C）大于对于金属结构在顶面。金属图案与顶表面相邻，以使金属结构的产品AC在顶表面和底表面处或附近大致相等。金属图案减少或消除了在升高的温度环境中的衬底的弯曲，例如在将半导体芯片耦合到衬底的焊料的回流期间。

5. 发明授权

US06756680B2 Flip chip C4 extension structure and process 有权
公开(公告)号：US06756680B2
公开(公告)日：2004-06-29
申请号：US09782471
申请日：2001-02-12
申请人： Miguel A. Jimarez , Cynthia S. Milkovich , Mark V. Pierson
发明人： Miguel A. Jimarez , Cynthia S. Milkovich , Mark V. Pierson
IPC分类号： H01L2348
CPC分类号： H01L24/12 , B23K1/0016 , B23K2101/42 , H01L21/4853 , H01L23/49811 , H01L23/49816 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/05644 , H01L2224/05647 , H01L2224/05671 , H01L2224/10126 , H01L2224/13022 , H01L2224/13099 , H01L2224/13111 , H01L2224/16225 , H01L2224/81013 , H01L2224/81801 , H01L2224/81894 , H01L2924/00013 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01049 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/12042 , H01L2924/351 , H05K3/0032 , H05K3/3436 , H05K2201/0379 , H05K2201/10977 , H05K2201/10992 , H05K2203/0415 , H05K2203/043 , H05K2203/0465 , Y02P70/613 , H01L2924/00 , H01L2224/29099 , H01L2924/00014
摘要： An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a structure that couples a first conductive body of a first substrate to a second conductive body of a second substrate (e.g., a chip to a chip carrier; a chip carrier to a circuit card). The melting point of the first conductive body exceeds the melting point of the second conductive body. The second conductive body may include eutectic lead-tin alloy, while the first conductive body may include non-eutectic lead-tin alloy. A portion of the first conductive body is coated with, or volumetrically surrounded by, a material that is nonsolderable and nonconductive. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated portion of the first conductive body, by application of a temperature that lies between the melting points of the first and second conductive bodies.

6. 发明授权

US06699736B2 Electrical coupling of a stiffener to a chip carrier 有权
标题翻译：加强筋与芯片载体的电耦合
公开(公告)号：US06699736B2
公开(公告)日：2004-03-02
申请号：US10305643
申请日：2002-11-26
申请人： Terry J. Dornbos , Raymond A. Phillips, Jr. , Mark V. Pierson , William J. Rudik , David L. Thomas
发明人： Terry J. Dornbos , Raymond A. Phillips, Jr. , Mark V. Pierson , William J. Rudik , David L. Thomas
IPC分类号： H01L2144
CPC分类号： H05K3/0061 , H01L21/4846 , H05K3/386 , H05K3/4038 , H05K2201/0305 , H05K2201/09554 , H05K2201/10977
摘要： A method and structure for conductively coupling a metallic stiffener to a chip carrier. A substrate has a conductive pad on its surface and an adhesive layer is formed on the substrate surface. The metallic stiffener is placed on the adhesive layer, wherein the adhesive layer mechanically couples the stiffener to the substrate surface and electrically couples the stiffener to the pad. The adhesive layer is then cured such as by pressurization at elevated temperature. Embodiments of the present invention form the adhesive layer by forming an electrically conductive contact on the pad and setting a dry adhesive on the substrate, such that the electrically conductive contact is within a hole in the dry adhesive. The electrically conductive contact electrically couples the stiffener to the pad. The curing step includes curing both the dry adhesive and the electrically conductive contact, resulting in the dry adhesive adhesively coupling the stiffener to the substrate. The electrically conductive contact may include an electrically conductive adhesive or a metallic solder. Additional embodiments of the present invention form the adhesive layer by applying an electrically conductive adhesive on the substrate, wherein after the stiffener is placed on the adhesive layer, the electrically conductive adhesive mechanically and electrically couples the stiffener to the surface of the substrate.
摘要翻译：用于将金属加强件导电耦合到芯片载体的方法和结构。衬底在其表面上具有导电焊盘，并且在衬底表面上形成粘合剂层。金属加强件被放置在粘合剂层上，其中粘合剂层将加强件机械地连接到基底表面，并将加强件电耦合到垫。然后将粘合剂层固化，例如通过在升高的温度下加压。本发明的实施例通过在焊盘上形成导电触点并在基板上设置干燥的粘合剂来形成粘合剂层，使得导电触点位于干粘合剂中的孔内。导电触头将加强件电耦合到焊盘。固化步骤包括固化干燥粘合剂和导电接触，导致干燥粘合剂将加强剂粘合到基底上。导电接触可包括导电粘合剂或金属焊料。本发明的另外的实施方案通过在基底上施加导电粘合剂形成粘合剂层，其中在将加强件放置在粘合剂层上之后，导电粘合剂将加强件机械地和电耦合到基底的表面。

7. 发明授权

US06487461B1 TFT panel alignment and attachment method and apparatus 失效
标题翻译： TFT面板对准和附接方法和装置
公开(公告)号：US06487461B1
公开(公告)日：2002-11-26
申请号：US09590280
申请日：2000-06-09
申请人： Michael A. Gaynes , Allan O. Johnson , Ramesh R. Kodnani , Mark V. Pierson , Edward J. Tasillo
发明人： Michael A. Gaynes , Allan O. Johnson , Ramesh R. Kodnani , Mark V. Pierson , Edward J. Tasillo
IPC分类号： G05B1918
CPC分类号： G02F1/13336 , Y10S345/903
摘要： A method for aligning a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate is arranged on a coverplate support. A first layer of a bonding material is applied to at least one of a first side of each of the tiles and a surface of the coverplate on which the tiles are to be secured. The tiles are arranged on the coverplate, such that the first layer of bonding material is arranged between the tiles and the coverplate. The tiles are connected to an alignment apparatus. The tiles are aligned relative to each other and the coverplate. The tiles are at least partially secured to the coverplate.
摘要翻译：一种用于对准多个用于构建平板显示器的薄膜晶体管瓦片的方法。盖板安装在盖板支架上。接合材料的第一层被施加到每个瓷砖的第一侧中的至少一个以及待固定瓷砖的盖板的表面。瓦片布置在盖板上，使得第一层粘合材料布置在瓦片和盖板之间。瓦片连接到对准装置。瓷砖相对于彼此和盖板对准。瓦片至少部分地固定到盖板上。

8. 发明授权

US06173887B1 Method of making electrically conductive contacts on substrates 失效
标题翻译：在基板上制作导电触点的方法
公开(公告)号：US06173887B1
公开(公告)日：2001-01-16
申请号：US09339924
申请日：1999-06-24
申请人： Donald I. Mead , Mark V. Pierson
发明人： Donald I. Mead , Mark V. Pierson
IPC分类号： B23K2622
CPC分类号： H05K3/3484 , B23K1/0053 , B23K1/0056 , B23K2101/40 , H05K3/3494 , H05K2203/043 , H05K2203/0557 , H05K2203/107
摘要： A method of making an electrically conductive contact on a substrate by applying a layer of solder paste to a circuitized feature on a substrate and selectively heating and melting the solder paste over the feature to form a solder bump. The excess solder paste is removed. A focused energy heat source such as a laser beam or focused Infrared heats the solder paste. In another embodiment, a reflective mask with apertures may be used to allow focused heating source to selectively melt areas of the solder paste layer applied to a circuitized feature. In yet another embodiment, a reflective mask with apertures filled with solder paste is applied onto a substrate and then heated to cause localized solder melting. The mask and excess solder paste are removed.
摘要翻译：一种通过将衬底层施加到衬底上的电路化特征并在该特征上选择性地加热和熔化焊膏以形成焊料凸块来在衬底上形成导电接触的方法。去除多余的焊膏。聚焦能量热源如激光束或聚焦红外线加热焊膏。在另一个实施例中，具有孔的反射掩模可以用于允许聚焦的加热源选择性地熔化施加到电路化特征上的焊膏层的区域。在另一个实施例中，将具有填充有焊膏的孔的反射掩模施加到基板上，然后加热以引起局部焊料熔化。去除掩模和多余的焊膏。

9. 发明授权

US5969945A Electronic package assembly 失效
标题翻译：电子封装组装
公开(公告)号：US5969945A
公开(公告)日：1999-10-19
申请号：US808829
申请日：1997-02-27
申请人： Lawrence R. Cutting , Michael A. Gaynes , Eric A. Johnson , Cynthia S. Milkovich , Jeffrey S. Perkins , Mark V. Pierson , Steven E. Poetzinger , Jerzy Zalesinski
发明人： Lawrence R. Cutting , Michael A. Gaynes , Eric A. Johnson , Cynthia S. Milkovich , Jeffrey S. Perkins , Mark V. Pierson , Steven E. Poetzinger , Jerzy Zalesinski
IPC分类号： H01L21/48 , H01L23/367 , H01L23/538 , H05K1/00 , H05K1/02 , H05K1/18 , H05K3/00 , H05K3/12 , H05K3/34 , H05K7/20
CPC分类号： H05K7/20454 , H01L21/4857 , H01L21/4867 , H01L23/3672 , H01L23/5387 , H05K1/021 , H05K1/189 , H05K3/0061 , H05K3/1216 , H05K3/4691 , H01L2224/16 , H01L2924/01078 , H01L2924/01322 , H05K1/0298 , H05K1/182 , H05K2201/0154 , H05K2201/09063 , H05K2201/096 , H05K2201/09745 , H05K2201/1056 , H05K2201/2009 , H05K2203/1394 , H05K3/3415 , H05K3/3452 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144
摘要： A screen printing fixture holds a flexible circuit board having components attached to one side, to allow screening a pattern of solder paste onto the second side for subsequent attachment of components to that side. In an electronic package assembly a flexible circuit board with components is wound about a heat spreader assembly having a cavity so that at least one component on the flexible circuit board is positioned within the cavity and in thermal connection to the heat spreader.
摘要翻译：丝网印刷夹具具有安装在一侧的部件的柔性电路板，以允许将焊膏的图案屏蔽到第二侧上，以便随后将部件附接到该侧。在电子封装组件中，具有部件的柔性电路板围绕具有空腔的散热器组件缠绕，使得柔性电路板上的至少一个部件位于腔内并与散热器热连接。

10. 发明授权

US5889321A Stiffeners with improved adhesion to flexible substrates 失效
标题翻译：具有改善与柔性基材的附着力的增强剂
公开(公告)号：US5889321A
公开(公告)日：1999-03-30
申请号：US877538
申请日：1997-06-17
申请人： Thomas M. Culnane , Michael A. Gaynes , Ramesh R. Kodnani , Mark V. Pierson
发明人： Thomas M. Culnane , Michael A. Gaynes , Ramesh R. Kodnani , Mark V. Pierson
IPC分类号： H01L21/48 , H01L21/50 , H05K1/18 , H01L23/48
CPC分类号： H05K1/189 , H01L21/4803 , H01L21/50 , H01L2224/16225
摘要： A stiffener (34 or 52 or 72) includes a pathway which allows gases and fluids, such as air, to be vented from the interface between surface bonding regions (35 or 60 or 74) of the stiffener and an adhesive (38 or 56 or 80) on a flexible substrate (36 or 54 or 78). The pathway may take the form of a porous material used for the stiffener or one or more bore holes (58 or 59 or 70) formed in the stiffener. The stiffener may also include an internal cavity (76) for promoting venting of fluids and gases. By venting fluid and gases from the adhesive/stiffener interface, better adhesion between the stiffener and flexible substrate is achieved.
摘要翻译：加强件（34或52或72）包括允许气体和流体（例如空气）从加强件的表面粘合区域（35或60或74）之间的界面和粘合剂（38或56或 80）在柔性基板（36或54或78）上。该通道可以采用用于加强件的多孔材料的形式或形成在加强件中的一个或多个钻孔（58或59或70）。加强件还可以包括用于促进流体和气体排放的内腔（76）。通过从粘合剂/加强件界面排出流体和气体，实现加强件和柔性基材之间更好的粘附。

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