专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08765551B2 Non-volatile memory device having vertical structure and method of manufacturing the same 有权
标题翻译：具有垂直结构的非易失性存储器件及其制造方法
公开(公告)号：US08765551B2
公开(公告)日：2014-07-01
申请号：US13729856
申请日：2012-12-28
申请人： Jun-youl Yang , Dae-hong Eom , Byoung-moon Yoon , Kyung-hyun Kim , Se-ho Cha
发明人： Jun-youl Yang , Dae-hong Eom , Byoung-moon Yoon , Kyung-hyun Kim , Se-ho Cha
IPC分类号： H01L21/336
CPC分类号： H01L29/7827 , H01L21/28282 , H01L27/1157 , H01L27/11582 , H01L29/7926
摘要： According to an example embodiment, a non-volatile memory device includes a semiconductor layer pattern on a substrate, a plurality of gate patterns and a plurality of interlayer insulating layer patterns that are alternately stacked along a side wall of the semiconductor layer pattern, and a storage structure between the plurality of gate patterns and the semiconductor layer pattern. The semiconductor layer pattern extends in a vertical direction from the substrate. The gate patterns are recessed in a direction from a side wall of the interlayer insulating layer patterns opposing the side wall of the semiconductor layer pattern. A recessed surface of the gate patterns may be formed to be vertical to a surface of the substrate.
摘要翻译：根据示例性实施例，非易失性存储器件包括在衬底上的半导体层图案，沿着半导体层图案的侧壁交替层叠的多个栅极图案和多个层间绝缘层图案，以及多个栅极图案与半导体层图案之间的存储结构。半导体层图案从衬底沿垂直方向延伸。栅极图案沿着与半导体层图案的侧壁相对的层间绝缘层图案的侧壁的方向凹陷。栅极图案的凹陷表面可以形成为垂直于衬底的表面。

2. 发明申请

US20100178754A1 METHOD OF MANUFACTURING CMOS TRANSISTOR 审中-公开
标题翻译：制造CMOS晶体管的方法
公开(公告)号：US20100178754A1
公开(公告)日：2010-07-15
申请号：US12479112
申请日：2009-06-05
申请人： Jun-youl Yang , Byoung-moon Yoon , Cheol-woo Park , Won-jun Lee , Ki-hyung Ko
发明人： Jun-youl Yang , Byoung-moon Yoon , Cheol-woo Park , Won-jun Lee , Ki-hyung Ko
IPC分类号： H01L21/8238 , H01L21/20
CPC分类号： H01L21/823828 , H01L21/32155 , H01L21/823842 , H01L29/66545
摘要： A method of manufacturing a complementary metal-oxide semiconductor (CMOS) transistor includes: forming a semiconductor layer in which an n-MOS transistor region and a p-MOS transistor region are defined; forming an insulation layer on the semiconductor layer; forming a conductive layer on the insulation layer; forming a mask pattern exposing the n-MOS transistor region, on the conductive layer; generating a damage region in an upper portion of the conductive layer by implanting impurities in the conductive layer of the n-MOS transistor region using the mask pattern as a mask; removing the mask pattern; removing the damage region; and patterning the conductive layer to form an n-MOS transistor gate and a p-MOS transistor gate. Accordingly, gate thinning and formation of a step between the n-MOS transistor region gate and the p-MOS transistor region gate can be prevented.
摘要翻译：制造互补金属氧化物半导体（CMOS）晶体管的方法包括：形成其中限定了n-MOS晶体管区域和p-MOS晶体管区域的半导体层; 在所述半导体层上形成绝缘层; 在绝缘层上形成导电层; 在所述导电层上形成暴露所述n-MOS晶体管区域的掩模图案; 通过使用掩模图案作为掩模在n-MOS晶体管区域的导电层中注入杂质，在导电层的上部产生损伤区域; 去除掩模图案; 去除损伤区域; 以及图案化导电层以形成n-MOS晶体管栅极和p-MOS晶体管栅极。因此，可以防止栅极间化和在n-MOS晶体管区域栅极和p-MOS晶体管区域栅极之间形成台阶。

3. 发明授权

US07089947B2 Apparatus and method for cleaning a semiconductor wafer 失效
公开(公告)号：US07089947B2
公开(公告)日：2006-08-15
申请号：US10383607
申请日：2003-03-10
申请人： In-jun Yeo , Byoung-moon Yoon , Kyung-hyun Kim , Sang-rok Hah , Jeong-lim Nam , Hyun-ho Jo
发明人： In-jun Yeo , Byoung-moon Yoon , Kyung-hyun Kim , Sang-rok Hah , Jeong-lim Nam , Hyun-ho Jo
IPC分类号： B08B6/00
CPC分类号： H01L21/67051 , B08B3/12 , Y10S134/902
摘要： The apparatus for cleaning a wafer includes an energy concentration relieving member positioned at the side of the wafer. An elongated portion of a probe extends over and substantially parallel to the wafer surface. A vibrator is attached to a rear end of the probe for vibrating the probe such that the elongated portion transfers acoustic vibrational energy to the wafer and dislodges debris.

4. 发明授权

US07017597B2 Megasonic cleaning apparatus for fabricating semiconductor device 失效
公开(公告)号：US07017597B2
公开(公告)日：2006-03-28
申请号：US10217006
申请日：2002-08-12
申请人： Byoung-moon Yoon , In-jun Yeo , Sang-rok Hah , Kyung-hyun Kim , Hyun-ho Jo , Jeong-lim Nam
发明人： Byoung-moon Yoon , In-jun Yeo , Sang-rok Hah , Kyung-hyun Kim , Hyun-ho Jo , Jeong-lim Nam
IPC分类号： B09B3/10
CPC分类号： H01L21/67051 , B08B3/12 , Y10S134/902
摘要： A megasonic cleaning apparatus is provided for removing contamination particles on a wafer. The megasonic cleaning apparatus includes a piezoelectric transducer and an energy transfer rod. The piezoelectric transducer is for generating megasonic energy. The energy transfer rod installed over the wafer along a radial direction of the wafer is for distributing the megasonic energy to cleaning solution over the wafer and for vibrating the cleaning solution. The energy transfer rod is shaped and sized to uniformly distribute energy in the radial direction of the wafer through the cleaning solution to remove the contamination particles from the wafer.

5. 发明申请

US20050266647A1 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20050266647A1
公开(公告)日：2005-12-01
申请号：US11082616
申请日：2005-03-17
申请人： Tae-hyun Kim , Byoung-moon Yoon , Won-jun Lee , Yong-sun Ko , Kyung-hyun Kim
发明人： Tae-hyun Kim , Byoung-moon Yoon , Won-jun Lee , Yong-sun Ko , Kyung-hyun Kim
IPC分类号： H01L21/76 , H01L21/762 , H01L21/8247 , H01L27/115
CPC分类号： H01L27/11521 , H01L21/76224 , H01L27/115
摘要： Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.
摘要翻译：提供制造半导体器件的方法。在半导体衬底中形成沟槽。形成部分填充沟槽的第一场氧化物层。第一场氧化物层限定与沟槽相邻的衬底的有源区。沟槽的侧壁的上部向上延伸超过第一场氧化物层的表面。第一衬垫形成在第一场氧化物层上并且在沟槽的侧壁的部分上方向上延伸超过第一场氧化物层。在第一衬垫上形成第二场氧化物层并填充沟槽。每个部分去除第二场氧化物层和第一衬里以沿着衬底的有源区域暴露沟槽的顶部相邻表面和上侧壁。介电层形成在沟槽的暴露的顶部相邻表面和上侧壁上。在电介质层上形成栅电极。

6. 发明授权

US07151043B2 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07151043B2
公开(公告)日：2006-12-19
申请号：US11082616
申请日：2005-03-17
申请人： Tae-hyun Kim , Byoung-moon Yoon , Won-jun Lee , Yong-sun Ko , Kyung-hyun Kim
发明人： Tae-hyun Kim , Byoung-moon Yoon , Won-jun Lee , Yong-sun Ko , Kyung-hyun Kim
IPC分类号： H01L21/76
CPC分类号： H01L27/11521 , H01L21/76224 , H01L27/115
摘要： Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.
摘要翻译：提供制造半导体器件的方法。在半导体衬底中形成沟槽。形成部分填充沟槽的第一场氧化物层。第一场氧化物层限定与沟槽相邻的衬底的有源区。沟槽的侧壁的上部向上延伸超过第一场氧化物层的表面。第一衬垫形成在第一场氧化物层上并且在沟槽的侧壁的部分上方向上延伸超过第一场氧化物层。在第一衬垫上形成第二场氧化物层并填充沟槽。每个部分去除第二场氧化物层和第一衬里以沿着衬底的有源区域暴露沟槽的顶部相邻表面和上侧壁。介电层形成在沟槽的暴露的顶部相邻表面和上侧壁上。在电介质层上形成栅电极。

7. 发明授权

US06562727B2 Methods and compositions for removal of anti-reflective layers using fluorine containing compounds, oxidants, and water 有权
公开(公告)号：US06562727B2
公开(公告)日：2003-05-13
申请号：US09750955
申请日：2000-12-28
申请人： In-jun Yeo , Byoung-moon Yoon
发明人： In-jun Yeo , Byoung-moon Yoon
IPC分类号： H01L21302
CPC分类号： H01L21/31111 , H01L21/0276
摘要： Methods for the removal of anti-reflective layers during fabrication of integrated circuits are disclosed. In particular, an anti-reflective pattern or layer can be removed using a solution that includes a fluorine containing compound, an oxidant, and water. The fluorine containing compound in the solution can be hydrogen fluorine containing compound. Preferably, the oxidant in the solution is H2O2. The oxidant in the solution can also be ozone water. Related compositions are also disclosed.

8. 发明申请

US20100210068A1 Method of forming phase change memory device 审中-公开
标题翻译：形成相变存储器件的方法
公开(公告)号：US20100210068A1
公开(公告)日：2010-08-19
申请号：US12591772
申请日：2009-12-01
申请人： Won-jun Lee , Jin-woo Park , Byoung-moon Yoon , Cheol-woo Park
发明人： Won-jun Lee , Jin-woo Park , Byoung-moon Yoon , Cheol-woo Park
IPC分类号： H01L21/06
CPC分类号： H01L45/143 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： Provided is a method of forming a phase change memory device, the method including washing and rinsing a phase change device structure. A phase change material layer may be formed on a semiconductor substrate. The phase change material layer may be etched so as to form a phase change device structure. The semiconductor substrate on which the phase change device structure is formed may be washed using a washing solution including a reducing agent containing fluorine (F), a pH controller, a dissolution agent and water. In addition, the semiconductor substrate on which the washing is performed may be rinsed.
摘要翻译：提供一种形成相变存储器件的方法，该方法包括洗涤和漂洗相变装置结构。相变材料层可以形成在半导体衬底上。相变材料层可以被蚀刻以形成相变器件结构。可以使用包含含氟还原剂（F），pH控制剂，溶解剂和水的洗涤溶液洗涤其上形成相变器件结构的半导体衬底。此外，可以冲洗其上进行洗涤的半导体衬底。

9. 发明授权

US6117350A Adjustable selectivity etching solutions and methods of etching semiconductor devices using the same 失效
标题翻译：可选择的蚀刻溶液和使用其的半导体器件的蚀刻方法
公开(公告)号：US6117350A
公开(公告)日：2000-09-12
申请号：US684034
申请日：1996-07-19
申请人： Byoung-moon Yoon , Young-min Kwon , Yong-sun Ko , Myung-jun Park
发明人： Byoung-moon Yoon , Young-min Kwon , Yong-sun Ko , Myung-jun Park
IPC分类号： H01L21/308 , H01L21/306 , H01L21/311 , H01L21/302
CPC分类号： H01L21/02052 , H01L21/31111
摘要： Solutions useful for etching semiconductor devices comprise ammonium fluoride, hydrofluoric acid, hydrogen peroxide, and water. Processes for forming the solutions comprise mixing first solutions which comprise ammonium fluoride, hydrofluoric acid, and water with second solutions which comprise hydrogen peroxide and water to form the solutions of the invention. Methods for etching semiconductor devices comprise contacting the devices which comprise a substrate and oxide layer thereon with the solutions of the invention to etch the devices. The oxide layer, for example a damaged silicon oxide layer on a silicon substrate, is selectively etched to the substrate.
摘要翻译：用于蚀刻半导体器件的解决方案包括氟化铵，氢氟酸，过氧化氢和水。用于形成溶液的方法包括将包含氟化铵，氢氟酸和水的第一溶液与包含过氧化氢和水的第二溶液混合以形成本发明的溶液。蚀刻半导体器件的方法包括将包括衬底和氧化物层的器件与本发明的溶液接触以蚀刻器件。氧化物层，例如硅衬底上的损坏的氧化硅层被选择性地蚀刻到衬底上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式