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1. 发明授权

US07590964B1 Method and system for automatic generation of processor datapaths using instruction set architecture implementing means 有权
标题翻译：使用指令集架构实现手段自动生成处理器数据路径的方法和系统
公开(公告)号：US07590964B1
公开(公告)日：2009-09-15
申请号：US11313231
申请日：2005-12-19
申请人： Darin Stemenov Petkov , David William Goodwin , Dror Eliezer Maydan
发明人： Darin Stemenov Petkov , David William Goodwin , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/68
摘要： Systems and method for automatically generating a set of shared processor datapaths from the description of the behavior of one or more ISA operations is presented. The operations may include, for example, the standard operations of a processor necessary to support an application language such as C or C++ on the ISA. Such operations, for example, may represent a configurable processor ISA. The operations may also include one or more extension operations defined by one or more designers. Thus, a description of the behaviors of the various standard and/or extension operations that compose the ISA of an instance of a standard or configurable processor is used to automatically generate a set of shared processor datapaths that implement the behavior of those operations. In addition, certain aspects may take one or more operations as well as one or more input semantics and either re-implement the input semantics automatically, or combine the input semantics with each other or with one or more other operations to automatically generate a new set of shared processor datapaths.
摘要翻译：提出了从一个或多个ISA操作的行为的描述中自动生成一组共享处理器数据路径的系统和方法。操作可以包括例如在ISA上支持诸如C或C ++的应用程序语言所必需的处理器的标准操作。例如，这样的操作可以表示可配置处理器ISA。这些操作还可以包括由一个或多个设计者定义的一个或多个扩展操作。因此，使用构成标准或可配置处理器的实例的ISA的各种标准和/或扩展操作的行为的描述来自动生成实现这些操作的行为的一组共享处理器数据路径。此外，某些方面可以采取一个或多个操作以及一个或多个输入语义，并且自动地重新实现输入语义，或者将输入语义彼此组合或者与一个或多个其他操作组合以自动生成新集合的共享处理器数据路径。

2. 发明授权

US08156464B2 Method and system for automatic generation of processor datapaths 有权
标题翻译：用于自动生成处理器数据路径的方法和系统
公开(公告)号：US08156464B2
公开(公告)日：2012-04-10
申请号：US12111153
申请日：2008-04-28
申请人： Darin Stamenov Petkov , David William Goodwin , Dror Eliezer Maydan
发明人： Darin Stamenov Petkov , David William Goodwin , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/68
摘要： Systems and method for automatically generating a set of shared processor datapaths from the description of the behavior of one or more ISA operations is presented. The operations may include, for example, the standard operations of a processor necessary to support an application language such as C or C++ on the ISA. Such operations, for example, may represent a configurable processor ISA. The operations may also include one or more extension operations defined by one or more designers. Thus, a description of the behaviors of the various standard and/or extension operations that compose the ISA of an instance of a standard or configurable processor is used to automatically generate a set of shared processor datapaths that implement the behavior of those operations. In addition, certain aspects may take one or more operations as well as one or more input semantics and either re-implement the input semantics automatically, or combine the input semantics with each other or with one or more other operations to automatically generate a new set of shared processor datapaths.
摘要翻译：提出了从一个或多个ISA操作的行为的描述中自动生成一组共享处理器数据路径的系统和方法。操作可以包括例如在ISA上支持诸如C或C ++的应用程序语言所必需的处理器的标准操作。例如，这样的操作可以表示可配置处理器ISA。这些操作还可以包括由一个或多个设计者定义的一个或多个扩展操作。因此，使用构成标准或可配置处理器的实例的ISA的各种标准和/或扩展操作的行为的描述来自动生成实现这些操作的行为的一组共享处理器数据路径。此外，某些方面可以采取一个或多个操作以及一个或多个输入语义，并且自动地重新实现输入语义，或者将输入语义彼此组合或者与一个或多个其他操作组合以自动生成新集合的共享处理器数据路径。

3. 发明授权

US09104827B2 Method and system for automatic generation of processor datapaths 有权
标题翻译：用于自动生成处理器数据路径的方法和系统
公开(公告)号：US09104827B2
公开(公告)日：2015-08-11
申请号：US13430629
申请日：2012-03-26
申请人： Darin Stamenov Petkov , David William Goodwin , Dror Eliezer Maydan
发明人： Darin Stamenov Petkov , David William Goodwin , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/68
摘要： Systems and method for automatically generating a set of shared processor datapaths from the description of the behavior of one or more ISA operations is presented. The operations may include, for example, the standard operations of a processor necessary to support an application language such as C or C++ on the ISA. Such operations, for example, may represent a configurable processor ISA. The operations may also include one or more extension operations defined by one or more designers. Thus, a description of the behaviors of the various standard and/or extension operations that compose the ISA of an instance of a standard or configurable processor is used to automatically generate a set of shared processor datapaths that implement the behavior of those operations.
摘要翻译：提出了从一个或多个ISA操作的行为的描述中自动生成一组共享处理器数据路径的系统和方法。操作可以包括例如在ISA上支持诸如C或C ++的应用程序语言所必需的处理器的标准操作。例如，这样的操作可以表示可配置处理器ISA。这些操作还可以包括由一个或多个设计者定义的一个或多个扩展操作。因此，使用构成标准或可配置处理器的实例的ISA的各种标准和/或扩展操作的行为的描述来自动生成实现这些操作的行为的一组共享处理器数据路径。

4. 发明申请

US20120185808A1 Method and System for Automatic Generation of Processor Datapaths 有权
标题翻译：自动生成处理器数据路径的方法和系统
公开(公告)号：US20120185808A1
公开(公告)日：2012-07-19
申请号：US13430629
申请日：2012-03-26
申请人： Darin Stamenov Petkov , David William Goodwin , Dror Eliezer Maydan
发明人： Darin Stamenov Petkov , David William Goodwin , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F2217/68
摘要： Systems and method for automatically generating a set of shared processor datapaths from the description of the behavior of one or more ISA operations is presented. The operations may include, for example, the standard operations of a processor necessary to support an application language such as C or C++ on the ISA. Such operations, for example, may represent a configurable processor ISA. The operations may also include one or more extension operations defined by one or more designers. Thus, a description of the behaviors of the various standard and/or extension operations that compose the ISA of an instance of a standard or configurable processor is used to automatically generate a set of shared processor datapaths that implement the behavior of those operations.
摘要翻译：提出了从一个或多个ISA操作的行为的描述中自动生成一组共享处理器数据路径的系统和方法。操作可以包括例如在ISA上支持诸如C或C ++的应用程序语言所必需的处理器的标准操作。例如，这样的操作可以表示可配置处理器ISA。这些操作还可以包括由一个或多个设计者定义的一个或多个扩展操作。因此，使用构成标准或可配置处理器的实例的ISA的各种标准和/或扩展操作的行为的描述来自动生成实现这些操作的行为的一组共享处理器数据路径。

5. 发明授权

US08006204B2 Automated processor generation system for designing a configurable processor and method for the same 有权
标题翻译：用于设计可配置处理器的自动处理器生成系统及其方法
公开(公告)号：US08006204B2
公开(公告)日：2011-08-23
申请号：US11391773
申请日：2006-03-27
申请人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
发明人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F8/20 , G06F8/41 , G06F8/53 , G06F2217/04 , G06F2217/68
摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
摘要翻译：自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

6. 发明授权

US08924898B2 System and method of designing instruction extensions to supplement an existing processor instruction set architecture 有权
标题翻译：设计指令扩展以补充现有处理器指令集架构的系统和方法
公开(公告)号：US08924898B2
公开(公告)日：2014-12-30
申请号：US12135502
申请日：2008-06-09
申请人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
发明人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F8/20 , G06F8/41 , G06F8/53 , G06F2217/04 , G06F2217/68
摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
摘要翻译：自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

7. 发明授权

US08875068B2 System and method of customizing an existing processor design having an existing processor instruction set architecture with instruction extensions 有权
标题翻译：定制具有现有处理器指令集体系结构和现有处理器设计的系统和方法，具有指令扩展
公开(公告)号：US08875068B2
公开(公告)日：2014-10-28
申请号：US12135563
申请日：2008-06-09
申请人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
发明人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F8/20 , G06F8/41 , G06F8/53 , G06F2217/04 , G06F2217/68
摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
摘要翻译：自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

8. 发明授权

US07020854B2 Automated processor generation system for designing a configurable processor and method for the same 有权
公开(公告)号：US07020854B2
公开(公告)日：2006-03-28
申请号：US10884590
申请日：2004-07-02
申请人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
发明人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
IPC分类号： G06F17/50 , G06F15/00
CPC分类号： G06F17/5045 , G06F8/20 , G06F8/41 , G06F8/53 , G06F2217/04 , G06F2217/68
摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

9. 发明申请

US20080244471A1 SYSTEM AND METHOD OF CUSTOMIZING AN EXISTING PROCESSOR DESIGN HAVING AN EXISTING PROCESSOR INSTRUCTION SET ARCHITECTURE WITH INSTRUCTION EXTENSIONS 有权
标题翻译：现有处理器设计的系统和方法，具有指令扩展的现有处理器指令集架构
公开(公告)号：US20080244471A1
公开(公告)日：2008-10-02
申请号：US12135563
申请日：2008-06-09
申请人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
发明人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F8/20 , G06F8/41 , G06F8/53 , G06F2217/04 , G06F2217/68
摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
摘要翻译：自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

10. 发明授权

US06477683B1 Automated processor generation system for designing a configurable processor and method for the same 有权
标题翻译：用于设计可配置处理器的自动处理器生成系统及其方法
公开(公告)号：US06477683B1
公开(公告)日：2002-11-05
申请号：US09246047
申请日：1999-02-05
申请人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
发明人： Earl A. Killian , Ricardo E. Gonzalez , Ashish B. Dixit , Monica Lam , Walter D. Lichtenstein , Christopher Rowen , John C. Ruttenberg , Robert P. Wilson , Albert Ren-Rui Wang , Dror Eliezer Maydan
IPC分类号： G06F1750
CPC分类号： G06F17/5045 , G06F8/20 , G06F8/41 , G06F8/53 , G06F2217/04 , G06F2217/68
摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.
摘要翻译：自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

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