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    • 2. 发明授权
    • Method for manufacturing an energy storage device and structure therefor
    • 储能装置的制造方法及其结构
    • US08629488B2
    • 2014-01-14
    • US12108361
    • 2008-04-23
    • Sallie HoseDerryl AllmanPeter A. BurkePonce Saopraseuth
    • Sallie HoseDerryl AllmanPeter A. BurkePonce Saopraseuth
    • G11C11/00
    • H01L28/75
    • An energy storage device such as a metal-insulator-metal capacitor and a method for manufacturing the energy storage device. The metal-insulator-metal capacitor includes an insulating material positioned between a bottom electrode or bottom plate and a top electrode or top plate. The surface area of the bottom electrode is greater than the surface area of the insulating material and the surface area of the insulating material is greater than the surface area of the top electrode. The top electrode and the insulating layer have edges that are laterally within and spaced apart from edges of the bottom electrode. A protective layer covers the top electrode, the edges of the top electrode, and the portions of the insulating layer that are uncovered by the top electrode. The protective layer serves as an etch mask during the formation of the bottom electrode.
    • 诸如金属 - 绝缘体 - 金属电容器的能量存储装置和用于制造储能装置的方法。 金属 - 绝缘体 - 金属电容器包括位于底部电极或底板与顶部电极或顶板之间的绝缘材料。 底部电极的表面积大于绝缘材料的表面积,并且绝缘材料的表面积大于顶部电极的表面积。 顶部电极和绝缘层具有横向在底部电极的边缘内并与其间隔开的边缘。 保护层覆盖顶部电极,顶部电极的边缘和绝缘层的未被顶部电极覆盖的部分。 在形成底部电极期间,保护层用作蚀刻掩模。
    • 4. 发明授权
    • Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal
    • 用于在集成电路结构的低k碳掺杂氧化硅介电材料上去除抗蚀剂掩模的工艺,以及从通孔蚀刻和抗蚀剂掩模去除中除去残余物
    • US06562700B1
    • 2003-05-13
    • US09873043
    • 2001-05-31
    • Sam GuDavid PritchardDerryl D. J. AllmanPonce SaopraseuthSteve Reder
    • Sam GuDavid PritchardDerryl D. J. AllmanPonce SaopraseuthSteve Reder
    • H01L21322
    • H01L21/31138H01L21/02052H01L21/31633
    • A process is disclosed for removing a photoresist mask used to form openings in an underlying layer of low k carbon-doped silicon oxide dielectric material of an integrated circuit structure formed on a semiconductor substrate, which comprises exposing the photoresist mask in a plasma reactor to a plasma formed using a reducing gas until the photoresist mask is removed. In a preferred embodiment the reducing gas is selected from the group consisting of NH3, H2, forming gas, and a mixture of NH3 and H2. The process further provides for the removal of etch residues by first contacting the low k carbon-doped silicon oxide dielectric material with a solvent capable of dissolving and/or removing etch residues left from forming the openings in the low k dielectric material, and from removing the photoresist mask used to form the openings in the low k carbon-doped silicon oxide dielectric material; and then annealing the substrate in an annealing chamber at a temperature sufficient to remove liquid and gaseous byproducts from the low k carbon-doped silicon oxide dielectric material.
    • 公开了一种用于去除在半导体衬底上形成的集成电路结构的低k碳掺杂氧化硅介电材料的下层中形成开口的光刻胶掩模的方法,其包括将等离子体反应器中的光刻胶掩模曝光于 使用还原气体形成的等离子体直到除去光致抗蚀剂掩模。 在优选的实施方案中,还原气体选自NH 3,H 2,形成气体和NH 3和H 2的混合物。 该方法还通过首先使低k碳掺杂的氧化硅介电材料与能够溶解和/或去除在低k电介质材料中形成开口所留下的蚀刻残留物的溶剂和除去 用于在低k碳掺杂氧化硅电介质材料中形成开口的光致抗蚀剂掩模; 然后在退火室中以足以从低k碳掺杂的氧化硅介电材料除去液体和气体副产物的温度退火衬底。
    • 5. 发明申请
    • METHOD FOR MANUFACTURING AN ENERGY STORAGE DEVICE AND STRUCTURE THEREFOR
    • 制造能源储存装置及其结构的方法
    • US20090267187A1
    • 2009-10-29
    • US12108361
    • 2008-04-23
    • Sallie HoseDerryl AllmanPeter A. BurkePonce Saopraseuth
    • Sallie HoseDerryl AllmanPeter A. BurkePonce Saopraseuth
    • H01L29/92H01L21/02
    • H01L28/75
    • An energy storage device such as a metal-insulator-metal capacitor and a method for manufacturing the energy storage device. The metal-insulator-metal capacitor includes an insulating material positioned between a bottom electrode or bottom plate and a top electrode or top plate. The surface area of the bottom electrode is greater than the surface area of the insulating material and the surface area of the insulating material is greater than the surface area of the top electrode. The top electrode and the insulating layer have edges that are laterally within and spaced apart from edges of the bottom electrode. A protective layer covers the top electrode, the edges of the top electrode, and the portions of the insulating layer that are uncovered by the top electrode. The protective layer serves as an etch mask during the formation of the bottom electrode.
    • 诸如金属 - 绝缘体 - 金属电容器的能量存储装置和用于制造储能装置的方法。 金属 - 绝缘体 - 金属电容器包括位于底部电极或底板与顶部电极或顶板之间的绝缘材料。 底部电极的表面积大于绝缘材料的表面积,并且绝缘材料的表面积大于顶部电极的表面积。 顶部电极和绝缘层具有横向在底部电极的边缘内并与其间隔开的边缘。 保护层覆盖顶部电极,顶部电极的边缘和绝缘层的未被顶部电极覆盖的部分。 在形成底部电极期间,保护层用作蚀刻掩模。
    • 6. 发明授权
    • Process for forming a low k carbon-doped silicon oxide dielectric material on an integrated circuit structure
    • 在集成电路结构上形成低k碳掺杂氧化硅介电材料的工艺
    • US06583026B1
    • 2003-06-24
    • US09872058
    • 2001-05-31
    • Derryl D. J. AllmanPonce SaopraseuthHemanshu D. Bhatt
    • Derryl D. J. AllmanPonce SaopraseuthHemanshu D. Bhatt
    • H01L2176
    • H01L21/02126C23C16/401H01L21/02211H01L21/0228H01L21/02304H01L21/0234H01L21/31633
    • A process for forming a low k carbon-doped silicon oxide dielectric material (lkc-dsodm) on an integrated circuit structure is characterized by improved planarity and good gap fill in high aspect ratio regions of the integrated circuit structure, as well as improved film strength and adherence, and less byproducts trapped in the film. The process comprises: depositing a plurality of layers of lkc-dsodm on an integrated circuit structure in a reactor; and pausing after depositing each layer of lkc-dsodm and before depositing a further layer of lkc-dsodm. The process can further include first forming a base or barrier layer of a silicon-rich and nitrogen-rich dielectric material over the integrated circuit structure, plasma etching the upper surface of the barrier layer to facilitate adhesion of the subsequently deposited lkc-dsodm to the barrier layer, and then, before depositing the first layer of lkc-dsodm, cooling the etched barrier layer down to within 10° C. or less of the subsequent deposition temperature used for formation of the film of lkc-dsodm. In another aspect of the invention the pausing step further includes, before deposition of the next layer of lkc-dsodm, flowing a source of non-reactive gas over the surface of the newly deposited layer of lkc-dsodm to facilitate outgassing and removal of byproducts resulting from the preceding formation and deposition of lkc-dsodm.
    • 在集成电路结构上形成低k碳掺杂氧化硅电介质材料(lkc-dsodm)的方法的特征在于集成电路结构的高纵横比区域中的平坦度和良好的间隙填充,以及改进的膜强度 和坚持,更少的副产品被困在电影中。 该方法包括:在反应器中的集成电路结构上沉积多层lkc-dsodm; 并且在沉积每层lkc-dsodm之后并在沉积另外一层lkc-dsodm之前暂停。 该方法还可以包括首先在集成电路结构上形成富硅和富氮介电材料的基底或阻挡层,等离子体蚀刻阻挡层的上表面,以便于随后沉积的lkc-dsodm粘附到 然后在沉积第一层lkc-dsodm之前,将蚀刻的阻挡层冷却到用于形成lkc-dsodm膜的后续沉积温度的10℃以内。 在本发明的另一方面,暂停步骤还包括在沉积下一层lkc-dsodm之前,将非反应性气体源流过新沉积的lkc-dsodm层的表面以便于除气和除去副产物 由于以前的lkc-dsodm的形成和沉积而产生。