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    • 3. 发明公开
    • 3차원 그래픽 기하변환 파이프라인 시스템, 기하변환 처리 시스템 및 레지스터 파일 구조
    • 无三维图形的几何变换管道结构,几何变换处理器及其相关的寄存器文件架构
    • KR1020060135104A
    • 2006-12-29
    • KR1020050054768
    • 2005-06-24
    • 이광엽한국전자통신연구원
    • 이광엽오민석김재우
    • G06T17/10
    • G06T15/005G06F15/8007G06F17/16G06T15/10G06T15/50
    • A geometry transformation pipeline architecture without stall for 3-D graphics, a geometry transformation processor, and a register file architecture thereof are provided to carry out geometry transformation and shading process by carrying out minimum steps for each pipeline and operate two peak data, thereby removing stall of the pipelines caused by dependency of data and reducing processing time delay. A geometry transformation pipeline architecture without stall for 3-D graphics includes an adding operation pipeline(ADDV) for adding two input values, a multiplying operation pipeline(MULV) for multiplying two input values, a comparison operation pipeline(CMPV) for comparing size of the two input values, a load operation pipeline for loading data from a memory, a storing operation pipeline(STRV) for storing data to the memory, a shift operation pipeline(MOVV) for shifting data between registers, a reciprocal number operation pipeline(CONV) for calculating reciprocal number for the input values, and a reciprocal square root operating pipeline(RSQ) for calculating reciprocal square roots for the input values. The reciprocal number operation pipeline and the reciprocal square root operating pipeline are respectively formed of four execution steps and the others are respectively formed of two execution steps.
    • 提供了三维图形,几何变换处理器及其寄存器文件架构的几何变换流水线架构,用于通过对每个流水线执行最小步骤来执行几何变换和阴影处理,并操作两个峰值数据,从而去除 由数据依赖导致管道停顿,缩短处理时间延迟。 对于3-D图形的几何变换流水线架构不包括用于添加两个输入值的加法运算流水线(ADDV),用于乘以两个输入值的乘法运算流水线(MULV),比较运算流水线(CMPV) 两个输入值,用于从存储器加载数据的加载操作流水线,用于将数据存储到存储器的存储操作流水线(STRV),用于在寄存器之间移位数据的移位操作流水线(MOVV),倒数操作流水线 ),用于计算输入值的倒数,以及用于计算输入值的倒数平方根的倒数平方根操作流水线(RSQ)。 倒数操作流水线和倒数平方根操作流水线分别由四个执行步骤形成,其他分别由两个执行步骤构成。
    • 4. 发明公开
    • 암7 마이크로 프로세서의 나눗셈 실행장치
    • ARM7微处理器的部署执行装置
    • KR1020050021589A
    • 2005-03-07
    • KR1020030056065
    • 2003-08-13
    • 이광엽오민석
    • 이광엽오민석
    • G06F7/52
    • PURPOSE: A division executing device for an ARM(Advanced RISC Machine)7 microprocessor on an SOC(System-On-Chip) is provided to increase processing speed by processing division, as a division operation instruction is defined on the SOC, and reduce a hardware size by applying a non-restoring division algorithm to perform the division operation instruction. CONSTITUTION: The first MUX(Multiplexer)(12) and the second MUX(13) are connected to an input terminal of an ALU(Arithmetic Logic Unit)(14). A 64-bit register(15) is connected to an output terminal of the ALU. The 64-bit register is divided into upper 32 bits and lower 32 bits. The upper 32 bits store remainder and the lower 32 bits store a quotient. The output terminal of the 64-bit register is connected to the third MUX(16). A divisor is inputted to the first MUX through an A-bus and a dividend is inputted to the second MUX through the B-bus. As the first latch(10) and the second latch(11) are connected to the A/B-bus, a sign of the divisor and the dividend is judged/stored by using the top bit value of the divisor and the dividend inputted through the A/B-bus.
    • 目的:提供一种用于SOC(片上系统)的ARM(高级RISC机)7微处理器的分割执行装置,以便在SOC上定义分割操作指令,通过处理除法来提高处理速度,并减少 通过应用非恢复分割算法来执行分割操作指令来实现硬件大小。 构成:第一MUX(多路复用器)(12)和第二MUX(13)连接到ALU(算术逻辑单元)(14)的输入端。 64位寄存器(15)连接到ALU的输出端子。 64位寄存器分为高32位和低32位。 高32位存储余数,低32位存储商。 64位寄存器的输出端连接到第三MUX(16)。 除数通过A总线输入到第一MUX,并且通过B总线将余数输入到第二MUX。 当第一锁存器(10)和第二锁存器(11)连接到A / B总线时,通过使用除数的顶部位值和通过输入的被除数来判断/存储除数和被除数的符号 A / B总线。
    • 6. 发明授权
    • 타원곡선암호화의 유한체 역원과 승산 장치 및 그 방법
    • 타원곡선암호화의유한체역원과승산장치및그방
    • KR100416291B1
    • 2004-01-31
    • KR1020010031869
    • 2001-06-08
    • 이광엽
    • 이광엽
    • G06F7/52
    • PURPOSE: A finite field inverse and multiplication operating system and method is provided to allow the same storage and gates to be shared by a circuit for finding inverse of a finite field polynomial and a circuit for operating a multiplication of a finite field polynomial. CONSTITUTION: The system comprises a register Z(11), a register A(12), a register B(13), a register D(14), a register F(15), a register G(16), a register R(17), a register K(18), a controller(19), four multiplexors(101-104), and a finite field adder(105). The register Z(11) stores a binary value expressing an input polynomial, necessary for an inverse operation, with vectors on a polynomial basis. The register A(12) stores a irreducible polynomial and exchanges data with the register Z(11) while an inverse operation is being progressed. The register B(13) is a temporary storage register and exchanges data with the register D(14) while an inverse operation is being processed. The register D(14) stores an output polynomial which is an inverse of the input polynomial. The register F(15) calculates a degree of the polynomial stored at the register Z(11), and transmits the calculated degree to the register G(16), which is used at a determination of a condition in an inverse operation. The register R(17) performs a modular reduction of a polynomial for reducing the degree of the polynomial made in the process of the inverse operation less than that of the irreducible polynomial. The register K(18) stores a degree necessary for a reduction of a polynomial. The controller(19) generates control signals for performing an inverse operation by use of each register and multiplexor.
    • 目的:提供一种有限域逆和倍增操作系统和方法,以允许用于找到有限域多项式的逆的电路和用于操作有限域多项式的乘法的电路共享相同的存储和门。 结构:该系统包括寄存器Z(11),寄存器A(12),寄存器B(13),寄存器D(14),寄存器F(15),寄存器G(16),寄存器R (17),寄存器K(18),控制器(19),四个多路复用器(101-104)和有限域加法器(105)。 寄存器Z(11)以多项式为基础存储表示输入多项式的二进制值,该输入多项式对于逆运算是必需的。 寄存器A(12)存储不可约多项式,并在进行反向操作时与寄存器Z(11)交换数据。 寄存器B(13)是一个临时存储寄存器,并在处理反向操作时与寄存器D(14)交换数据。 寄存器D(14)存储与输入多项式相反的输出多项式。 寄存器F(15)计算存储在寄存器Z(11)中的多项式的次数,并且将计算出的次数发送到寄存器G(16),寄存器G(16)用于在逆操作中确定条件。 寄存器R(17)执行多项式的模减少以减少在逆操作过程中产生的多项式的次数小于不可约多项式的次数。 寄存器K(18)存储减少多项式所需的程度。 控制器(19)通过使用每个寄存器和多路复用器产生用于执行反向操作的控制信号。
    • 9. 发明授权
    • 도로용 측구 구조체
    • 路边结构
    • KR101721828B1
    • 2017-04-04
    • KR1020150103441
    • 2015-07-22
    • 장성훈이병록장호혁장호석이광엽김상탁
    • 장성훈이병록
    • E01C11/22
    • Y02A10/395Y02A30/68
    • 본발명은노면또는그 인접사면의물을집수하여배수하는도로용측구구조체에관한것으로서, 더상세하게는일측으로경계석이안착되는안착부및 안착부의옆으로안착된경계석을지지하는지지부가구비되고, 노면상의물이경계석방향으로집수되도록상측면이테이퍼진형태로구성되며, 상기안착부의옆으로테이퍼진형태로집수된물이일괄적으로배수되는배수홈이형성되는측구로이루어지며, 상기측구는길이가가변되어설치되거나다수개가연결되며, 상기측구에그레이팅이간격을두고구비됨을특징으로하는도로용측구구조체를제공한다. 따라서측구에형성되는배수홈및 배수홈에구비되는배수체로하여금별도의배수설비없이도도로의물이신속히배수하여장마또는홍수와같이노면수가많이유입되는날씨에도보행자의통행이원활히이루어지면서도물의침수현상으로인한노면에서발생되는악취와더불어노면의수막현상을차단하는효과를발휘한다.
    • 本发明是在相邻的表面上的路面或相关于水收集的道路阴沟结构和排水,并且更具体地设置有用于支撑安装在侧安装部的边界石额外的支撑和安装部分被边界石安置一个 中,路面上的水由一个二进制两相侧,使得收集的边界石方向锥形形状,做了一个沟槽,其排水槽是一个集水为锥形的,以一侧的底座部分是散装形式的倍数,所述檐槽的二进制形状的 并且光栅彼此间隔开一定间隔。 因此浸入导致在排水槽和形成在所述沟槽图排水槽提供二倍体作为由在天气行人,道路表面是多涌入作为雨季或通过无设施及时排出路的水淹分离漏极顺利水 除了由于发展而在路面上产生的气味之外,还可以阻止路面上的水膜现象。
    • 10. 发明公开
    • 도로용 측구 구조체
    • GUTTER
    • KR1020170011207A
    • 2017-02-02
    • KR1020150103441
    • 2015-07-22
    • 장성훈이병록장호혁장호석이광엽김상탁
    • 장성훈이병록
    • E01C11/22
    • Y02A10/395Y02A30/68
    • 본발명은노면또는그 인접사면의물을집수하여배수하는도로용측구구조체에관한것으로서, 더상세하게는일측으로경계석이안착되는안착부및 안착부의옆으로안착된경계석을지지하는지지부가구비되고, 노면상의물이경계석방향으로집수되도록상측면이테이퍼진형태로구성되며, 상기안착부의옆으로테이퍼진형태로집수된물이일괄적으로배수되는배수홈이형성되는측구로이루어지며, 상기측구는길이가가변되어설치되거나다수개가연결되며, 상기측구에그레이팅이간격을두고구비됨을특징으로하는도로용측구구조체를제공한다. 따라서측구에형성되는배수홈및 배수홈에구비되는배수체로하여금별도의배수설비없이도도로의물이신속히배수하여장마또는홍수와같이노면수가많이유입되는날씨에도보행자의통행이원활히이루어지면서도물의침수현상으로인한노면에서발생되는악취와더불어노면의수막현상을차단하는효과를발휘한다.