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    • 1. 发明公开
    • 멀티프로세서 시스템
    • 多处理器系统
    • KR1020080016422A
    • 2008-02-21
    • KR1020070020134
    • 2007-02-28
    • 후지쯔 가부시끼가이샤
    • 우에키도시카즈이시즈카다카하루하타이다마코토야마모토다카시호소이유카오와키,다케시이토우,다이스케
    • G06F15/16G06F9/46
    • G06F12/0813G06F12/1072
    • A multiprocessor system is provided to reduce memory read latency in a local node by reducing data/address latency occurring in memory read which is executed in each system board forming an SMP(Symmetric Multiple Processors) structure assigning tasks to all CPUs symmetrically. A determiner determines whether a read command issued from a CPU(1) and inputted to a global address crossbar(8) is the read command for a memory(2) installed in the system board. An executor executes the read command before global access based on the address notified from the global address crossbar when the inputted read command is the read command for the internal memory. A setting part sets the data read from the memory to be queued to a data queue formed in a CPU side without queuing the read data to the data queue formed in a memory side. An orderer orders the data queue formed in the CPU side to discard or transmit the data to the CPU based on notification received from the global address crossbar.
    • 提供多处理器系统以通过减少在每个系统板中执行的存储器读取中发生的数据/地址等待时间来减少本地节点中的存储器读延迟,形成对称地向所有CPU分配任务的SMP(对称多处理器)结构。 确定器确定从CPU(1)发出并输入到全局地址交叉开关(8)的读取命令是否是安装在系统板中的存储器(2)的读取命令。 当输入的读取命令是内部存储器的读取命令时,执行器根据从全局地址横杠通知的地址在全局访问之前执行读取命令。 设置部分将从待排队的存储器读取的数据设置为在CPU侧形成的数据队列,而不将读取的数据排队到形成在存储器侧的数据队列。 订货人根据从全球地址交叉栏收到的通知命令CPU侧形成的数据队列将数据丢弃或发送到CPU。