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    • 2. 发明公开
    • 표시판, 표시 장치 및 이의 제조 방법
    • 显示面板,显示设备及其制造方法
    • KR1020080008734A
    • 2008-01-24
    • KR1020060068334
    • 2006-07-21
    • 삼성전자주식회사
    • 정창오김상갑석준형김홍균황인선오민석진홍기정유광최승하이희국김시열
    • G02F1/1343G02F1/1335
    • G02F1/133528G02F1/134336G02F2001/133548H01L27/12
    • A display panel, a display device and a manufacturing method thereof are provided to use an electrode of the display device as a polarizing panel, thereby removing the polarizing panel arranged at the rear of the display panel and simplifying the processes. A gate line is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate line. A data line is crossed with the gate line and includes a source electrode. A drain electrode(175) is located oppositely to the source electrode. Plural line patterns(193) are electrically connected with the drain electrode and polarizes the incidence light beam. The distance of line patterns is below 200 nanometer. The width of the line pattern is below 100 nanometer. An alignment layer is formed on the electrode. The electrode includes at least one among Al, Ag, Cu, Mo, Cr, Ta, Ti or alloy thereof. The gate insulating layer includes an opened pixel area.
    • 提供显示面板,显示装置及其制造方法以使用显示装置的电极作为偏振面板,从而去除布置在显示面板后部的偏振片,并简化了工艺。 在基板上形成栅极线。 栅极绝缘层形成在衬底上以覆盖栅极线。 数据线与栅极线交叉并且包括源电极。 漏电极(175)位于与源电极相对的位置。 多个线图案(193)与漏电极电连接并使入射光束偏振。 线条的距离低于200纳米。 线图案的宽度低于100纳米。 在电极上形成取向层。 电极包括Al,Ag,Cu,Mo,Cr,Ta,Ti或其合金中的至少一种。 栅极绝缘层包括开放的像素区域。
    • 3. 发明公开
    • 디스플레이장치의 제조방법
    • 显示装置的制造方法
    • KR1020070062858A
    • 2007-06-18
    • KR1020050122750
    • 2005-12-13
    • 삼성전자주식회사
    • 정호용김시열이우근
    • H01L29/786
    • A method for manufacturing a display device is provided to minimize the generation of a ghost image due to the variation of a light leak current. A display panel is prepared, wherein the display panel includes a TFT with a gate electrode, a data electrode and a semiconductor layer. A data voltage is applied to the data electrode and a DC voltage is applied to the gate electrode(S50). The data voltage oscillates in a set reference level range. The DC voltage is different from the data voltage. The difference between the DC voltage and the data voltage is in a range of 20 to 30 V. The DC voltage is in a range of 25 to -30 V.
    • 提供一种用于制造显示装置的方法,以使由于漏光电流的变化引起的重影图像的产生最小化。 准备显示面板,其中显示面板包括具有栅电极的TFT,数据电极和半导体层。 将数据电压施加到数据电极,并向栅电极施加直流电压(S50)。 数据电压在设定的参考电平范围内振荡。 直流电压与数据电压不同。 直流电压与数据电压的差在20〜30V的范围内。直流电压为25〜-30V的范围。
    • 7. 发明公开
    • 박막 트랜지스터 표시판, 그 제조 방법 및 이를 포함하는액정 표시 장치
    • 薄膜晶体管阵列,其制造方法和包括其的液晶显示器
    • KR1020060131018A
    • 2006-12-20
    • KR1020050050842
    • 2005-06-14
    • 삼성전자주식회사
    • 이영욱김시열김성진
    • G02F1/136
    • G02F1/136286G02F2001/136231G02F2001/13625G02F2001/136295
    • A thin film transistor substrate, a method for manufacturing the same, and an LCD comprising the same are provided to widen the viewing angle and lower the driving voltage, by disposing a pixel electrode to overlap a common electrode above a substrate. A gate line having a gate electrode(124) is formed on a substrate(110), wherein the gate line is composed of three conductive layers. A common electrode(131) of a transparent conductor is formed on the substrate. A gate insulating layer(140) is formed on the gate line and the common electrode. A semiconductor layer(151) is formed on the gate insulating layer. A data line(161) having a source electrode(163) and a drain electrode facing the source electrode are formed on the semiconductor layer. A plurality of pixel electrodes(191) are connected to the drain electrode and overlap the common electrode. In the gate line, a first conductive layer is formed of the same material as the common electrode, a second conductive layer is formed of a fire-resistant metal material, and a third conductive layer is formed of aluminum.
    • 提供薄膜晶体管基板及其制造方法以及包括该薄膜晶体管的薄膜晶体管基板的LCD以及包含该薄膜晶体管基板的液晶显示器,通过设置与基板上方的公共电极重叠的像素电极来扩大视角并降低驱动电压。 具有栅极(124)的栅极线形成在基板(110)上,其中栅极线由三个导电层构成。 在基板上形成透明导体的公共电极(131)。 栅极绝缘层(140)形成在栅极线和公共电极上。 在栅极绝缘层上形成半导体层(151)。 在半导体层上形成具有源电极(163)和面对源电极的漏电极的数据线(161)。 多个像素电极(191)连接到漏电极并与公共电极重叠。 在栅极线中,第一导电层由与公共电极相同的材料形成,第二导电层由耐火金属材料形成,第三导电层由铝形成。
    • 8. 发明公开
    • 박막 트랜지스터 표시판, 그 제조 방법 및 이를 포함하는액정 표시 장치
    • 薄膜晶体管阵列,其制造方法和包括其的液晶显示器
    • KR1020060123997A
    • 2006-12-05
    • KR1020050045686
    • 2005-05-30
    • 삼성전자주식회사
    • 이영욱김시열김성진
    • G02F1/136
    • G02F1/1362G02F1/136286G02F2001/136231G02F2201/12
    • A thin film transistor substrate, a method for manufacturing the same, and an LCD comprising the same are provided to reduce the number of manufacturing processes, by forming a semiconductor pattern, an ohmic contact pattern, and a data line using a single slit mask. A gate line having a gate electrode(124) is formed on a substrate(110). A common electrode(131) of a transparent conductor is formed on the substrate. A gate insulating layer(140), a semiconductor layer(150), and a conductive layer(170) are sequentially deposited on the gate line and the common electrode. The conductive layer and the semiconductor layer are etched to form a data line having a source electrode, a drain electrode facing the source electrode, and a semiconductor pattern below the data line and the drain electrode. A pixel electrode, which is connected to the drain electrode, is formed. The pixel electrode overlaps a portion of the common electrode.
    • 提供薄膜晶体管基板及其制造方法以及包括该薄膜晶体管基板的LCD,通过使用单个狭缝掩模形成半导体图案,欧姆接触图案和数据线来减少制造工艺的数量。 具有栅极(124)的栅极线形成在基板(110)上。 在基板上形成透明导体的公共电极(131)。 栅极绝缘层(140),半导体层(150)和导电层(170)依次淀积在栅极线和公共电极上。 蚀刻导电层和半导体层以形成具有源电极,面对源电极的漏电极和数据线和漏电极下方的半导体图案的数据线。 形成与漏电极连接的像素电极。 像素电极与公共电极的一部分重叠。
    • 9. 发明公开
    • 박막 트랜지스터 기판의 제조 방법
    • 薄膜晶体管基板的制作方法
    • KR1020060114995A
    • 2006-11-08
    • KR1020050037250
    • 2005-05-03
    • 삼성전자주식회사
    • 김상갑김시열최희환오민석진홍기
    • G02F1/136
    • G02F1/1362G02F1/136286G02F2001/136231G02F2001/13625H01L27/1288
    • A method for manufacturing a thin film transistor substrate is provided to reduce the leakage of current, thereby suppressing afterimage on a display screen, by removing the lower metal layer of a data wiring through dry etching. A gate insulating layer(30), a semiconductor layer, a first data metal layer, a second data metal layer, and a third data metal layer are sequentially deposited on a substrate(10), where a gate line(22) is formed. The third and second data metal layers are selectively etched using a photoresist pattern formed on the third data metal layer. The first data metal layer and the semiconductor layer are selectively etched using the photoresist pattern. Herein, a portion of the photoresist pattern, which corresponds to a channel region of the semiconductor layer, is removed. The third and second data metal layers are etched selectively using the remaining photoresist pattern. The first data metal layer is selectively removed using the remaining photoresist pattern, thereby exposing the channel region of the semiconductor layer.
    • 提供一种制造薄膜晶体管基板的方法,通过通过干蚀刻去除数据布线的下金属层,减少电流泄漏,从而抑制显示屏幕上的残影。 栅极绝缘层(30),半导体层,第一数据金属层,第二数据金属层和第三数据金属层被顺序地沉积在形成栅极线(22)的基板(10)上。 使用形成在第三数据金属层上的光致抗蚀剂图案来选择性地蚀刻第三和第二数据金属层。 使用光致抗蚀剂图案选择性地蚀刻第一数据金属层和半导体层。 这里,除去对应于半导体层的沟道区的光致抗蚀剂图案的一部分。 使用剩余的光致抗蚀剂图案选择性地蚀刻第三和第二数据金属层。 使用剩余的光致抗蚀剂图案选择性地去除第一数据金属层,从而暴露半导体层的沟道区。