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1. 发明授权

KR102262902B1 적층 세라믹 커패시터 및 그 제조 방법 有权
公开(公告)号：KR102262902B1
公开(公告)日：2021-06-09
申请号：KR1020190103621
申请日：2019-08-23
申请人： 삼성전기주식회사
发明人： 이지원 , 윤준호 , 이승렬
IPC分类号： H01G4/30 , H01G4/12

2. 发明公开

KR20210023440A 적층 세라믹 커패시터 및 그 제조 방법 有权
公开(公告)号：KR20210023440A
公开(公告)日：2021-03-04
申请号：KR20190103621
申请日：2019-08-23
申请人： 삼성전기주식회사
发明人： 이지원 , 윤준호 , 이승렬
IPC分类号： H01G4/30 , H01G4/12
摘要： 본발명의일 실시형태는유전체층및 상기유전체층을사이에두고서로대향하도록배치되는제1 및제2 내부전극을포함하고, 서로대향하는제1 면및 제2 면, 상기제1 면및 제2 면을연결하는제3 면및 제4 면과상기제1 면내지제4 면과연결되되, 서로대향하는제5 면및 제6 면을포함하는세라믹바디및 상기세라믹바디의외측에배치되고, 상기제1 및제2 내부전극과각각연결되는제1 및제2 외부전극을포함하며, 상기세라믹바디는상기유전체층을사이에두고서로대향하도록배치되는복수의내부전극을포함하여용량이형성되는액티브부와상기액티브부의상부및 하부에형성된커버부를포함하고, 상기커버부는상기액티브부의유전체층보다기공의개수가더 많으며, 상기커버부는상기커버부의기공에폴리머가충진된세라믹-폴리머복합체를포함하는적층세라믹커패시터를제공한다.

3. 发明公开

KR1020160005961A 다층 인쇄회로기판 및 그 제조 방법 审中-实审
标题翻译：多层印刷电路板及其制造方法
公开(公告)号：KR1020160005961A
公开(公告)日：2016-01-18
申请号：KR1020140085143
申请日：2014-07-08
申请人： 삼성전기주식회사
发明人： 이지원 , 김진규
IPC分类号： H05K3/46 , H05K3/42
CPC分类号： H05K3/46 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/49894 , H01L2924/0002 , H05K1/0268 , H05K3/429 , H05K3/4617 , H05K3/4673 , H01L2924/00
摘要： 다층인쇄회로기판및 그제조방법이개시된다. 본발명의일 측면에따른다층인쇄회로기판은내층배선패턴이형성되는내층부, 외층배선패턴이형성되고내층부의양면에적층되는외층부, 외층부를관통하여내층배선패턴의제1 지점과연결되도록형성되고내부가도금되는제1 비아홀및 외층부를관통하여내층배선패턴의제2 지점과연결되도록형성되고내부가도금되는제2 비아홀을포함하고, 제2 비아홀은내층부및 외층부중 외형가공을통해제거되는영역에형성된다.
摘要翻译：公开了一种多层印刷电路板及其制造方法。根据本发明的一个方面，多层印刷电路板包括：内层部分，其上形成有内层布线图案; 外层部分，其外表层布线图案形成在其上并堆积在内层部分的两个表面上; 第一通孔形成为穿透外层部分并连接到内层布线图案的第一点，其中其内部被镀覆; 以及形成为穿透外层部分以与内层布线图案的第二点连接的第二通孔，其中内部被镀覆。第二通孔形成在通过内层部分和外层部分之间的布线去除的区域中。

4. 发明授权

KR101251852B1 다층인쇄회로기판 불량 검사 방법 失效
标题翻译：检查多路印刷电路板缺陷的方法
公开(公告)号：KR101251852B1
公开(公告)日：2013-04-10
申请号：KR1020110143422
申请日：2011-12-27
申请人： 삼성전기주식회사
发明人： 이지원
IPC分类号： H05K3/46 , H05K13/08 , H05K1/02
摘要： PURPOSE: A method for checking a defect of a multilayer printed circuit board is provided to reduce defect display time of a worker and the generation of foreign substances by standardizing a defect display method. CONSTITUTION: An identifier is displayed in a dummy area of each piece of a PCB(Printed Circuit Board)(S100). Circuit checking is formed to the PCB displaying the identifier to detect a defective piece(S210). A mark for defect confirmation is displayed on an identifier area of the detected defective piece(S230). The PCB is processed(S300). Defect checking is performed to only laminating boards except for a laminating board including a marked piece(S400). [Reference numerals] (AA) Start; (BB) End; (S100) Displaying an identifier in a dummy area of each PCS of a PCB; (S210) Performing circuit checking on the PCB with the identifier displayed to detect a defective PCS; (S230) Marking in an identifier area of the defective PCS; (S300) Laminating and cutting PCBs in which circuit checking is completed; (S400) Performing defect checking only on laminating boards except for a laminating board including a marked PCS after cutting;
摘要翻译：目的：提供一种用于检查多层印刷电路板的缺陷的方法，以通过标准化缺陷显示方法来减少工人的缺陷显示时间和产生异物。构成：在PCB（印刷电路板）的每一块的虚拟区域中显示标识符（S100）。对显示标识符的PCB形成电路检查以检测缺陷片（S210）。在检测到的缺陷片的标识符区域上显示缺陷确认标记（S230）。处理PCB（S300）。执行除了包括标记片的层压板之外的层压板（S400）的缺陷检查。（附图标记）（AA）开始; （BB）结束; （S100）在PCB的每个PCS的虚拟区域中显示标识符; （S210）使用显示的标识符对PCB进行电路检查，以检测有故障的PCS; （S230）在有缺陷的PCS的标识符区域中标记; （S300）层压和切割电路检查完成的PCB; （S400）除了在切割后包括标记的PCS的层压板以外的层压板上进行缺陷检查;

5. 发明授权

KR101158226B1 다층 인쇄 회로 기판 및 이의 제조방법 有权
标题翻译：多层板及其制造方法
公开(公告)号：KR101158226B1
公开(公告)日：2012-06-19
申请号：KR1020100131445
申请日：2010-12-21
申请人： 삼성전기주식회사
发明人： 배경윤 , 김희주 , 김대근 , 이지원
IPC分类号： H05K3/46 , H05K1/09
摘要： PURPOSE: A multilayer printed circuit board and a manufacturing method thereof are provided to distinguish defective products with the unaided eye by patterning copper foil on the surface of a slit unit. CONSTITUTION: A copper laminating plate is prepared. The copper laminating plate is cut and a reference hole is formed. An internal circuit is formed at the copper laminating plate in which the reference hole is formed. Copper foil of the surface of a slit unit(10) is formed along the outer side of the internal circuit. The copper of the surface of the slit unit is patterned. An outer tube of the internal circuit is inspected. Blackening surface process is executed at the surface of the internal circuit. Internal substrates in which the internal circuit is formed are laminated. The internal substrates are heated and pressurized.
摘要翻译：目的：提供一种多层印刷电路板及其制造方法，用于通过在狭缝单元的表面上构图铜箔来区分具有肉眼的缺陷产品。构成：制备铜层压板。铜层压板被切割并形成参考孔。在形成基准孔的铜层压板上形成内部电路。沿着内部电路的外侧形成狭缝单元（10）的表面的铜箔。将缝隙单元的表面的铜图案化。检查内部电路的外管。在内部电路的表面执行黑化表面处理。形成内部电路的内部基板被层叠。内部基板被加热和加压。

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