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    • 11. 发明公开
    • 실리콘 카바이드 반도체 소자의 제작 방법
    • 用于半导体器件的电极制造方法
    • KR1020100063336A
    • 2010-06-11
    • KR1020080121809
    • 2008-12-03
    • 한국전기연구원
    • 주성재강인호방욱김상철김남균
    • H01L21/283
    • H01L21/28518H01L21/28052H01L29/66575
    • PURPOSE: A manufacturing method of the silicon carbide semiconductor device is provided to improve a movement characteristic of the device by reducing a specific contact resistance with maximizing a contact area of an electrode. CONSTITUTION: A spacer insulating film(21-1) is formed on the sidewall of a concavo-convex(11) with mixing a front side formation of the insulating film and an anisotropy etching process. An electrode is simultaneously formed on an upper and a lower part of the concavo-convex exposed a semiconductor material with a thermal process after forming a predetermined metal film(51) on the front. The metal film is selectively removed remaining on the spacer insulating film using a wet etching or a dry etching process. The silicon carbide semiconductor device is a junction field effect transistor. The silicon carbide semiconductor device is a metal-insulating layer field effect transistor.
    • 目的:提供碳化硅半导体器件的制造方法,以通过以最大化电极的接触面积的方式降低特定接触电阻来改善器件的运动特性。 构成:在凹凸(11)的侧壁上形成间隔绝缘膜(21-1),混合绝缘膜的正面形成和各向异性蚀刻工艺。 在前面形成预定的金属膜(51)之后,在凹凸的上部和下部同时形成电极,在半导体材料的热处理中暴露出半导体材料。 使用湿式蚀刻或干法蚀刻工艺,将金属膜选择性地除去留在间隔绝缘膜上。 碳化硅半导体器件是结型场效应晶体管。 碳化硅半导体器件是金属绝缘层场效应晶体管。
    • 12. 发明公开
    • 접합장벽쇼트키 게이트 구조를 갖는 고전압 탄화규소쇼트키 접합형 전계효과 트랜지스터 및 그 제조방법
    • SIC功率金属半导体场效应晶体管,具有接线棒肖特基门结构及其制造
    • KR1020090042598A
    • 2009-04-30
    • KR1020070108447
    • 2007-10-26
    • 한국전기연구원
    • 강인호김상철김남균방욱주성재
    • H01L29/78H01L21/336
    • H01L29/66068H01L29/1608H01L29/47
    • A field effect transistor having a junction barrier schottky gate structure and a manufacturing method thereof are provided to improve a switching property by reducing a parasitic capacitance generated between a gate and a drain. A field effect transistor comprises a gate electrode(200), a high concentration P type junction barrier schottky, a high concentration N type SiC semiconductor(210), a source electrode(220), a high concentration P type semiconductor(240), a drift layer(260), a high concentration N type SiC substrate(270), and a drain electrode(280). The gate electrode is positioned on a top end of a trench(1) structure. The drain electrode is contacted in a bottom of the substrate. The high concentration P type junction barrier schottky reduces a leakage current under an electrode, and increases a breakdown voltage. The source electrode is contacted in the high concentration N type SiC semiconductor. The high concentration P type semiconductor is formed under the high concentration P type SiC semiconductor and the source electrode.
    • 提供具有结屏势肖特基门结构的场效应晶体管及其制造方法,以通过减小栅极和漏极之间产生的寄生电容来提高开关特性。 场效应晶体管包括栅电极(200),高浓度P型结屏障肖特基,高浓度N型SiC半导体(210),源电极(220),高浓度P型半导体(240), 漂移层(260),高浓度N型SiC衬底(270)和漏电极(280)。 栅电极位于沟槽(1)结构的顶端。 漏电极在基板的底部接触。 高浓度P型结屏障肖特基降低了电极下的泄漏电流,并且增加了击穿电压。 源电极在高浓度N型SiC半导体中接触。 在高浓度P型SiC半导体和源电极下形成高浓度P型半导体。
    • 13. 发明授权
    • 탄화규소 접합전계효과 트랜지스터의 제작방법
    • SIC连接场效应晶体管的制造方法
    • KR100873604B1
    • 2008-12-11
    • KR1020070057329
    • 2007-06-12
    • 한국전기연구원
    • 주성재김상철방욱강인호김남균
    • H01L29/80
    • The method of manufacturing the silicon carbide junction field effect transistor is provided to facilitate the junction field effect transistor in which on-resistance is low and the dielectric breakdown voltage is high. The method of manufacturing the silicon carbide junction field effect transistor comprises as follows. The first step is for forming the n+ source area(11) and mesa structure in order to make the recessed gate structure junction field effect transistor in the n-type silicon carbide substrate. The second step is for performing the thing ion-implanting(aluminum, the beryllium and boron) for forming the p-type gate(aluminum and beryllium) to the p-type dopant ion injection. The third step is for performing the dopant activation and diffusion, and the thermal process for removing the lattice damage. The fourth stage is for completing the transistor manufacture after the series of production process including the metallization process for the electrode metallization and passivation process. Aluminum and boron are ion-implanted in the second step at together.
    • 提供了制造碳化硅结型场效应晶体管的方法,以便于导通电阻低并且介电击穿电压高的结场效应晶体管。 制造碳化硅结型场效应晶体管的方法如下。 第一步是形成n +源区(11)和台面结构,以便使n型碳化硅衬底中的凹陷栅结构结场效应晶体管。 第二步是进行离子注入(铝,铍和硼),以形成p型栅极(铝和铍)到p型掺杂剂离子注入。 第三步是进行掺杂剂活化和扩散,以及去除晶格损伤的热处理。 第四阶段是在包括用于电极金属化和钝化处理的金属化工艺的一系列生产工艺之后完成晶体管制造。 铝和硼在第二步骤中一起离子注入。
    • 14. 发明授权
    • 탄화규소 반도체 가스센서 장치 및 그 제조방법
    • 硅碳化硅半导体气体传感器装置及制造方法
    • KR100783765B1
    • 2007-12-07
    • KR1020060088387
    • 2006-09-13
    • 한국전기연구원
    • 김상철강인호김남균서길수방욱김형우김기현주성재
    • H01L21/84H01L21/336
    • A silicon carbide semiconductor gas sensor and a manufacturing method thereof are provided to measure a broad range of hydrogen concentration by using a silicon carbide MOSFET device for low hydrogen concentration and a sensing resistance type sensor device for high hydrogen concentration. A p type silicon carbide epitaxial layer(202) is formed on an n+ type silicon carbide substrate(201), and a p type impurity is implanted on the p type silicon carbide epitaxial layer at a high temperature to form a p+ type channel stopper(205) for electrically isolating a standard MOSFET device from a sensing MOSFET device. A source and drain(206) configuring the standard MOSFET and the sensing MOSFET is formed on the epitaxial layer. A protective layer(214) is formed on a standard MOSFET device region to prevent contact of hydrogen gas, and a metal resistance type heating layer(215) is formed on a lower portion of the substrate to change a temperature of the MOSFET device.
    • 提供一种碳化硅半导体气体传感器及其制造方法,用于通过使用用于低氢浓度的碳化硅MOSFET器件和用于高氢浓度的感测电阻型传感器装置来测量宽范围的氢浓度。 在n +型碳化硅衬底(201)上形成p型碳化硅外延层(202),并在高温下将p型杂质注入p型碳化硅外延层上以形成p +型沟道阻挡层(205 ),用于将标准MOSFET器件与感测MOSFET器件电隔离。 构成标准MOSFET和感测MOSFET的源极和漏极(206)形成在外延层上。 在标准MOSFET器件区域上形成保护层(214)以防止氢气接触,并且在衬底的下部形成金属电阻型加热层(215)以改变MOSFET器件的温度。
    • 15. 发明授权
    • 유중수소가스 검침용 반도체형 수소센서 및 제조법
    • 变压器油中的半导体电阻式氢气传感器及其制造方法
    • KR100776631B1
    • 2007-11-15
    • KR1020060128850
    • 2006-12-15
    • 한국전기연구원
    • 강인호김상철김남균방욱선종호한상보주성재
    • H01L49/00
    • H01L49/00G01N27/12
    • A semiconductor type hydrogen gas sensor and a manufacturing method thereof are provided to improve a sensitivity for detecting a fault in an insulation oil at an early stage by using a palladium electrode instead of a platinum electrode and inserting an adhesion promoter metal between a substrate and a palladium electrode. A hydrogen gas sensor includes a substrate(101), a junction enhancement metal layer(102), a heater, a catalyst metal layer(103), and a reactive oxide film(104). Device structures are formed on the substrate. The junction enhancement metal layer is bonded with a catalyst metal on the substrate. The heater is formed along a front edge of the substrate. The catalyst metal layer dissociates a hydrogen molecule into hydrogen atoms on the junction enhancement metal layer. The reactive oxide film generates a change of a transition property according to an atomic concentration of hydrogen between the junction enhancement metal layer and the catalyst metal layer.
    • 提供一种半导体型氢气传感器及其制造方法,以通过使用钯电极代替铂电极来提高在早期阶段检测绝缘油中的故障的灵敏度,并将粘合促进剂金属插入到基板和 钯电极。 氢气传感器包括基板(101),结强化金属层(102),加热器,催化剂金属层(103)和反应性氧化物膜(104)。 器件结构形成在衬底上。 连接增强金属层与基板上的催化剂金属结合。 加热器沿着基板的前边缘形成。 催化剂金属层将氢分子解离成连接增强金属层上的氢原子。 反应性氧化物膜根据连接增强金属层和催化剂金属层之间的氢原子浓度产生过渡特性的变化。
    • 16. 发明公开
    • 전력선 통신 모뎀용 절전관리 시스템
    • PLC调制解调器电源管理系统
    • KR1020070069241A
    • 2007-07-03
    • KR1020050131113
    • 2005-12-28
    • 한국전기연구원
    • 김기현김남균김상철서길수방욱강인호김형우
    • H04B3/54H04L12/24
    • H04L12/12H04B3/542H04L2012/2843Y02D50/20Y02D50/40
    • A power-saving management system for a PLC(Power Line Communication) modem is provided to block power supply to the modem as maintaining a function of the modem in a data reception standby state, thereby reducing power consumption in the data reception standby state. A signal decider(110) extracts a data signal within a power line connected with a PLC modem(150), and decides whether available data exists. A switch controller(120) delivers an on/off control signal to a switch element according to decided results of the decider(110). A switch unit(130) performs a switch on/off operation in order to supply or block power to a power-saving management system(100) itself or the modem(150) according to the control signal. A power supply unit(140) supplies or blocks the power to the system(100) itself according to the control signal.
    • 提供了用于PLC(电力线通信)调制解调器的省电管理系统,以阻止向调制解调器供电以保持调制解调器在数据接收等待状态下的功能,从而降低数据接收待机状态下的功耗。 信号判定器(110)提取与PLC调制解调器(150)连接的电力线内的数据信号,并且判定是否存在可用数据。 开关控制器(120)根据决定器(110)的确定结果将开/关控制信号传送到开关元件。 开关单元(130)执行开/关操作,以便根据控制信号向节能管理系统(100)本身或调制解调器(150)供电或阻断电力。 电源单元(140)根据控制信号向系统(100)提供或阻断电力。
    • 17. 发明授权
    • 이중산화막을 갖는 고내압 탄화규소 쇼트키 다이오드 소자및 그 제조방법
    • 具有双氧化层的高电压SiC肖特基二极管器件及其制造方法
    • KR100619603B1
    • 2006-09-11
    • KR1020050001813
    • 2005-01-07
    • 한국전기연구원
    • 방욱김상철김남균김형우서길수김기현김은동
    • H01L29/872H01L21/31H01L21/324H01L21/205
    • 본 발명에 따른 이중산화막을 갖는 고내압 탄화규소 쇼트키 다이오드 소자는, 고농도 n형 탄화규소 기판과, 그 탄화규소 기판 위에 적층 형성되는 저농도 n형 탄화규소 에피탁시층과, 그 탄화규소 에피탁시층 위에 금속접합 가장자리의 전계를 견딜 수 있도록 설계되어 500nm~2um두께로 적층 형성되는 화학기상증착 산화막과, 상기 탄화규소 에피탁시층 위에 형성되는 상부 쇼트키 접촉 금속막과, 상기 탄화규소 기판의 하부에 형성되는 하부 저항성 접촉 금속막을 구비하는 탄화규소 쇼트키 다이오드 소자에 있어서, 상기 저농도 n형 탄화규소 에피탁시층과 상기 화학기상증착 산화막 사이에는 중심부의 일정 영역을 제외한 나머지 양측 영역에 화학기상증착 산화막에서 발생하는 누설전류를 차단하고 탄화규소와의 계면전하를 줄이기 위한 10~50nm 두께의 열산화막이 각각 형성되고, 그 열산화막의 중심부 및 그 중심부에서 수직으로 연장되는 상기 화학기상증착 산화막의 중심부에 의해 형성되는 U자형 채널과, 그 U자형 채널의 상면부, 그리고 그 상면부 양측으로 각각 일정 길이만큼 연장된 영역에 걸쳐 상기 상부 쇼트키 접촉 금속막이 형성된다.
      이와 같은 본 발명에 의하면, 열산화막과 화학기상증착법으로 증착한 산화막의 이중층을 전계판으로 사용하므로, 화학기상증착법으로 증착한 산화막의 누설전류를 차단할 수 있고, 장기간 사용 시 소자의 신뢰성을 향상시킬 수 있다.
    • 18. 发明授权
    • 탄화규소 반도체 소자의 제조방법
    • 탄화규소반도체소자의제조방법
    • KR100446954B1
    • 2004-09-01
    • KR1020010058883
    • 2001-09-22
    • 한국전기연구원
    • 김남균방욱김은동김상철서길수
    • H01L21/20
    • PURPOSE: A method for fabricating a silicon carbide semiconductor device is provided to prevent defects of a surface of the silicon carbide semiconductor device by using an ion implantation method. CONSTITUTION: An n-type silicon carbide epitaxy layer(12) is formed on a silicon carbide crystalline(11). A mask material is coated on a surface of the n-type silicon carbide epitaxy layer(12). The mask material is patterned. An ion implantation process of p-type dopants is performed. The patterned mask material is removed. An oxide layer(14) is formed on the n-type silicon carbide epitaxy layer(12). The p-type dopants are activated by performing a thermal process. A p-well(21) is formed by activating the p-type dopants. An ion implantation mask is patterned. An n source region(22) of MOSFET is formed by implanting n-type dopants into the p-well(21).
    • 目的:提供一种用于制造碳化硅半导体器件的方法,以通过使用离子注入方法来防止碳化硅半导体器件的表面的缺陷。 构成:在碳化硅晶体(11)上形成n型碳化硅外延层(12)。 掩模材料被涂覆在n型碳化硅外延层(12)的表面上。 掩模材料被图案化。 执行p型掺杂剂的离子注入工艺。 图案化的掩模材料被去除。 在n型碳化硅外延层(12)上形成氧化层(14)。 通过执行热处理来激活p型掺杂剂。 通过激活p型掺杂剂形成p阱(21)。 离子注入掩模被图案化。 MOSFET的n源区(22)通过将n型掺杂剂注入到p阱(21)中而形成。
    • 20. 发明公开
    • 탄화규소 반도체 소자의 제조방법
    • 制备碳化硅半导体器件的方法
    • KR1020030025711A
    • 2003-03-29
    • KR1020010058883
    • 2001-09-22
    • 한국전기연구원
    • 김남균방욱김은동김상철서길수
    • H01L21/20
    • PURPOSE: A method for fabricating a silicon carbide semiconductor device is provided to prevent defects of a surface of the silicon carbide semiconductor device by using an ion implantation method. CONSTITUTION: An n-type silicon carbide epitaxy layer(12) is formed on a silicon carbide crystalline(11). A mask material is coated on a surface of the n-type silicon carbide epitaxy layer(12). The mask material is patterned. An ion implantation process of p-type dopants is performed. The patterned mask material is removed. An oxide layer(14) is formed on the n-type silicon carbide epitaxy layer(12). The p-type dopants are activated by performing a thermal process. A p-well(21) is formed by activating the p-type dopants. An ion implantation mask is patterned. An n source region(22) of MOSFET is formed by implanting n-type dopants into the p-well(21).
    • 目的:提供一种用于制造碳化硅半导体器件的方法,以通过使用离子注入方法来防止碳化硅半导体器件的表面的缺陷。 构成:在碳化硅结晶(11)上形成n型碳化硅外延层(12)。 掩模材料被涂覆在n型碳化硅外延层(12)的表面上。 掩模材料被图案化。 执行p型掺杂剂的离子注入工艺。 去除图案化的掩模材料。 在n型碳化硅外延层(12)上形成氧化物层(14)。 通过进行热处理来激活p型掺杂剂。 通过激活p型掺杂剂形成p阱(21)。 图案化离子注入掩模。 通过将n型掺杂剂注入到p阱(21)中来形成MOSFET的n源区(22)。