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1. 发明专利

JP2013055395A Signal transmitting device, signal transmitting method, signal receiving device, signal receiving method and signal transmitting system 审中-公开
标题翻译：信号发送装置，信号发送方法，信号接收装置，信号接收方法及信号发送系统
公开(公告)号：JP2013055395A
公开(公告)日：2013-03-21
申请号：JP2011190549
申请日：2011-09-01
申请人： Sony Corp , ソニー株式会社
发明人： YAMASHITA SHIGEYUKI
IPC分类号： H04N11/04 , H04J3/00 , H04N7/01 , H04N7/22
CPC分类号： H04N21/23602 , H04N5/23203 , H04N21/4342
摘要： PROBLEM TO BE SOLVED: To provide an interface for transmitting 2k/23.98P-60P or 47.95I-60I/16-bit video signals.SOLUTION: A signal transmitting device punctures per word a 1-ch 16-bit signal whose r:g:b is 4:4:4 to map to a 1-ch 16-bit signal whose r:g:b is 4:2:2 and to a 1-ch 16-bit signal whose r:g:b is 0:2:2; and then maps to and outputs first to third HD-SDI comprising a 2-ch 10-bit signal having 4:2:2 in accordance with first and second mapping structures.
摘要翻译：要解决的问题：提供用于发送2k / 23.98P-60P或47.95I-60I / 16位视频信号的接口。
解决方案：信号发送装置对每个字进行一个1比特16比特信号的比较：r：g：b为4：4：4，映射到r：g：b为1比特16比特信号 4：2：2和r：g：b为0：2：2的1通道16位信号; 然后根据第一和第二映射结构映射并输出包括具有4:2:2的2通道10位信号的第一至第三HD-SDI。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP4692576B2 Signal transmission apparatus and signal transmission method 有权
公开(公告)号：JP4692576B2
公开(公告)日：2011-06-01
申请号：JP2008137245
申请日：2008-05-26
申请人：ソニー株式会社
发明人：重行山下
IPC分类号： H04N7/173 , H04N21/2368 , H04N21/2381 , H04N21/4363 , H04N21/643
CPC分类号： H04N21/4342 , H04N21/23602
摘要： When transmitting an input image signal and an audio signal inputted in synchronization with the input image signal, each frame in the input image signal are divided into first, second, third, and fourth subimages and pixel samples of the subimages are mapped onto image data regions of two-channel HD-SDI signals, respectively, and the audio signal is mapped onto supplementary data regions included in horizontal ancillary data spaces of any of the two-channel HD-SDI signals onto which the subimages are respectively mapped. The pixel samples mapped onto the image data regions of the two-channel HD-SDI signals are multiplexed onto an image data region of a first transfer data stream and the audio signal mapped onto the supplemental data regions included in horizontal ancillary data spaces of any of the two-channel HD-SDI signals is multiplexed onto a horizontal ancillary data space of a second transfer data stream.

3. 发明专利

JP4506852B2 Signal input device and the signal input method 有权
公开(公告)号：JP4506852B2
公开(公告)日：2010-07-21
申请号：JP2008041995
申请日：2008-02-22
申请人：ソニー株式会社
发明人：重行山下
IPC分类号： G09G5/18 , H04L7/033 , H04N7/173 , H04N9/00 , H04N21/44 , H04N21/61
CPC分类号： H04N5/08 , H04N5/268 , H04N21/23602 , H04N21/4342
摘要： A signal inputting apparatus that receives first and second input image signals transmitted and extracts image data is provided. The apparatus includes a first interface unit and a second interface unit. The first interface unit is configured to receive a first input image signal transmitted, extract data from the first input image signal, and generate a recovered clock from the first input image signal. The second interface unit is configured to receive a second input image signal transmitted in synchronization with the first input image signal and extract data from the transmitted second input image signal based on the recovered clock supplied from the first interface unit.

4. 发明专利

JP2010093658A Device and method for transmitting signal 有权
标题翻译：用于发送信号的装置和方法
公开(公告)号：JP2010093658A
公开(公告)日：2010-04-22
申请号：JP2008263243
申请日：2008-10-09
申请人： Sony Corp , ソニー株式会社
发明人： YAMASHITA SHIGEYUKI
IPC分类号： H04N7/025 , H04J3/00 , H04N7/03 , H04N7/035 , H04N7/08 , H04N7/081
CPC分类号： H04N5/268 , H04N7/015 , H04N7/12 , H04N21/23602 , H04N21/4342
摘要： PROBLEM TO BE SOLVED: To properly output a flat-field video signal. SOLUTION: HD-SDI signals of Links A and B are mapped in accordance with a predetermined transmission standard. For the Link A, a timing reference signal SAV specified by 000h, 000h, 000h, 000h among data on each of horizontal lines is rewritten to a predetermined value. A self-synchronizing scrambling is applied to data other than a horizontal blanking period. All values of registers in a scrambler are set to 0 immediately before SAV and encoded, and at least several bits data continuing to an error detection code CRC are output. Bits of RGB of the Link B are multiplexed with data having been subjected to 8B/10B encoding to generate 10.692 Gbps serial digital data. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：正确输出平场视频信号。解决方案：链路A和B的HD-SDI信号根据预定的传输标准进行映射。对于链路A，在每条水平线上的数据中由000h，000h，000h，000h指定的定时参考信号SAV被重写为预定值。自同步扰频被应用于水平消隐期以外的数据。扰码器中的寄存器的所有值在SAV之前立即设置为0并被编码，并且输出连续进行错误检测码CRC的至少几个位数据。链路B的RGB位与经过8B / 10B编码的数据进行复用，生成10.692Gbps串行数字数据。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JPWO2008041305A1 高画質圧縮映像伝送システム有权
公开(公告)号：JPWO2008041305A1
公开(公告)日：2010-01-28
申请号：JP2008537362
申请日：2006-09-29
申请人：株式会社メディアグローバルリンクス
发明人：健笹田 , 健笹田
IPC分类号： H04N7/26 , H04N19/00 , H04N7/52 , H04N19/102 , H04N19/115 , H04N19/134 , H04N19/136 , H04N19/625 , H04N19/91
CPC分类号： H04N19/61 , G06F3/14 , G09G5/00 , G09G2340/02 , H04N21/23602 , H04N21/4342
摘要： SDI信号として伝送するべく10ビットワード形式にビット変換する際においては、映像データに8ビット割り当て、残り2ビットについては冗長ビットを付加する処理を行っているため、映像データとして伝送するデータ量が制限されてしまい、結果として高精細な画質の映像を伝送することができなかった。そこで、HD−SDI信号形式にて入力される映像信号を圧縮して出力するエンコーダ装置であって、入力映像信号をエンコードする8ビットエンコーダと、エンコードされた8ビット形式の信号を、10ビット形式の信号でありその全てのビットに対して映像信号を割り当てるようにビット変換をする10ビット変換部と、10ビット変換後の信号に所定の禁止コードを検出した場合に当該禁止コードを非禁止コード化する非禁止コード化部と、を有するエンコーダ装置を提供する。

6. 发明专利

JP2009147894A Signal transmission device, and signal transmission method 有权
标题翻译：信号传输设备和信号传输方法
公开(公告)号：JP2009147894A
公开(公告)日：2009-07-02
申请号：JP2008042003
申请日：2008-02-22
申请人： Sony Corp , ソニー株式会社
发明人： YAMASHITA SHIGEYUKI
IPC分类号： H04N7/08 , H04J3/00 , H04N5/225 , H04N7/081 , H04N7/24 , H04N7/52
CPC分类号： H04N7/015 , H04N5/232 , H04N5/23203 , H04N5/268 , H04N7/12 , H04N21/23602 , H04N21/4342
摘要： PROBLEM TO BE SOLVED: To easily perform video and audio synchronizing processing at a receiving side when transmitting an audio signal synchronously with a high-definition video signal. SOLUTION: Pixels extracted from each frame of an input video signal are thinned out for each predetermined sample, and the thinned-out samples are taken out for each frame in equal order and mapped during the active periods of first, second, third, and fourth sub-images of an HD-SDI format. The mapped first, second, third, and fourth sub-images are divided into the transmission channel of a first link and the transmission channel of a second link for each sub-image and mapped onto eight channels. The mapped first, second, third, and fourth sub-images are converted in parallel. The parallel digital data converted in parallel are output. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：在与高分辨率视频信号同步发送音频信号时，容易地在接收侧执行视频和音频同步处理。解决方案：从输入视频信号的每个帧中提取的像素对于每个预定样本被稀疏，并且对于每个帧以相等的顺序取出稀疏样本，并在第一，第二和第三的活动期间映射，以及HD-SDI格式的第四子图像。映射的第一，第二，第三和第四子图像被划分为第一链路的传输信道和每个子图像的第二链路的传输信道，并映射到八个信道。映射的第一，第二，第三和第四子图像被并行转换。输出并行转换的并行数字数据。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP4176643B2 Method and apparatus for recovering a clock for the auxiliary data transmitted over the serial link with the video data 有权
公开(公告)号：JP4176643B2
公开(公告)日：2008-11-05
申请号：JP2003558625
申请日：2002-12-05
申请人：シリコン・イメージ・インク
发明人：アン、ギジュン , ウルフ、ポール・ダニエル , キーティング、ステーブン・ジェイ , シーメンス、ドゥエイン , ジュン、キーウック , スケイリス、アルバート・エム , スファーティ、エイドリアン , バンクス、ジョン・ディ , リー、エリック , ワン、ソン・ホー
IPC分类号： H04N7/04 , G09G5/00 , H04J3/00 , H04L1/00 , H04L1/20 , H04L25/49 , H04N5/12 , H04N7/045 , H04N19/89 , H04N21/233 , H04N21/236 , H04N21/2368 , H04N21/2383 , H04N21/242 , H04N21/434
CPC分类号： H04L1/0057 , G09G5/006 , H04L1/203 , H04L1/206 , H04L25/49 , H04N5/126 , H04N5/4401 , H04N19/89 , H04N21/233 , H04N21/23602 , H04N21/2368 , H04N21/2383 , H04N21/242 , H04N21/4341 , H04N21/4342
摘要： A communication system including a transmitter, a receiver, and a serial link, in which encoded data (e.g., video, audio, and optionally also other auxiliary data) are transmitted from the transmitter to the receiver. The serial link can but need not be a TMDS or TMDS-like link. In typical embodiments, packets of encoded audio data are transmitted over each of one or more channels of the link during data islands between bursts of encoded video data, a pixel clock is transmitted over the link, and the receiver regenerates a clock for the audio data using time code data in the packets and the pixel clock. Other aspects of the invention are transmitters for transmitting encoded data and a pixel clock over a serial link, receivers for receiving such data and pixel clock and performing audio clock regeneration, and methods for transmitting encoded data and a pixel clock over a serial link and performing clock regeneration using the transmitted data and pixel clock.

8. 发明专利

JP4114658B2 Data transmission device and the data receiving device 有权
公开(公告)号：JP4114658B2
公开(公告)日：2008-07-09
申请号：JP2004331355
申请日：2004-11-16
申请人：ソニー株式会社
发明人：重行山下
IPC分类号： H04N7/08 , H04J3/00 , H04N7/081 , H04N7/22 , H04N21/236 , H04N21/643
CPC分类号： H04N21/23602 , H04N21/4342

9. 发明专利

JP2008099189A Signal processor and signal processing method 有权
标题翻译：信号处理器和信号处理方法
公开(公告)号：JP2008099189A
公开(公告)日：2008-04-24
申请号：JP2006281610
申请日：2006-10-16
申请人： Sony Corp , ソニー株式会社
发明人： YAMASHITA SHIGEYUKI
IPC分类号： H04J3/00 , H04N7/08 , H04N7/081
CPC分类号： H04N21/23602 , H04N21/4342
摘要： PROBLEM TO BE SOLVED: To transmit 3840×2160/24P, 25P, 30P/4:4:4/12-bit signals in series at a bit rate of 10 Gbps or higher. SOLUTION: A signal processor maps 3840×2160/24P, 25P, 30P/4:4:4/12-bit signals to Link A and B HD-SDI signals in compliance with 5.4 Octa Link 1.5 Gbps Class of SIMPLE 435M Part1, applies self-synchronous scrambling to data other than a horizontal blanking term, regarding Link A, sets all values of registers within a scrambler to "0" just before SAV, encodes these values, and outputs data up to at least several bits following an error detection code CRC. Bits of RGB of LinkB are then multiplexed with data subjected to 8B/10B encoding, thereby generating serial-digital data of 10.692 Gbps. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：以10 Gbps或更高的比特率串联传输3840×2160 / 24P，25P，30P / 4：4：4/12位信号。解决方案：信号处理器将3840×2160 / 24P，25P，30P / 4：4：4/12位信号映射到Link A和B HD-SDI信号，符合5.4 Octa Link 1.5 Gbps级SIMPLE 435M 对于链路A，第1部分对水平消隐项以外的数据应用自同步扰频，在SAV之前将扰频器内的所有寄存器值设置为“0”，对这些值进行编码，并将数据输出至少几位错误检测码CRC。然后将LinkB的RGB位与经过8B / 10B编码的数据进行复用，从而生成10.692Gbps的串行数字数据。版权所有（C）2008，JPO＆INPIT

10. 发明专利

JP3944908B2 Media Converter 有权
公开(公告)号：JP3944908B2
公开(公告)日：2007-07-18
申请号：JP2003276735
申请日：2003-07-18
申请人：ソニー株式会社
发明人：匡弘大畑
IPC分类号： H04L29/06 , H04N5/765 , H04N7/01 , H04N7/08 , H04N7/14 , H04N7/24 , H04N7/52
CPC分类号： H04N21/4363 , H04N21/23602 , H04N21/4342 , H04N21/43632 , H04N21/4402

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