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JP2008092266A Differential circuit 审中-公开
标题翻译：差分电路
公开(公告)号：JP2008092266A
公开(公告)日：2008-04-17
申请号：JP2006270690
申请日：2006-10-02
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： KIMURA KATSUHARU
IPC分类号： H03F3/45 , H03F1/32
CPC分类号： H03F3/45197 , H03F1/3211 , H03F3/45183 , H03F3/45188 , H03F3/45632 , H03F2203/45024 , H03F2203/45062 , H03F2203/45318 , H03F2203/45352 , H03F2203/45354 , H03F2203/45356 , H03F2203/45366 , H03F2203/45454 , H03F2203/45471 , H03F2203/45644 , H03F2203/45648 , H03F2203/45652
摘要： PROBLEM TO BE SOLVED: To provide an OTA circuit which has high linearity with its circuit scale reduced and achieves high output current efficiency. SOLUTION: The OTA circuit comprises a first pair of transistors (M1, M2) to which a differential input signal is applied, a second pair of transistors (M3, M4) to which a common-mode voltage of the differential input signal is applied and which are parallel-connected to an output of the first pair of the transistors (M1, M2) and further whose sources are connected to each other, a third pair of transistors (M5, M6) to which the differential input signal is applied and which are cascade-connected to the second pair of the transistors (M3, M4), and a fourth pair of transistors (M5, M6) to which the differential input signal is applied and which are cascade-connected to the third pair of the transistors (M5, M8) so that input signals input to gates of the pair transistors (M7, M8) are allowed to be mutually reverse in phase. Then, common sources of the first and fourth pairs of transistors (M1, M2, M7, M8) are driven by a constant-current power supply I 0 . COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有高线性度的OTA电路，其电路规模缩小并实现高输出电流效率。解决方案：OTA电路包括施加差分输入信号的第一对晶体管（M1，M2），第二对晶体管（M3，M4），差分输入信号的共模电压并且其并联连接到第一对晶体管（M1，M2）的输出，并且其源极彼此连接;第三对晶体管（M5，M6），差分输入信号为并且与第二对晶体管（M3，M4）级联连接，并且第四对晶体管（M5，M6）被施加到差分输入信号并与第三对晶体管（M5，M8）使得输入到对晶体管（M7，M8）的栅极的输入信号被允许相位相反。然后，第一和第四对晶体管（M1，M2，M7，M8）的公共源由恒流电源I 0 驱动。版权所有（C）2008，JPO＆INPIT

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