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1. 发明专利

JP2004214305A Semiconductor device and manufacturing method thereof 有权
公开(公告)号：JP2004214305A
公开(公告)日：2004-07-29
申请号：JP2002380090
申请日：2002-12-27
申请人： Toshiba Corp , Toshiba Nanoanalysis Corp , 東芝ナノアナリシス株式会社 , 株式会社東芝
发明人： NAGAMINE MAKOTO , MITANI YUICHIRO , MORI SHINJI , SATO MUNEHARU
IPC分类号： H01L21/316 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device along with its manufacturing method, where the electric characteristics of an insulating film such as a gate oxide film is improved by introducing deuterium atoms of high binding energy into a film at high concentration.
SOLUTION: The method of manufacturing the semiconductor device includes a process for oxidizing the surface of a semiconductor in an oxidizing atmosphere. The oxidizing atmosphere contains the gas molecule composed of deuterium atoms, the gas molecule containing deuterium atoms and oxygen atoms, and the gas molecule containing oxygen atoms. The concentration of the gas molecule composed of the deuterium atoms is 0.01 molecule % or higher against the gas molecule containing the deuterium atoms and oxygen atoms.
COPYRIGHT: (C)2004,JPO&NCIPI

2. 发明专利

JP2014187259A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2014187259A
公开(公告)日：2014-10-02
申请号：JP2013061842
申请日：2013-03-25
申请人： Toshiba Corp , 株式会社東芝
发明人： MORI SHINJI
IPC分类号： H01L29/786 , H01L21/336 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L27/12
CPC分类号： H01L21/84 , H01L21/3065 , H01L21/823807 , H01L27/1203 , Y10S438/933
摘要： PROBLEM TO BE SOLVED: To selectively form a Ge/SiGe channel on a single substrate.SOLUTION: A semiconductor device manufacturing method according to an embodiment comprises: a process of forming a first SiGe layer having a first Ge concentration on a semiconductor substrate 11; a process of forming a second SiGe layer 13a having a second Ge concentration on the first SiGe layer; a process of forming a mask layer 15 on the second SiGe layer 13a; a process of forming a trench by etching the first and second SiGe layers by anisotropic etching by using the mask layer 15 as a mask; a process of selectively removing the first SiGe layer exposed inside the trench to form a cavity under the second SiGe layer 13a; and a process of increasing the first Ge concentration of the second SiGe layer 13a by oxidizing lateral faces and an undersurface of the second SiGe layer 13a exposed inside the trench and the cavity.
摘要翻译：要解决的问题：在单个衬底上选择性地形成Ge / SiGe沟道。根据实施例的半导体器件制造方法包括：在半导体衬底11上形成具有第一Ge浓度的第一SiGe层的工艺; 在第一SiGe层上形成具有第二Ge浓度的第二SiGe层13a的工艺; 在第二SiGe层13a上形成掩模层15的工艺; 通过使用掩模层15作为掩模通过各向异性蚀刻来蚀刻第一和第二SiGe层来形成沟槽的工艺; 选择性地去除暴露在沟槽内的第一SiGe层以在第二SiGe层13a下形成空腔的工艺; 以及通过氧化暴露在沟槽和空腔内的第二SiGe层13a的侧面和下表面来增加第二SiGe层13a的第一Ge浓度的过程。

3. 发明专利

JP2012204430A Nonvolatile semiconductor memory device and method of manufacturing the same 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：JP2012204430A
公开(公告)日：2012-10-22
申请号：JP2011065282
申请日：2011-03-24
申请人： Toshiba Corp , 株式会社東芝
发明人： MIZUSHIMA ICHIRO , FUKUZUMI YOSHIAKI , MORI SHINJI
IPC分类号： H01L27/115 , H01L21/336 , H01L21/8247 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28282 , H01L27/11582 , H01L29/42352
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device that prevents the mobility degradation of electrons in a channel and to provide a method of manufacturing the same.SOLUTION: A nonvolatile semiconductor memory device has a substrate. A stack in which insulating films and electrode films are alternately stacked is provided above the substrate. Silicon pillars that penetrate the stack and contain fluorine in the stack are provided. A tunnel insulating film is provided on the surfaces of the silicon pillars opposite to the stack. A charge storage layer is provided on the surface of the tunnel insulating film opposite to the stack. A block insulating film is provided on the surface of the charge storage layer opposite to the stack so as to contact the electrode films. An embedding portion is provided in each of the silicon pillars.
摘要翻译：要解决的问题：提供一种防止通道中的电子的迁移率劣化并提供其制造方法的非易失性半导体存储器件。解决方案：非易失性半导体存储器件具有衬底。绝缘膜和电极膜交替层叠的叠层设置在基板的上方。提供穿过堆叠并且在堆叠中含有氟的硅柱。隧道绝缘膜设置在与叠层相对的硅柱的表面上。在与堆叠相反的隧道绝缘膜的表面上设置电荷存储层。在电荷存储层的与堆叠相反的表面上设置块状绝缘膜，以便与电极膜接触。在每个硅柱中设置嵌入部分。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2011204720A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2011204720A
公开(公告)日：2011-10-13
申请号：JP2010067774
申请日：2010-03-24
申请人： Toshiba Corp , 株式会社東芝
发明人： MIZUSHIMA ICHIRO , MORI SHINJI
IPC分类号： H01L21/20 , B82B3/00 , H01L21/205
CPC分类号： H01L21/02532 , H01L21/02535 , H01L21/02601 , H01L21/02667
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, which can regularly form patterns of a size smaller than a limit of resolution.SOLUTION: The method of manufacturing the semiconductor device includes: forming a monocrystal film 14 as an epitaxial crystal from a semiconductor substrate 10 as a seed crystal exposed between first and second patterns 13a, 13b as a structure; heating the monocrystal film 14 at a temperature lower than the melting point of the monocrystal film 14 to fluidize the monocrystal film 14; and forming a plurality of aggregates 15 between the first and second patterns 13a, 13b by aggregating the fluidized monocrystal film 14.
摘要翻译：要解决的问题：提供一种可以规则地形成小于分辨率极限的图案的半导体器件的制造方法。解决方案：制造半导体器件的方法包括：形成作为外延晶体的单晶膜14 作为结构暴露在作为结构的第一图案13a，第二图案13b之间的作为晶种的半导体基板10; 在低于单晶膜14的熔点的温度下加热单晶膜14，使单晶膜14流态化; 并且通过聚集流化单晶膜14在第一和第二图案13a，13b之间形成多个聚集体15。

5. 发明专利

JP2011199177A Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：JP2011199177A
公开(公告)日：2011-10-06
申请号：JP2010066706
申请日：2010-03-23
申请人： Toshiba Corp , 株式会社東芝
发明人： MIZUSHIMA ICHIRO , MORI SHINJI , FUKUZUMI YOSHIAKI , AISO FUMIKI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： PROBLEM TO BE SOLVED: To reduce the resistance of a nonvolatile semiconductor memory device compared with the conventional level in a structure composed of a semiconductor layer connected to the bottoms of memory strings that are adjacent in a predetermined direction, the bottoms of memory strings being formed in a way that a plurality of gate electrode films that intersect a pillar-shaped semiconductor film with a charge storage layer formed on the side surface are formed on the side surface of the memory device in a height direction.SOLUTION: In the memory strings MS of the nonvolatile semiconductor memory device, a plurality of memory cell transistors MC having a control gate electrode film 122 are arranged on the side surface of a pillar-shaped semiconductor film 131C through a charge storage layer 132 in the height direction of the pillar-shaped semiconductor film 131C. The plurality of memory strings MS arranged on a semiconductor substrate 101 are connected to the control gate electrode films 122 of the memory cell transistors MC with the same height as the memory strings MS arranged in a word line direction. The nonvolatile semiconductor device is provided with a connecting portion connecting the lower parts of two pillar-shaped semiconductor films 131C that are adjacent in the direction of a bit line. The pillar-shaped semiconductor films 131C are configured of a Ge film or SiGe film of nearly single crystal shape, respectively.
摘要翻译：要解决的问题：为了降低与在与预定方向相邻的存储器串的底部连接的半导体层构成的结构中的常规级别的电阻，形成存储器串的底部以在高度方向上在存储器件的侧表面上形成与形成在侧表面上的电荷存储层的柱状半导体膜相交的多个栅极电极膜。解决方案：在存储器串MS 的非易失性半导体存储器件的多个存储单元晶体管MC中，具有控制栅极电极膜122的多个存储单元晶体管MC通过电荷存储层132在柱状半导体膜131C的柱状的高度方向上配置在柱状半导体膜131C的侧面半导体膜131C。布置在半导体衬底101上的多个存储器串MS以与排列在字线方向上的存储器串MS相同的高度连接到存储单元晶体管MC的控制栅电极膜122。非易失性半导体器件设置有连接部分，其连接在位线方向上相邻的两个柱状半导体膜131C的下部。柱状半导体膜131C分别由几乎单晶形状的Ge膜或SiGe膜构成。

6. 发明专利

JP2011199105A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2011199105A
公开(公告)日：2011-10-06
申请号：JP2010065826
申请日：2010-03-23
申请人： Toshiba Corp , 株式会社東芝
发明人： MURANO HITOHIKO , SAITO MASUMI , MORI SHINJI , MIZUSHIMA ICHIRO
IPC分类号： H01L21/336 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device that grows epitaxial crystals having excellent crystallinity on a semiconductor layer.SOLUTION: The method of manufacturing the semiconductor device includes forming a nanowire 14 extending in a predetermined direction from a precursor film formed on a semiconductor substrate 10 with an insulating film interposed, forming a gate electrode 18 so as to cross the predetermined direction of the nanowire 14 on both side surfaces and the upper surface of the formed nanowire 14 with a gate insulating film interposed, forming gate side walls 22 on both side surfaces of the formed gate electrode 18, forming an epitaxial layer 24 by growing epitaxial crystals on the surface of the nanowire 14 exposed after the gate side walls 22 are formed, and forming an extension region by introducing impurities in the nanowire 14 after forming the epitaxial layer 24.
摘要翻译：要解决的问题：提供一种制造在半导体层上生长具有优异结晶性的外延晶体的半导体器件的方法。解决方案：制造半导体器件的方法包括形成从形成的前体膜沿预定方向延伸的纳米线14 在绝缘膜插入的半导体衬底10上，形成栅电极18，以跨越形成的纳米线14的两个侧表面和上表面的纳米线14的预定方向，并插入栅极绝缘膜，形成栅极侧在形成的栅电极18的两个侧表面上的壁22，通过在形成栅极侧壁22之后暴露的纳米线14的表面上生长外延晶体，形成外延层24，并通过在纳米线中引入杂质形成延伸区域形成外延层24后。

7. 发明专利

JP2005260177A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2005260177A
公开(公告)日：2005-09-22
申请号：JP2004073189
申请日：2004-03-15
申请人： Toshiba Corp , 株式会社東芝
发明人： SAKI KAZURO , MORI SHINJI , SHIMIZU TAKASHI
IPC分类号： H01L21/76 , H01L21/302 , H01L21/31 , H01L21/318 , H01L21/3205 , H01L21/322 , H01L21/336 , H01L29/78
CPC分类号： H01L29/78 , H01L21/0214 , H01L21/02164 , H01L21/02332 , H01L21/02337 , H01L21/2254 , H01L21/28176 , H01L21/3105 , H01L21/823418 , H01L21/823462 , H01L21/823481
摘要： PROBLEM TO BE SOLVED: To terminate a large amount of dangling bonds existing in gate insulating film or element region by heavy hydrogen.
SOLUTION: The method comprises the steps of: forming a semiconductor device on a semiconductor substrate; forming silicon oxide film including nitrogen on the semiconductor device; introducing the heavy hydrogen to the silicon oxide film including the nitrogen; and diffusing the heavy hydrogen by heating the semiconductor substrate. In addition, the method comprises the steps of: forming element isolation film consisting of the silicon oxide film including the nitrogen; introducing the heavy hydrogen to the element isolation film; forming the semiconductor device to element region in the semiconductor substrate divided in zone by the element isolation film; and diffusing the heavy hydrogen by heating the semiconductor substrate.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：通过重氢终止存在于栅极绝缘膜或元件区域中的大量悬挂键。解决方案：该方法包括以下步骤：在半导体衬底上形成半导体器件; 在半导体器件上形成包括氮的氧化硅膜; 将重氢引入包含氮的氧化硅膜; 并通过加热半导体衬底使重氢扩散。此外，该方法包括以下步骤：形成由包含氮的氧化硅膜构成的元件隔离膜; 将重氢引入元件隔离膜; 将半导体器件形成在通过元件隔离膜分割的半导体衬底中的元件区域; 并通过加热半导体衬底使重氢扩散。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2012146861A Semiconductor memory device 审中-公开
标题翻译：半导体存储器件
公开(公告)号：JP2012146861A
公开(公告)日：2012-08-02
申请号：JP2011004954
申请日：2011-01-13
申请人： Toshiba Corp , 株式会社東芝
发明人： FUKUZUMI YOSHIAKI , KITO TAKASHI , AOCHI HIDEAKI , MIYANO KIYOTAKA , MORI SHINJI , MIZUSHIMA ICHIRO
IPC分类号： H01L27/115 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L21/8247 , H01L23/522 , H01L27/10 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11582 , H01L27/0688 , H01L27/11573 , H01L27/11578 , H01L27/1207
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of improving the operating speed and reducing the device area.SOLUTION: A semiconductor memory device comprises: a semiconductor substrate 100; a memory cell array section A that is formed on the semiconductor substrate and in which a plurality of memory cells storing data are arranged; a single-crystal semiconductor layer 109 that is formed above the memory cell array section via an insulating layer and in a hole 106 penetrating through the insulating layer and the memory cell array section, and is connected to the semiconductor substrate; and a circuit section B formed on the single-crystal semiconductor layer. The Ge concentration at the lower side of the single-crystal semiconductor layer on the memory cell array section is higher than that at the upper side of the single-crystal semiconductor layer.
摘要翻译：要解决的问题：提供能够提高操作速度并减少设备面积的半导体存储器件。解决方案：半导体存储器件包括：半导体衬底100; 存储单元阵列部分A，其形成在所述半导体基板上，并且其中布置有存储数据的多个存储单元; 通过绝缘层形成在存储单元阵列部的上方，穿过绝缘层和存储单元阵列部的孔106中形成的单晶半导体层109，与半导体基板连接; 以及形成在单晶半导体层上的电路部分B. 存储单元阵列部分上的单晶半导体层的下侧的Ge浓度高于单晶半导体层的上侧的Ge浓度。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2009238903A Semiconductor device, and manufacturing method of the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009238903A
公开(公告)日：2009-10-15
申请号：JP2008081021
申请日：2008-03-26
申请人： Toshiba Corp , 株式会社東芝
发明人： KAI WAKANA , MORI SHINJI , KAI TETSUYA , OZAWA YOSHIO , MIZUSHIMA ICHIRO , SATO TSUTOMU , MATSUBA HIROSHI , MITANI YUICHIRO
IPC分类号： H01L21/8247 , H01L21/316 , H01L27/115 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device can improve injection efficiency of charge into a charge storage layer; and a manufacturing method of the same.
SOLUTION: This manufacturing method of the semiconductor device provided with a first insulation film formed on a semiconductor substrate, the charge storage layer formed on the first insulation film, a second insulation film formed on the charge storage layer, and a control gate electrode formed on the second insulation film includes processes of: forming the first insulation film 204; forming a lower insulation layer 201; forming a germanium-containing layer 202 on the lower insulation layer 201; forming an intermediate insulation layer 202a by reaction among the germanium-containing layer 202, silicon and oxygen; and forming an upper insulation layer 203 on the intermediate insulation layer 202a.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供半导体器件可以将电荷的注入效率提高到电荷存储层中; 及其制造方法。解决方案：该半导体器件的制造方法具有形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储层，形成在电荷存储层上的第二绝缘膜，以及控制栅极形成在第二绝缘膜上的电极包括：形成第一绝缘膜204的工艺; 形成下绝缘层201; 在下绝缘层201上形成含锗层202; 通过含锗层202，硅和氧之间的反应形成中间绝缘层202a; 并在中间绝缘层202a上形成上绝缘层203。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2013214553A Method for manufacturing semiconductor device and semiconductor device 审中-公开
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：JP2013214553A
公开(公告)日：2013-10-17
申请号：JP2012082864
申请日：2012-03-30
申请人： Toshiba Corp , 株式会社東芝
发明人： SAWA KEIICHI , KAI TETSUYA , MORI SHINJI , TORAYA KENICHIRO , TANAKA MASAYUKI
IPC分类号： H01L21/336 , C23C16/02 , C23C16/28 , H01L21/316 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/401 , H01L29/42324 , H01L29/42364 , H01L29/66825 , H01L29/7881
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device and a semiconductor device, capable of improving charge injection efficiency.SOLUTION: A method for manufacturing a semiconductor device of an embodiment comprises the steps of: forming a first insulating film on a semiconductor substrate; forming an absorption film on the first insulating film; forming a germanium-containing film on the absorption film; and forming a second insulating film on the germanium-containing film. A semiconductor device of an embodiment comprises: a semiconductor substrate; a first insulating film formed on the semiconductor substrate; a germanium-containing film formed on the first insulating film so that surface germanium concentration is not more than 1×10atoms/cm; and a second insulating film provided on the germanium-containing film.
摘要翻译：要解决的问题：提供一种能够提高电荷注入效率的半导体器件和半导体器件的制造方法。解决方案：一种实施方式的半导体器件的制造方法包括以下步骤：在第一绝缘膜上形成半导体衬底; 在所述第一绝缘膜上形成吸收膜; 在吸收膜上形成含锗膜; 并在含锗膜上形成第二绝缘膜。实施例的半导体器件包括：半导体衬底; 形成在所述半导体基板上的第一绝缘膜; 形成在第一绝缘膜上的含锗膜，使得锗的锗浓度不超过1×10原子/ cm 2; 以及设置在含锗膜上的第二绝缘膜。

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