专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2014060004A Battery 有权
标题翻译：电池
公开(公告)号：JP2014060004A
公开(公告)日：2014-04-03
申请号：JP2012203402
申请日：2012-09-14
申请人： Toshiba Corp , 株式会社東芝
发明人： MURATA MASAHIRO , KURATA YASUTAKE , YAJIMA TORU , WATANABE HIROSHI
IPC分类号： H01M10/058 , H01M2/02 , H01M2/06 , H01M2/08 , H01M2/26 , H01M2/30 , H01M10/052
CPC分类号： H01M2/02 , H01M2/0202 , H01M2/0237 , H01M2/0275 , H01M2/0287 , H01M2/06 , H01M2/26 , H01M2/266 , H01M10/0413 , H01M10/0431 , H01M10/0525 , H01M10/0587 , H01M2010/4292 , H01M2220/20 , Y02E60/122 , Y02T10/7011
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable battery in which increase in the internal resistance is suppressed for vibration and impact.SOLUTION: A battery including an electrode group 2, an exterior member 1, a positive electrode lead 3, and a negative electrode lead 4 is provided. The electrode group 2 includes a positive electrode 10, a negative electrode 11, a positive electrode collector tub 10a projecting from one end of the electrode group, and a negative electrode collector tub 11a projecting from the other end of the electrode group. The exterior member 1 includes a container in which the electrode group is housed, and edges 5a, 6a for sealing the container by heat-seal. In the electrode group 2, the end of at least one of the positive electrode collector tub 10a and negative electrode collector tub 11a is housed in the container while being held by the edge Enot subjected to heat-seal.
摘要翻译：要解决的问题：提供一种高可靠性的电池，其中内阻的增加被抑制用于振动和冲击。解决方案：一种电池，包括电极组2，外部构件1，正极引线3和负极提供铅4。电极组2包括从电极组的一端突出的正电极10，负电极11，正极集电体电极10a和从电极组的另一端突出的负极集电体水槽11a。外部构件1包括容纳电极组的容器和用于通过热封密封容器的边缘5a，6a。在电极组2中，正极集电体槽10a和负极集电体容器皿11a中的至少一个的端部被被热封的边缘Enot保持在容器中。

2. 发明专利

JP2013021697A Radio device 有权
标题翻译：无线电设备
公开(公告)号：JP2013021697A
公开(公告)日：2013-01-31
申请号：JP2012183145
申请日：2012-08-22
申请人： Toshiba Corp , 株式会社東芝
发明人： MINEMURA TAKASHI , WATANABE HIROSHI , TSUJIMURA TERUHIRO , SUZUKI HIROMICHI
IPC分类号： H01Q1/52 , G06K19/07 , G06K19/077 , H01Q1/24 , H01Q7/06
摘要： PROBLEM TO BE SOLVED: To inhibit frequency splitting occurring when antennas are located close to each other in radio reception and transmission performed by placing the antennas of two radio devices so as to face each other.SOLUTION: A portable communication terminal 1 has a substrate 16, a magnetic sheet 18, an antenna 17, and conductive elements 19a, 19b. The portable communication terminal 1 is positioned so that a mark 15 provided at a rear surface of a housing matches with a mark 25 of a reader writer 2 and is moved close to the reader writer 2 so as to face the reader writer 2. The portable communication terminal 1 has the conductive elements 19a, 19b, and the conductive elements 19a, 19b are disposed so that at least parts of the conductive elements 19a, 19b overlap with a part of the antenna 27 when a figure of the antenna 27 of the reader writer 2 is viewed from above.
摘要翻译：要解决的问题：为了防止当通过将两个无线电设备的天线彼此相对地进行的无线电接收和发送中天线彼此靠近而发生频率分割。解决方案：便携式通信终端1具有基板16，磁性片18，天线17和导电元件19a，19b。便携式通信终端1被定位成使得设置在壳体的后表面处的标记15与读写器2的标记25匹配并且被移动靠近读写器2以面对读写器2.便携式通信终端通信终端1具有导电元件19a，19b，并且导电元件19a，19b被布置成使得当读取器的天线27的图形时，导电元件19a，19b的至少一部分与天线27的一部分重叠作家2从上面看。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2011040138A Multi-dot flash memory 有权
标题翻译：多点闪存
公开(公告)号：JP2011040138A
公开(公告)日：2011-02-24
申请号：JP2009188637
申请日：2009-08-17
申请人： Toshiba Corp , 株式会社東芝
发明人： ICHIKAWA HISASHI , WATANABE HIROSHI
IPC分类号： G11C16/06 , G11C16/02 , G11C16/04 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L27/11551
摘要： PROBLEM TO BE SOLVED: To provide a multi-dot flash memory that reduces power consumption in writing/erasing. SOLUTION: In a multi-dot flash memory, electric potentials V2(1), V2(2), V2(3), ..., on bit lines BL13, BL12, BL11, ..., satisfy V2(1)>V2(2)>V2(3)>, ..., where the bit lines BL13, BL12, BL11, ..., are provided on the left side of a selected floating gate for writing/erasing. On the other hand, electric potentials V1(1), V1(2), V1(3), ..., on bit lines BL14, BL15, BL16, ..., satisfy V1(1) COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供减少写/擦除功耗的多点闪存。解决方案：在多点闪存中，位线BL13，BL12，BL11，...上的电位V2（1），V2（2），V2（3），...满足V2（ 1）> V2（2）> V2（3）> ...，其中位线BL13，BL12，BL11，...设置在所选择的用于写入/擦除的浮动栅极的左侧。另一方面，位线BL14，BL15，BL16，...上的电位V1（1），V1（2），V1（3），...满足V1（1）

4. 发明专利

JP2011040061A Control system 有权
标题翻译：控制系统
公开(公告)号：JP2011040061A
公开(公告)日：2011-02-24
申请号：JP2010173818
申请日：2010-08-02
申请人： Toshiba Corp , 株式会社東芝
发明人： OTSUKA TORU , HASHIMOTO TAKEO , WATANABE HIROSHI
IPC分类号： G08C19/00 , G05B19/042 , G05B19/05
CPC分类号： G05B19/0421
摘要： PROBLEM TO BE SOLVED: To provide a control system that improves safety when a CPU malfunctions by reducing the load of the CPU. SOLUTION: The control system includes a main control module and one or more unit control modules each connected to a sensor. Each of the unit control modules includes: a clock generation means which generates a predetermined clock signal; a counter means which counts the clock signal and generates a forced OFF signal when the count value reaches a predetermined count value; an ON/OFF information holding means which holds ON/OFF information of the output port; an edge detection means which detects that the ON/OFF information held by the ON/OFF information holding means is changed and outputs a count permission signal to the counter means when the change is detected; and a control means which instructs at least one of whether to output the forced OFF signal by the counter means and whether to count the signal, according to a predetermined operation mode set by the main control module. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种控制系统，通过减少CPU的负载来提高CPU故障时的安全性。解决方案：控制系统包括一个主控模块和一个或多个单元控制模块，每个单元控制模块都连接到传感器。每个单元控制模块包括：时钟产生装置，其产生预定的时钟信号; 计数器装置，当计数值达到预定计数值时，对时钟信号进行计数并产生强制关闭信号; ON / OFF信息保持装置，其保持输出端口的ON / OFF信息; 检测由ON / OFF信息保持装置保持的ON / OFF信息改变的边缘检测装置，当检测到改变时，向计数装置输出计数许可信号; 以及控制装置，其根据由主控制模块设定的预定操作模式指示是否由计数器装置输出强制关闭信号和是否对信号进行计数中的至少一个。版权所有（C）2011，JPO＆INPIT

5. 发明专利

JP2010199300A Multi-dot flash memory and method of manufacturing the same 有权
标题翻译：多点闪存及其制造方法
公开(公告)号：JP2010199300A
公开(公告)日：2010-09-09
申请号：JP2009042548
申请日：2009-02-25
申请人： Toshiba Corp , 株式会社東芝
发明人： ICHIKAWA HISASHI , WATANABE HIROSHI , KAWABATA KENJI
IPC分类号： H01L21/8247 , G11C16/04 , H01L27/00 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28132 , G11C16/0483 , H01L27/11519 , H01L27/11521 , H01L27/11524
摘要： PROBLEM TO BE SOLVED: To provide a new cell array architecture for a multi-dot flash memory. SOLUTION: The multi-dot flash memory includes: an active area AA arranged in a first direction, which extends in a second direction crossed to the first direction, wherein the first and second directions are parallel to a semiconductor substrate; a floating gates FG arranged in the first direction, which is provided on the active area AA; a word line WL provided on the floating gate FG, which extends in the first direction; and bit lines BLs and BLr provided between the floating gates FG, which extend in the second direction. Each of the floating gates FG has two side surfaces in the first direction, wherein the shapes of the two side surfaces are different from each other, and the shapes of the two facing surfaces of the floating gates FG adjacent to each other in the first direction are symmetrical. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为多点闪存提供新的单元阵列架构。多点闪速存储器包括：沿与第一方向交叉的第二方向延伸的沿第一方向布置的有源区AA，其中第一和第二方向平行于半导体衬底; 布置在第一方向上的浮动栅FG，设置在有源区AA上; 设置在浮置栅极FG上的字线WL，其在第一方向上延伸; 以及设置在沿第二方向延伸的浮置栅极FG之间的位线BL和BLr。每个浮动栅极FG在第一方向具有两个侧表面，其中两个侧表面的形状彼此不同，并且浮置栅极FG的两个相对表面的形状在第一方向上彼此相邻是对称的。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2010098349A Radio communication apparatus 有权
标题翻译：无线电通信设备
公开(公告)号：JP2010098349A
公开(公告)日：2010-04-30
申请号：JP2008264939
申请日：2008-10-14
申请人： Toshiba Corp , 株式会社東芝
发明人： WATANABE HIROSHI
IPC分类号： H01Q1/52 , G06K19/07 , G06K19/077 , H01Q1/24 , H01Q7/00 , H01Q9/30 , H04B1/38 , H04B1/3822 , H04B5/02 , H04M1/02
CPC分类号： H01Q1/243 , H01Q7/00 , H01Q9/30 , H01Q9/40 , H01Q21/28 , Y10T29/49016
摘要： PROBLEM TO BE SOLVED: To improve antenna characteristics by suppressing coupling between an antenna for RFID (Radio Frequency Identification) of a radio communication apparatus and an antenna for another system. SOLUTION: A planate flexible substrate 11 is provided on a bottom surface of a housing 10 of the radio communication apparatus 1. The flexible substrate 11 has a conductor pattern, which is wound in a coil shape and has both ends connected to a first feed point 12 to constitute a first antenna 13 for RFID. A second antenna 15 connected to a second feed point 14 is provided nearby one side surface of the housing 10. A magnetic material sheet 16 is provided over the flexible substrate 11 to cover the first antenna 13. On a reverse surface of a pressing member 17 provided over the magnetic material sheet 16, a coupling suppressing element 18 is provided which is made of a conductor formed planate. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过抑制无线电通信装置的RFID天线（射频识别）和另一系统的天线之间的耦合来提高天线特性。解决方案：在无线电通信装置1的壳体10的底表面上设置有平面的柔性基板11.柔性基板11具有卷绕成线圈形状并且两端连接到第一馈电点12构成用于RFID的第一天线13。连接到第二馈电点14的第二天线15设置在壳体10的一个侧表面附近。磁性材料片16设置在柔性基板11上方以覆盖第一天线13.在按压部件17的相反表面设置在磁性材料片16上的耦合抑制元件18由平面形成的导体制成。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2009009359A Method and unit for generating three-dimensional structure data, computer program, recording medium, and computer system 有权
标题翻译：用于生成三维结构数据的方法和单元，计算机程序，记录介质和计算机系统
公开(公告)号：JP2009009359A
公开(公告)日：2009-01-15
申请号：JP2007170111
申请日：2007-06-28
申请人： Toshiba Corp , 株式会社東芝
发明人： WATANABE HIROSHI
IPC分类号： G06F17/50 , G06T17/00
CPC分类号： G06F17/50
摘要： PROBLEM TO BE SOLVED: To provide a three-dimensional structure data generation method capable of easily generating three-dimensional structure data. SOLUTION: The three-dimensional structure data generation method of a three-dimensional structure, constituted of a plurality of different materials, prepares mutually orthogonal first and second two-dimensional section images of the three-dimensional structure; generates first and second unit diagrams based on the above two-dimensional images; sections the above unit diagrams on a material-by-material basis; disposes the two unit diagrams in an orthogonal state; forms three dimension by expanding the two unit diagrams in a perpendicular direction; and assigns a selected material for an area in which sections of the two unit diagrams are not coincident, among areas in which the respective sections of the two unit diagrams intersect. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供能够容易地生成三维结构数据的三维结构数据生成方法。解决方案：由多种不同材料构成的三维结构的三维结构数据生成方法制备三维结构的相互正交的第一和第二二维截面图像; 基于上述二维图像生成第一和第二单元图; 在逐个物质的基础上对上述单位图进行分段; 将两个单位图处理为正交状态; 通过在垂直方向上扩展两个单位图来形成三维; 并且在两个单位图的各个部分相交的区域中为两个单位图的部分不一致的区域分配所选择的材料。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2008153451A Nonvolatile semiconductor memory, and its manufacturing method 有权
标题翻译：非线性半导体存储器及其制造方法
公开(公告)号：JP2008153451A
公开(公告)日：2008-07-03
申请号：JP2006340201
申请日：2006-12-18
申请人： Toshiba Corp , 株式会社東芝
发明人： WATANABE HIROSHI , ARAI FUMITAKA
IPC分类号： H01L21/8247 , H01L21/336 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L21/28273 , H01L21/84 , H01L27/115 , H01L27/1203 , H01L29/456 , H01L29/66825 , H01L29/78621 , H01L29/78627 , H01L29/7881
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile memory which can suppress variations in characteristics and can reduce an S-factor by using a polysilicon SOI (silicon on insulator).
SOLUTION: The memory comprises: a substrate 1; a first insulating film 3 formed on the substrate 1; semiconductor films 5, 5' made of polysilicon and formed on the insulating film 3; a tunnel film 9 formed on the semiconductor films 5, 5'; floating gate 11 formed on the tunnel film 9; a second insulating film 13 formed on the floating gate 11; a control gate 15 formed on the second insulating film 13; and a conductor region 7 made of metal silicide, passed through the semiconductor films 5, 5' and formed on the first insulating film 3 to be opposed thereto and to sandwich the semiconductor films 5, 5' under the floating gate 11.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种可以抑制特性变化的非易失性存储器，并且可以通过使用多晶硅SOI（绝缘体上硅）来降低S因子。存储器包括：衬底1; 形成在基板1上的第一绝缘膜3; 形成在绝缘膜3上的由多晶硅制成的半导体膜5,5' 形成在半导体膜5,5'上的隧道膜9; 形成在隧道膜9上的浮动门11; 形成在浮动栅极11上的第二绝缘膜13; 形成在第二绝缘膜13上的控制栅极15; 和由金属硅化物制成的导体区域7，穿过半导体膜5,5'并形成在与其相对的第一绝缘膜3上，并将半导体膜5,5'夹在浮置栅极11下方。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2008047704A Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：JP2008047704A
公开(公告)日：2008-02-28
申请号：JP2006222001
申请日：2006-08-16
申请人： Toshiba Corp , 株式会社東芝
发明人： WATANABE HIROSHI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/4925 , H01L21/28273 , H01L27/115 , H01L29/42324
摘要： PROBLEM TO BE SOLVED: To fine a memory cell by restraining IPD leak.
SOLUTION: The nonvolatile semiconductor memory has a semiconductor substrate 11, a first insulating layer 13 on the semiconductor substrate 11, a floating gate electrode FG on the first insulating layer 13, a second insulating layer 15 on the floating gate electrode FG, and a control gate electrode CG on the second insulating layer 15. The floating gate electrode FG is constituted of a first metallic layer 14a in contact with the first insulating layer 13, a second metallic layer 14b in contact with the second insulating layer 15, and a semiconductor layer 14c between the first and second metallic layers 14a, 14b.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过限制IPD泄漏来处理存储器单元。解决方案：非易失性半导体存储器具有半导体衬底11，半导体衬底11上的第一绝缘层13，第一绝缘层13上的浮置栅电极FG，浮栅电极FG上的第二绝缘层15，以及在第二绝缘层15上的控制栅电极CG。浮栅电极FG由与第一绝缘层13接触的第一金属层14a，与第二绝缘层15接触的第二金属层14b和在第一和第二金属层14a，14b之间的半导体层14c。版权所有（C）2008，JPO＆INPIT

10. 发明专利

JP2008005149A Radio apparatus 审中-公开
标题翻译：无线电设备
公开(公告)号：JP2008005149A
公开(公告)日：2008-01-10
申请号：JP2006171652
申请日：2006-06-21
申请人： Toshiba Corp , 株式会社東芝
发明人： OTSUBO YUTAKA , WATANABE HIROSHI
IPC分类号： H01Q1/24 , H04B1/3822 , H04B1/40 , H04M1/02
摘要： PROBLEM TO BE SOLVED: To improve an antenna gain without largely depending on constraint of relative position relation of two cabinets, operating frequency, or packaging in a radio apparatus composed by connecting two cabinets. SOLUTION: The radio apparatus 1 includes a first cabinet 10 which contains a first device board 11 in which a feeding point 15 of an antenna is prepared, a second cabinet 20 which contains a second device board 21, and a connection unit 30 which connects the first cabinet 10 and the second cabinet 20. The grounding circuit of the first device board 11 and a grounding circuit of a second device board 21 are connected through the connection unit 30 which is conductive and a variable reactance circuit 17. Reactance of the variable reactance circuit 17 is adjusted so that a radiation electromagnetic field formed by a return current of the antenna which flows the grounding circuit of the first device board 11, and a radiation electromagnetic field formed by the return current which flows through the grounding circuit of the second device board 21, strengthen each other. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提高天线增益，而不在很大程度上取决于两个机柜的相对位置关系的约束，工作频率或包装在由连接两个机柜组成的无线电设备中。解决方案：无线电设备1包括第一机柜10，其包含其中准备有天线的馈电点15的第一设备板11，包含第二设备板21的第二机柜20和连接单元30 其连接第一机壳10和第二机壳20.第一设备基板11的接地电路和第二设备基板21的接地电路通过导电连接单元30和可变电抗电路17连接。电抗调整可变电抗电路17，使得由流过第一器件基板11的接地电路的天线的回流形成的辐射电磁场和通过接地电路流过的返回电流形成的放射线电磁场第二设备板21彼此加强。版权所有（C）2008，JPO＆INPIT

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式