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    • 2. 发明专利
    • Imprint recipe creation device and method, and imprint device and method
    • IMPRINT RECIPE CREATION DEVICE AND METHOD AND IMPRINT DEVICE AND METHOD
    • JP2012054322A
    • 2012-03-15
    • JP2010194231
    • 2010-08-31
    • Toshiba Corp株式会社東芝
    • MIKAMI SHINJIINENAMI RYOICHI
    • H01L21/027B29C59/02B81C1/00
    • G03F7/0002B82Y10/00B82Y40/00
    • PROBLEM TO BE SOLVED: To reduce a creation time of an imprint recipe.SOLUTION: According to this embodiment, an imprint recipe creation device comprises first to fifth creation part 111 to 115. The first creation part 111 creates standard shot internal information using filling amount information and residual film thickness information. The second creation part 112 creates first wafer surface internal information using shot position information, edge information and the standard shot internal information. The third creation part 113 creates first correction information using unevenness information indicating unevenness of a substrate and unevenness distribution information indicating variation in uneven wafer surface. The fourth creation part 114 creates second correction information using post-process information indicating variation of processing dimension in a post-process. The fifth creation part 115 creates second wafer surface internal information by synthesizing the first wafer surface internal information, the first correction information, and the second correction information.
    • 要解决的问题:减少打印食谱的创建时间。 解决方案:根据本实施例,压印配方创建装置包括第一至第五创建部分111至115.第一创建部分111使用填充量信息和剩余胶片厚度信息创建标准拍摄内部信息。 第二创建部分112使用拍摄位置信息,边缘信息和标准拍摄内部信息来创建第一晶片表面内部信息。 第三创建部113使用表示基板的不均匀性的不平坦信息和指示不均匀晶片表面的变化的不均匀性分布信息来创建第一校正信息。 第四创建部分114使用指示后处理中的处理维度的变化的后处理信息来创建第二校正信息。 第五创建部分115通过合成第一晶片表面内部信息,第一校正信息和第二校正信息来创建第二晶片表面内部信息。 版权所有(C)2012,JPO&INPIT
    • 3. 发明专利
    • Patterning method and patterning device
    • 绘图方法和图案设备
    • JP2012049262A
    • 2012-03-08
    • JP2010188663
    • 2010-08-25
    • Toshiba Corp株式会社東芝
    • TSUTSUI TOMOHIROIKENAGA OSAMUINENAMI RYOICHI
    • H01L21/027B29C59/02
    • G03F7/0002B82Y10/00B82Y40/00
    • PROBLEM TO BE SOLVED: To provide a patterning method and a patterning device which are advantageous for improving the TAT (turn around time).SOLUTION: A patterning method includes a first step ST11 for transferring a first pattern region S101 out of a plurality of pattern regions onto a substrate to be processed using a template 21 on which a plurality of pattern regions, consisting of patterns formed on a substrate, are arranged, a second step ST12 for counting up the number of times of transfer of the first pattern region and storing the number of times of transfer, a third step ST13 for determining whether or not the stored number of times of transfer of the first pattern region exceeds a prescribed number of times, and a fourth step ST14 for switching to a second pattern region S103 out of a plurality of the pattern regions when the third step determines that it exceeds the prescribed number of times, and transferring the second pattern region to the substrate to be processed.
    • 要解决的问题:提供有利于改善TAT(转向时间)的图案化方法和图案形成装置。 解决方案:图案化方法包括:第一步骤ST11,用于使用模板21将多个图案区域中的第一图案区域S101转移到待处理的基板上,模板21上形成有由形成在其上的图案组成的多个图案区域 布置基板;第二步骤ST12,用于对第一图案区域的传送次数进行计数并存储传送次数;第三步骤ST13,用于确定存储的传送次数是否 第一图案区域超过规定次数,第四步骤ST14,当第三步骤确定超过规定次数时,切换到多个图案区域中的第二图案区域S103,并且转印第二图案区域 图案区域到待处理的基板。 版权所有(C)2012,JPO&INPIT
    • 4. 发明专利
    • Imprinting mold and pattern forming method
    • 冲压模具和图案形成方法
    • JP2012000992A
    • 2012-01-05
    • JP2011158229
    • 2011-07-19
    • Toshiba Corp株式会社東芝
    • FURUDONO YOKOINENAMI RYOICHINOMURA HIROSHI
    • B29C59/02B29C33/38H01L21/027
    • PROBLEM TO BE SOLVED: To provide an imprinting mold capable of suppressing the generation of mold defect.SOLUTION: The imprinting mold includes a substrate, an uneven pattern provided on the substrate and corresponding to a pattern to be transcribed, and a gas permeability region having higher permeability to an inert gas than that of fused quartz to which impurities are not added. The permeability to the inert gas is a property to take the inert gas into the substrate from a surface opposite to the uneven pattern when the uneven pattern is brought into contact with an imprint agent applied on a substrate to be processed, and the gas permeability region has two or more regions with different permeability to the inert gas from the surface opposite to a surface on which the uneven pattern is formed toward the surface on which the uneven pattern is formed.
    • 要解决的问题:提供能够抑制模具缺陷产生的压印模具。 解决方案:压印模具包括基板,设置在基板上并对应于待转印的图案的不均匀图案,以及与惰性气体相比具有比不含杂质的熔融石英更高的渗透性的气体渗透性区域 添加。 惰性气体的渗透性是当不平坦图案与施加在待处理基板上的压印剂接触时,将惰性气体从与不均匀图案相反的表面吸入基板中,气体透过率区域 具有与形成有凹凸图案的表面相反的表面朝向形成有凹凸图案的表面的与惰性气体的渗透性不同的两个以上的区域。 版权所有(C)2012,JPO&INPIT
    • 5. 发明专利
    • Flare correction method, and method of manufacturing semiconductor device
    • 熔点校正方法及制造半导体器件的方法
    • JP2011066079A
    • 2011-03-31
    • JP2009213488
    • 2009-09-15
    • Toshiba Corp株式会社東芝
    • INENAMI RYOICHIKYO SUIGEN
    • H01L21/027G03F1/70
    • G03F7/70941G03F1/70G03F7/70558
    • PROBLEM TO BE SOLVED: To provide a flare correction method for accurately and rapidly performing flare correction, and to provide a method of manufacturing a semiconductor device.
      SOLUTION: A mask pattern is divided into a region 102 near a region 101 of a flare distribution calculation object and a region 103 far there from; a pattern density distribution is calculated for the region 102 by mesh division; and pattern coverage in the whole region 103 is calculated for the region 103. A flare PSF corresponding to the region 102 and the pattern density distribution are convolved to obtain a first flare distribution. A flare PSF corresponding to the region 103 is integrated, the integral value is multiplied by the pattern coverage to obtain a flare value to be added to a first flare distribution. Since a calculation volume of the convolution is reduced and influence of flare in a long-distance region is added, flare correction can be accurately and rapidly performed.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种用于准确和快速地进行光斑校正的闪光校正方法,并且提供一种制造半导体器件的方法。 解决方案:掩模图案被分成在耀斑分布计算对象的区域101附近的区域102和远离的区域103; 通过网格分割计算区域102的图案密度分布; 并且针对区域103计算整个区域103中的图案覆盖。对应于区域102的光斑PSF和图案密度分布进行卷积以获得第一耀斑分布。 积分与区域103对应的耀斑PSF,积分值乘以图案覆盖,以获得要添加到第一耀斑分布的耀斑值。 由于卷积的计算量减少,并且在长距离区域中的火炬的影响被加入,所以可以准确而快速地执行闪光校正。 版权所有(C)2011,JPO&INPIT
    • 6. 发明专利
    • Wafer exposure method, and euv exposure apparatus
    • WAFER曝光方法和EUV曝光装置
    • JP2009295816A
    • 2009-12-17
    • JP2008148346
    • 2008-06-05
    • Toshiba Corp株式会社東芝
    • INENAMI RYOICHITOKI TATSUHIKO
    • H01L21/027G03F7/20
    • G03B27/42G03F7/7045
    • PROBLEM TO BE SOLVED: To obtain a wafer exposure method and an EUV exposure apparatus which are capable of easily improving the throughput of wafer exposure.
      SOLUTION: The wafer exposure method includes: an EUV exposure step of subjecting a product region which becomes a product chip, on a wafer 5 to EUV exposure by an EUV exposure processing part 1; and an EB exposure step of subjecting a peripheral region on the wafer 5 to EB exposure by an EB exposure part 20C. While one wafer 5 is subjected to EUV exposure by the EUV exposure processing part 1, another wafer 5 different from the wafer 5 subjected to EUV exposure is subjected to EB exposure by the EB exposure part 20C.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:获得能够容易地提高晶片曝光的生产量的晶片曝光方法和EUV曝光装置。 晶片曝光方法包括:EUV曝光步骤,其通过EUV曝光处理部分1对晶片5上的成为产品芯片的产品区域进行EUV曝光; 以及通过EB曝光部20C对晶片5上的周边区域进行EB曝光的EB曝光工序。 当通过EUV曝光处理部分1对一个晶片5进行EUV曝光时,与经受EUV曝光的晶片5不同的另一个晶片5由EB曝光部分20C进行EB曝光。 版权所有(C)2010,JPO&INPIT
    • 7. 发明专利
    • Design method of aperture mask, generating method of aperture mask, and program
    • 孔径掩模的设计方法,孔径掩模的生成方法和程序
    • JP2008042093A
    • 2008-02-21
    • JP2006217379
    • 2006-08-09
    • Toshiba Corp株式会社東芝
    • INENAMI RYOICHI
    • H01L21/027
    • PROBLEM TO BE SOLVED: To provide a design method of a CP aperture mask capable of shortening a drawing time of a plurality of kinds of devices.
      SOLUTION: A plurality of character patterns CPij (j=1, 2, ...) are acquired for each of a plurality of devices Di(i=1, 2, ...)(S1). The value of shot number reduction effect is calculated using a function whose variable is Eij and Ni or a function whose variable is Eij and Pi when numerizing the shot number reduction effect when drawing a device Di using CPij for each of CPij of device Di, where Ni is the number of chips if chips containing device Di are tiled on a wafer, Eij is efficiency for CP with CPij being used, and Pi is a parameter correlated to the number of chips (S2). A specified number of CPs are selected in such order as the highest value of shot number reduction effect is selected first, among a plurality of CPij of a plurality of devices Di (S3).
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供能够缩短多种设备的绘制时间的CP孔径掩模的设计方法。 解决方案:针对多个设备Di(i = 1,2,...)(S1)中的每一个获取多个字符模式CPij(j = 1,2,...)。 使用变量为Eij和Ni的函数,或者使用设备Di的CPij中的每一个使用CPij对装置Di进行数字化时的数量减少效果进行计数时,计算出数量减少效果的值,其中变量为Eij和Pi。 Ni是在晶片上平铺包含器件Di的芯片的数量,Eij是使用CPij的CP的效率,Pi是与芯片数相关的参数(S2)。 在多个设备Di(S3)的多个CPij中首先选择喷射次数减少效果的最高值的顺序来选择指定数量的CP。 版权所有(C)2008,JPO&INPIT
    • 8. 发明专利
    • Method and apparatus of electron beam lithography
    • 电子束光刻的方法与装置
    • JP2006310392A
    • 2006-11-09
    • JP2005128231
    • 2005-04-26
    • Toshiba Corp株式会社東芝
    • INENAMI RYOICHINAKASUGI TETSUO
    • H01L21/027
    • H01J37/3174B82Y10/00B82Y40/00
    • PROBLEM TO BE SOLVED: To make it possible to correct data finely during conversion of data or to accurately calculate writing time by using writing data by designing the writing data obtained by converting design data.
      SOLUTION: In electron beam lithography of a variable shaped beams (VSB) method and a character projection (CP) method for forming a resist pattern by electron beam writing, electron beam writing data are comprised of writing pattern data represented by an aggregation of a VSB shot or a CP shot as a minimum unit during writing, and CP aperture data describing IDs and positions of the respective aperture of a formed aperture (CP aperture) having a character-pattern-shaped aperture. On the basis of the writing data, the electron beam lithography apparatus is used to write a pattern to a resist pattern.
      COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:为了在数据转换期间精确地校正数据,或者通过设计通过转换设计数据获得的写入数据,通过使用写入数据来精确地计算写入时间是可能的。 解决方案:在通过电子束写入形成抗蚀剂图案的可变形波束(VSB)方法和字符投影(CP)方法的电子束光刻中,电子束写入数据包括由聚合表示的写入图案数据 在写入期间作为最小单位的VSB拍摄或CP拍摄,以及描述具有字符图案形状的孔的形成的孔径(CP孔径)的相应孔径的ID和位置的CP孔径数据。 基于写入数据,使用电子束光刻设备将图案写入抗蚀剂图案。 版权所有(C)2007,JPO&INPIT
    • 9. 发明专利
    • Device and method for electronic beam exposure
    • 电子束曝光装置及方法
    • JP2006294794A
    • 2006-10-26
    • JP2005112117
    • 2005-04-08
    • Toshiba Corp株式会社東芝
    • INENAMI RYOICHI
    • H01L21/027
    • H01J37/3174B82Y10/00B82Y40/00H01J37/3175H01J2237/31764
    • PROBLEM TO BE SOLVED: To carry out drawing without reducing a throughput, even if a circuit pattern is made complicating for microfabrication.
      SOLUTION: An electron beam exposure device is equipped with an electron gun 1, a rectangle opening selection deviation apparatus 3, a rectangle opening selection amplifier 4, a first formation aperture 6, a character selection deviation apparatus 9, a character selection deviation amplifier 10, a second formation aperture 11, an image formation lens system 12, an object deviation amplifier 15 for controlling an object main deviation apparatus 13 of this lens system 12 and an object secondary deviation apparatus 14, a deflection control unit 16, a drawing information storage 17 for memorizing a drawing method of a circuit pattern, and a movable stage 19 wherein a wafer 18 is placed. Since several rectangle openings from which size differs are provided in the first formation aperture 6 and several character openings from which size differs in the second formation aperture 11 are provided according to it, the optimal opening size can be selected according to the circuit pattern, and the reduction of the number of shots can be attained.
      COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:即使电路图案使微细加工变得复杂化,在不降低生产量的情况下进行拉伸。 解决方案:电子束曝光装置配备有电子枪1,矩形开口选择偏差装置3,矩形开口选择放大器4,第一形成孔6,字符选择偏差装置9,字符选择偏差 放大器10,第二形成孔11,图像形成透镜系统12,用于控制该透镜系统12的物体主偏差装置13的物体偏差放大器15和物体二次偏离装置14,偏转控制单元16, 用于存储电路图形的绘图方法的信息存储器17以及放置晶片18的可移动台19。 由于在第一形成孔6中设置有尺寸不同的几个矩形开口,并且根据其设置了第二形成孔11中的尺寸不同的几个字符开口,所以可以根据电路图案来选择最佳开口尺寸,并且 可以实现拍摄次数的减少。 版权所有(C)2007,JPO&INPIT
    • 10. 发明专利
    • パターン転写用モールド及びパターン形成方法
    • 模式转换模式和模式形成方法
    • JP2015023189A
    • 2015-02-02
    • JP2013150947
    • 2013-07-19
    • 株式会社東芝Toshiba Corp
    • RI NAGAYOSHIINENAMI RYOICHISANHONGI AKIKOSATO TAKASHISAITO MASATOKOKUBU KOICHI
    • H01L21/027B29C59/02
    • C25D5/02C25D11/005C25D11/022C25D11/32G03F7/0002
    • 【課題】微細パターンが転写可能なパターン転写用モールド及びパターン形成方法を提供する。【解決手段】実施形態によれば、基体と、第1積層体と、第2積層体と、第1電極と、第2電極と、を含むパターン転写用モールドが提供される。基体は、第1面を有する基部と、第1面上に設けられ第1側面を有する第1凸部と、第1面上に設けられ第1側面に対向する第2側面を有する第2凸部と、を含む。第1積層体は、第1側面上に設けられ、第1方向に並ぶ複数の第1導電層と、第1導電層の間に設けられた第1絶縁層と、を含む。第2積層体は、第2側面上に設けられ、第1方向に並ぶ複数の第2導電層と、第2導電層の間に設けられた第2絶縁層と、を含む。第2積層体は、第1、2凸部、第1、第2積層体よりも硬度が低い材料、または、気体を第1積層体との間に収容可能である。電極は、第1、第2導電層に接続される。【選択図】図1
    • 要解决的问题:提供能够转印精细图案的图案转印模具和图案形成方法。解决方案根据实施例,提供了一种图案转印模具,其包括基板,第一层压板,第二层压板, 第一电极和第二电极。 基板包括具有第一面的基部,设置在第一面上的具有第一侧的第一突出部和设置在第一面上并具有与第一面相反的第二侧的第二突出部。 第一层压体包括设置在第一侧并沿第一方向排列的多个导电层,以及设置在第一导电层之间的第一绝缘层。 第二层叠体包括设置在第二侧并沿其第一方向排列的多个导电层。 第二层压体的材料的硬度比第一和第二突起和第一和第二层压板的硬度低,或者能够容纳第一层压体和其本身之间的气体。 电极连接到第一和第二导电层。