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1. 发明专利

JP2010087089A Semiconductor storage element, and method of manufacturing the same 有权
标题翻译：半导体存储元件及其制造方法
公开(公告)号：JP2010087089A
公开(公告)日：2010-04-15
申请号：JP2008252411
申请日：2008-09-30
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , FUJII AKISUKE , FUJIKI JUN , TAKASHIMA AKIRA , SHINGU MASAO , MATSUSHITA DAISUKE , YASUDA NAOKI , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L29/517 , H01L29/66833
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor storage element that can accumulate and erase electric charge with higher efficiency than a conventional charge storage film using SiN, and holds the accumulated electric charge for a long time, and to provide a method of manufacturing the semiconductor storage element.
SOLUTION: The semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on the charge storage film; a gate electrode provided on the block insulating film; and a region containing gas molecules, the region being provided in a neighborhood of an interface between the charge storage film and the block insulating film.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体存储元件，其可以比使用SiN的常规电荷存储膜更高的效率地累积和擦除电荷，并且长时间保持积累的电荷，并且提供一种方法制造半导体存储元件。解决方案：半导体存储元件包括：设置在半导体衬底中的源极区域和漏极区域; 设置在所述源极区域和所述漏极区域之间的所述半导体衬底上的隧道绝缘膜; 设置在隧道绝缘膜上的电荷存储膜; 设置在电荷存储膜上的块状绝缘膜; 设置在所述块绝缘膜上的栅电极; 以及包含气体分子的区域，该区域设置在电荷存储膜和块绝缘膜之间的界面附近。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2010192579A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2010192579A
公开(公告)日：2010-09-02
申请号：JP2009033840
申请日：2009-02-17
申请人： Toshiba Corp , 株式会社東芝
发明人： SHINGU MASAO , TAKASHIMA AKIRA , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/788 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42324 , H01L29/4234 , H01L29/513 , H01L29/66825
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device wherein some reliability deterioration is controlled that is caused by an interface between a top insulating layer and an element separation insulating layer.
SOLUTION: The semiconductor device includes: a semiconductor substrate 11; a laminated structure wherein a tunnel insulating film 12, a charge storage layer 13, a top insulating layer 14, and a control electrode 15 are disposed and laminated in order on the semiconductor substrate; an element separation insulating layer 16 arranged on a lateral side of the laminated structure; and an impurity doping layer 11A formed on both sides of the tunnel insulating film of the semiconductor substrate. The element separation insulating layer consists at least of one of SiO
2 , SiN, and SiON; the top insulating layer is an oxide containing at least one metal M selected from a group of a rare earth metal, Y, Zr, and Hf, and Si; and respective channel length directional lengths L
charge , L
top , and L
gate of the charge storage layer, the top insulating layer, and the control electrode satisfy the formula: L
charge , L
gate top .
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体器件，其中由顶部绝缘层和元件隔离绝缘层之间的界面引起的一些可靠性劣化被控制。解决方案：半导体器件包括：半导体衬底11; 其中在半导体衬底上依次层叠隧道绝缘膜12，电荷存储层13，顶部绝缘层14和控制电极15的叠层结构; 布置在层叠结构的侧面上的元件分离绝缘层16; 以及形成在半导体衬底的隧道绝缘膜两侧的杂质掺杂层11A。元件分离绝缘层至少由SiO 2，SiN和SiON中的一种构成; 顶部绝缘层是含有选自稀土金属，Y，Zr和Hf中的至少一种金属M的氧化物和Si; 以及电荷存储层，顶部绝缘层和控制层的各个沟道长度方向长度L 电荷，L 顶部和L 栅极电极满足下列公式：L 电荷，L 栅极顶部。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2010182963A Nonvolatile semiconductor storage device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：JP2010182963A
公开(公告)日：2010-08-19
申请号：JP2009026603
申请日：2009-02-06
申请人： Toshiba Corp , 株式会社東芝
发明人： TAKASHIMA AKIRA , SHINGU MASAO , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L21/316 , H01L21/8242 , H01L27/108 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28282 , H01L21/02145 , H01L21/02156 , H01L21/02161 , H01L21/28273 , H01L27/11521 , H01L27/11568 , H01L29/4234 , H01L29/513
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device that reduces a leakage current in a high electric field region or low electric field region, and to provide a method of manufacturing the same. SOLUTION: The nonvolatile semiconductor storage device includes source/drain regions 111 provided in surface regions of a semiconductor substrate 101 and provided apart from each other, a tunnel insulating film 102 provided on a channel between the source/drain regions 111, a charge storage layer 103 provided on the tunnel insulating film 102, a first dielectric film 105 provided on the charge storage layer 103 and containing lantern aluminum silicon oxide or oxynitride, a second dielectric film 106 provided on the first dielectric film 105 and containing oxide or oxynitride containing at least one of hafnium (Hf), zirconium (Zr), titanium (Ti), and rare-earth metal, and a control gate electrode 107 provided on the second dielectric film 106. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种降低高电场区域或低电场区域中的漏电流的非易失性半导体存储装置，并提供其制造方法。解决方案：非易失性半导体存储装置包括设置在半导体衬底101的表面区域并且彼此分开设置的源极/漏极区域111，设置在源极/漏极区域111之间的沟道上的隧道绝缘膜102，设置在隧道绝缘膜102上的电荷存储层103，设置在电荷存储层103上并包含铝氧化铝或氧氮化物的第一电介质膜105，设置在第一电介质膜105上并含有氧化物或氮氧化物的第二电介质膜106 含有铪（Hf），锆（Zr），钛（Ti）和稀土金属中的至少一种，以及设置在第二电介质膜106上的控制栅电极107.权利要求（C） JPO＆INPIT

4. 发明专利

JP2013115260A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013115260A
公开(公告)日：2013-06-10
申请号：JP2011260667
申请日：2011-11-29
申请人： Toshiba Corp , 株式会社東芝
发明人： SAKUMA KIWAMU , KUSAI HARUKA , FUJII AKISUKE , CHO AKIMI , KIYOTOSHI MASAHIRO , SHINGU MASAO
IPC分类号： H01L21/8247 , H01L21/336 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/41 , H01L29/786 , H01L29/788 , H01L29/792 , H01L45/00 , H01L49/00
CPC分类号： H01L27/1157 , H01L21/265 , H01L21/845 , H01L27/11551 , H01L27/11578 , H01L27/1211 , H01L27/2436 , H01L27/2481 , H01L29/42332 , H01L29/7881 , H01L29/792 , H01L45/04
摘要： PROBLEM TO BE SOLVED: To definitely select one from among a plurality of semiconductor layers on a semiconductor substrate.SOLUTION: A semiconductor device according to an embodiment comprises: first through third semiconductor layers 12-1-12-3; and a layer selection transistor 15 (LST) selecting one from among the first through third semiconductor layers 12-1-12-3. The first semiconductor layer 12-1 includes a normally-on region 17-1 causing channels adjacent to first through third gate electrodes 16-1-16-3 to be normally-on channels. The second semiconductor layer 12-2 includes a normally-on region 17-2 causing channels adjacent to second through fourth gate electrodes 16-2-16-4 to be normally-on channels. The third semiconductor layer 12-3 includes a normally-on region 17-3 causing channels adjacent to third through fifth gate electrodes 16-3-16-5 to be normally-on channels.
摘要翻译：要解决的问题：从半导体衬底上的多个半导体层中确定地选择一个。解决方案：根据实施例的半导体器件包括：第一至第三半导体层12-1-12-3; 以及选择第一至第三半导体层12-1-12-3中的一个的层选择晶体管15（LST）。第一半导体层12-1包括通常区域17-1，使得与第一至第三栅电极16-1-16-3相邻的通道成为正常通道。第二半导体层12-2包括使与第二至第四栅电极16-2-16-4相邻的通道作为通常通道的常开区域17-2。第三半导体层12-3包括使与第三至第五栅电极16-3-16-5相邻的通道作为通常通道的常通区域17-3。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2010045074A Nonvolatile semiconductor memory element, nonvolatile semiconductor device, and method for operating nonvolatile semiconductor element 有权
标题翻译：非易失性半导体存储器元件，非易失性半导体器件以及非易失性半导体元件的操作方法
公开(公告)号：JP2010045074A
公开(公告)日：2010-02-25
申请号：JP2008206291
申请日：2008-08-08
申请人： Toshiba Corp , 株式会社東芝
发明人： SHINGU MASAO , FUJIKI JUN , YASUDA NAOKI , MURAOKA KOICHI
IPC分类号： H01L21/8247 , G11C16/02 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7883 , G11C11/40 , G11C16/0408 , G11C16/0466 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , H01L21/28282 , H01L27/11521 , H01L27/11556 , H01L27/11582 , H01L29/4234 , H01L29/495 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To effectively suppress a change of a threshold value for a nonvolatile semiconductor memory element during holding data by effectively suppressing charge emission from the upper insulating layer of the nonvolatile semiconductor memory element when holding the data. SOLUTION: The nonvolatile semiconductor memory element includes: a semiconductor substrate 1; a source region 2 and a domain region 3 provided in the surface of the semiconductor substrate 1; a tunnel insulating film 4 provided on the semiconductor substrate; a conductive charge accumulating layer 5 provided on the tunnel insulating film 4; the upper insulating layer 6 provided on the conductive charge accumulating layer 5; and a control gate 7 provided on the upper insulating layer 6. The upper insulating layer 6 is a laminated structure consisting of a transmission insulating layer 6a, a charge trapping layer 6b and a block layer 6c. The trap level density of the charge trapping layer 6b is greater than the trap level density of each of the transmission insulating layer 6a and the block layer 6c, and a leak current in the transmission insulating layer 6a is higher than a leak current in the block layer 6c. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：通过在保持数据时有效地抑制来自非易失性半导体存储元件的上绝缘层的电荷发射，在保持数据期间有效地抑制非易失性半导体存储元件的阈值的变化。解决方案：非易失性半导体存储元件包括：半导体衬底1; 源极区域2和设置在半导体衬底1的表面中的畴区域3; 设置在半导体基板上的隧道绝缘膜4; 设置在隧道绝缘膜4上的导电电荷累积层5; 设置在导电电荷累积层5上的上绝缘层6; 以及设置在上绝缘层6上的控制栅极7.上绝缘层6是由传输绝缘层6a，电荷捕获层6b和阻挡层6c组成的层压结构。电荷捕获层6b的陷阱电平密度大于传输绝缘层6a和阻挡层6c的陷阱电平密度，并且传输绝缘层6a中的泄漏电流高于块中的泄漏电流层6c。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2009239216A Semiconductor device, and method for manufacturing semiconductor device 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：JP2009239216A
公开(公告)日：2009-10-15
申请号：JP2008086770
申请日：2008-03-28
申请人： Toshiba Corp , 株式会社東芝
发明人： SHINGU MASAO , KIKUCHI SACHIKO , TAKASHIMA AKIRA , INO TSUNEHIRO , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L21/31604 , H01L29/513 , H01L29/517 , H01L29/66833
摘要： PROBLEM TO BE SOLVED: To suppress characteristic variation of a semiconductor device by suppressing reaction of high-dielectric-constant insulating films to other component members even after a heat treatment when the semiconductor device is manufactured by forming a gate insulating film and an interlayer insulating film of the thermally stable high-dielectric-constant insulating films.
SOLUTION: In the semiconductor device, sidewalls are made of at least one of SiO
2 , SiN, SiON, and a top insulating film or gate insulating film is made of an oxide of at least one metal M selected from a rare earth metal group consisting of Y, Zr, Hf, and Al, Si so that the number ratio Si/M of Si to the metal M is set to no less than a number ratio at a solid solubility limit of SiO
2 in a composite oxide including the metal M and Al and the dielectric constant of the top insulating film or gate insulating film is equal to or less than the dielectric constant of Al
2 O
3 and so that the number ratio Al/M of Al to the metal M is set to no less than a number ratio Al/M where the crystallization of an oxide of the metal M is suppressed by the reaction of the Al element and set to no more than a number ratio where the crystallization of the Al
2 O
3 is suppressed through the action of the metal M.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：即使在通过形成栅极绝缘膜制造半导体器件时，即使在热处理之后也抑制高介电常数绝缘膜与其它部件的反应来抑制半导体器件的特性变化，以及热稳定的高介电常数绝缘膜的层间绝缘膜。解决方案：在半导体器件中，侧壁由SiO 2，SiN，SiON中的至少一种制成，并且顶部绝缘膜或栅极绝缘膜由至少一种金属M选自由Y，Zr，Hf和Al，Si组成的稀土金属组，使得Si与金属M的Si / M的数量比被设定为不小于固溶度极限的数量比包含金属M和Al的复合氧化物中的SiO 2 和顶部绝缘膜或栅极绝缘膜的介电常数等于或小于Al 2 版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2013110193A Nonvolatile semiconductor storage device and manufacturing method of the same 审中-公开
标题翻译：非线性半导体存储器件及其制造方法
公开(公告)号：JP2013110193A
公开(公告)日：2013-06-06
申请号：JP2011252444
申请日：2011-11-18
申请人： Toshiba Corp , 株式会社東芝
发明人： KUSAI HARUKA , SAKUMA KIWAMU , SHINGU MASAO , FUJII AKISUKE , KIYOTOSHI MASAHIRO
IPC分类号： H01L21/8247 , H01L21/336 , H01L27/115 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To inhibit lateral displacement of a charge in a charge storage layer.SOLUTION: A nonvolatile semiconductor storage device according to an embodiment comprises: first through n-th semiconductor layers (n is a natural number more than 1) 12-1-12-3; and first through n-th memory strings S1-S3 employing the first through n-th semiconductor layers 12-1-12-3 as channels. The i-th memory string Si (i is one of 1-n) includes on a surface of the i-th semiconductor layer 12-i in a third direction, a plurality of charge storage layers 16 and a plurality of control gates 18, which correspond to a plurality of memory cells MC. In the i-th memory string, the charge storage layers 16 of at least two memory cells MC adjacent to each other in a second direction are bonded to each other. Further, among the plurality of control gates 18, a metal element 19 for increasing band offset of the plurality of charge storage layers 16 is added.
摘要翻译：要解决的问题：为了抑制电荷存储层中的电荷的横向位移。解决方案：根据实施例的非易失性半导体存储器件包括：第一至第n半导体层（n为大于1的自然数）12-1-12-3; 以及采用第一至第n半导体层12-1-12-3作为通道的第一至第n存储器串S1-S3。第i个存储器串Si（i是1-n之一）包括在第三方向上的第i个半导体层12-i的表面上，多个电荷存储层16和多个控制栅极18，其对应于多个存储单元MC。在第i个存储器串中，在第二方向上彼此相邻的至少两个存储单元MC的电荷存储层16彼此接合。此外，在多个控制栅极18中，添加用于增加多个电荷存储层16的带偏移的金属元件19。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2011216715A Semiconductor memory element, and semiconductor memory device 有权
标题翻译：半导体存储器元件和半导体存储器件
公开(公告)号：JP2011216715A
公开(公告)日：2011-10-27
申请号：JP2010084332
申请日：2010-03-31
申请人： Toshiba Corp , 株式会社東芝
发明人： INO TSUNEHIRO , MATSUSHITA DAISUKE , NAKASAKI YASUSHI , SHINGU MASAO
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28282 , B82Y10/00 , B82Y30/00 , H01L27/11578 , H01L27/11582 , H01L29/42348 , H01L29/7923 , H01L29/7926
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory element highly efficiently accumulating and erasing charges and holding the accumulated charges for a long time, and to provide a semiconductor memory device.SOLUTION: The semiconductor memory element includes a semiconductor layer 19, a tunnel insulating film 18 formed on the semiconductor layer 19, a charge accumulation film 16 disposed on the tunnel insulating film 18, having a film thickness of at least 0.9 nm and not more than 2.8 nm, and containing cubic crystal HfO2 particles 17, a block insulating film 15 disposed on the charge accumulation film 16, and a control electrode 13 disposed on the block insulating film 15.
摘要翻译：要解决的问题：提供一种半导体存储元件，其高效地积累和擦除电荷并保持长时间的累积电荷，并提供半导体存储器件。解决方案：半导体存储元件包括半导体层19，隧道绝缘形成在半导体层19上的膜18，设置在隧道绝缘膜18上的电荷累积膜16，膜厚度为至少0.9nm且不大于2.8nm，并且包含立方晶体HfO 2颗粒17，块状绝缘膜设置在电荷累积膜16上的控制电极13和设置在块绝缘膜15上的控制电极13。

9. 发明专利

JP2010182964A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2010182964A
公开(公告)日：2010-08-19
申请号：JP2009026604
申请日：2009-02-06
申请人： Toshiba Corp , 株式会社東芝
发明人： TAKASHIMA AKIRA , SHINGU MASAO , MURAOKA KOICHI , SHIMIZU TATSUO , KAMIMUTA YUICHI
IPC分类号： H01L21/316 , H01L21/822 , H01L27/04 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a gate insulating film which has a high dielectric constant and can reduce a leakage current. SOLUTION: The semiconductor device includes a first dielectric film 23 provided on a semiconductor substrate 11 and containing lantern aluminum silicon oxide or oxynitride, a second dielectric film 24 provided on the first dielectric film 23 and containing oxide or oxynitride containing at least one of hafnium (Hf), zirconium (Zr), titanium (Ti), and rare-earth metal, and an electrode 14 provided on the second dielectric film 24. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供具有高介电常数并能够减小漏电流的栅极绝缘膜的半导体器件。解决方案：半导体器件包括设置在半导体衬底11上并包含铝氧化铝或氮氧化物的第一电介质膜23，设置在第一电介质膜23上并含有氧化物或氧氮化物的第二电介质膜24，其包含至少一个的铪（Hf），锆（Zr），钛（Ti）和稀土类金属，以及设置在第二电介质膜24上的电极14.权利要求：（C）2010，JPO＆INPIT

10. 发明专利

JP2010080646A Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：JP2010080646A
公开(公告)日：2010-04-08
申请号：JP2008246690
申请日：2008-09-25
申请人： Toshiba Corp , 株式会社東芝
发明人： TAKASHIMA AKIRA , SHINGU MASAO , YASUDA NAOKI , MURAOKA KOICHI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/513 , H01L27/11568 , H01L29/4234 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To improve both the leakage current characteristics in a high electric field region and of a low electric field region.
SOLUTION: This nonvolatile semiconductor memory device includes a source region 110S and a drain region 110D formed apart from each other inside a semiconductor substrate 101; a first insulating film 102 formed on a channel region between the source region 110S and the drain region 110D; an electric charge storing layer 103 formed on the first insulating film 102; a second insulating film 104, which is formed on the electric charge storing layer 103 and includes a laminated structure, in which a first lanthanum aluminum silicate film and a first silicon oxide film or a first silicon oxynitriding film are stacked; and a control gate electrode 105 formed on the second insulating film 104.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提高高电场区域和低电场区域中的漏电流特性。解决方案：该非易失性半导体存储器件包括在半导体衬底101内部彼此分开形成的源极区域110S和漏极区域110D; 形成在源极区域110S和漏极区域110D之间的沟道区域上的第一绝缘膜102; 形成在第一绝缘膜102上的电荷存储层103; 第二绝缘膜104，其形成在电荷存储层103上并且包括叠层结构，其中堆叠第一硅酸铝镧硅酸盐膜和第一氧化硅膜或第一氧氮化氮化膜; 以及形成在第二绝缘膜104上的控制栅电极105.版权所有（C）2010，JPO＆INPIT

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