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    • 1. 发明专利
    • Power conversion device
    • 电源转换器件
    • JP2013046525A
    • 2013-03-04
    • JP2011183899
    • 2011-08-25
    • Toshiba Corp株式会社東芝
    • ARAI KIYOTAKA
    • H02M7/48H02M7/487
    • PROBLEM TO BE SOLVED: To provide a 3-level power conversion device with a reduced number of components.SOLUTION: In a 3-level power conversion device, a wiring configuration for connecting elements is changed from 3-phase individual wiring to 3-phase integral wiring. Thereby, a wiring inductance is reduced, a surge voltage of the elements is suppressed, a phase-capacitor snubber circuit, which has been added to a conventional power conversion device, is eliminated, and the device is simplified in configuration and can be manufactured at a low cost and in a reduced size.
    • 要解决的问题:提供具有减少数量的部件的3级电力转换装置。 解决方案:在3级电源转换装置中,连接元件的布线配置从3相单独布线改为3相整体布线。 从而,消除了布线电感,元件的浪涌电压被抑制,已经添加到传统的电力转换装置中的相电容缓冲电路被消除,并且该装置的结构简化,并且可以在 成本低,体积小。 版权所有(C)2013,JPO&INPIT
    • 2. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2005302925A
    • 2005-10-27
    • JP2004115163
    • 2004-04-09
    • Toshiba Corp株式会社東芝
    • OKUMURA HIDEKIKITAGAWA MITSUHIKOHARA TAKUMAINO TAKAYOSHITSUCHIYA MASANOBUTAJI SATOSHIARAI KIYOTAKA
    • H01L29/78H01L27/04H01L29/06H01L29/10H01L29/423H01L29/94
    • H01L29/7813H01L29/0653H01L29/1095H01L29/42368
    • PROBLEM TO BE SOLVED: To provide a semiconductor device capable of effectively reducing on-state resistance and output capacitance without reducing breakdown voltage between a source and a drain, and to provide a photo relay comprising the semiconductor device.
      SOLUTION: A semiconductor device 100 comprises a semiconductor substrate 110; a semiconductor layer 120 provided on the front surface of the semiconductor substrate; a base layer 130 provided on the front surface of the semiconductor layer 120; a source layer 140 provided on the front surface of the base layer; a trench 150 formed such that it penetrates from the front surface of the source layer through the source layer, the base layer, and the semiconductor layer and reaches the semiconductor substrate; a gate electrode 170 extending from the source layer to at least the semiconductor layer in the trench; and an insulator 160 provided between the gate electrode and the base layer, such that the interior of the trench under the gate electrode is filled with the insulator and the gate electrode is insulated from the base layer.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 解决的问题:提供能够有效地降低导通状态电阻和输出电容而不降低源极和漏极之间的击穿电压的半导体器件,并提供包括半导体器件的光电继电器。 解决方案:半导体器件100包括半导体衬底110; 设置在半导体衬底的前表面上的半导体层120; 设置在半导体层120的前表面上的基底层130; 源极层140,设置在基底层的前表面上; 形成为使得其从源极层的前表面穿过源极层,基极层和半导体层并到达半导体基板的沟槽150; 栅电极170,其从所述源极层延伸至所述沟槽中的至少所述半导体层; 以及设置在栅电极和基层之间的绝缘体160,使得栅电极下方的沟槽的内部填充有绝缘体,并且栅电极与基层绝缘。 版权所有(C)2006,JPO&NCIPI
    • 3. 发明专利
    • Inverter device in power converter
    • 电源转换器中的逆变器装置
    • JP2010115045A
    • 2010-05-20
    • JP2008286545
    • 2008-11-07
    • Toshiba Corp株式会社東芝
    • ARAI KIYOTAKA
    • H02M7/48
    • PROBLEM TO BE SOLVED: To prevent breakage of all DC-connected switching elements so as to prevent the breakage from developing into a serious accident.
      SOLUTION: A power converter has a following configuration. A DC voltage source is voltage-divided by two or more smoothing capacitors connected in series. A switching element group of switching arms of two or more phases is ON/OFF controlled so as to obtain an AC output voltage having potential of three or more levels based on the divided DC voltage by the smoothing capacitors. The power converter is configured by using packages (PC1, PC3) respectively in which one switching element constituting the switching element group and one clamp diode for setting clamp potential are sealed in the same one package, and a package (PC2) in which a plurality of switching elements constituting the switching element group are sealed in the same package.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:防止所有直流连接的开关元件断裂,以防止断裂发展成严重事故。 电源转换器具有以下配置。 直流电压源由串联连接的两个以上的平滑电容器分压。 两相或多相的开关臂的开关元件组被开/关控制,以便通过平滑电容器获得基于分压直流电压的三电平或更多电位的交流输出电压。 电源转换器通过分别使用构成开关元件组的一个开关元件和用于设定钳位电位的一个钳位二极管封装在同一个封装中的封装(PC1,PC3)以及封装(PC2)来构成,其中多个 构成开关元件组的开关元件被密封在相同的封装中。 版权所有(C)2010,JPO&INPIT
    • 4. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2006179664A
    • 2006-07-06
    • JP2004371056
    • 2004-12-22
    • Toshiba Corp株式会社東芝
    • ONO SHOTAROKAWAGUCHI YUSUKEYAMAGUCHI YOSHIHIROMATSUKI HIROFUMIARAI KIYOTAKA
    • H01L29/78
    • H01L29/7813H01L29/0696
    • PROBLEM TO BE SOLVED: To improve avalanche resistance after reducing ON resistance in a semiconductor device such as a power MOSFET with a trench gate structure.
      SOLUTION: A power MOSFET 21 has an n-type drift layer 10 and a p-type base layer 11 laminated and formed thereon. A trench gate 17 is formed to get at the n-type drift layer 10 passing through the p-type base layer 11. An n
      + -type source region 18 and a p
      + -type region 19 are formed on the p-type base layer 11. They are adjacently disposed alternately along a longitudinal direction of the trench gate 17. The n
      + -type source region 18 and the p
      + -type region 19 are disposed to intersect with each other having an inclination to the longitudinal direction of the trench gate 17.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:在具有沟槽栅极结构的诸如功率MOSFET的半导体器件中降低导通电阻之后提高雪崩阻力。 解决方案:功率MOSFET21具有层叠并形成在其上的n型漂移层10和p型基极层11。 形成沟槽栅极17以便在通过p型基极层11的n型漂移层10处获得.n + SP / SP型源极区域18和ap 型区域19形成在p型基极层11上。它们沿着沟槽栅极17的纵向相互交替布置.n + SP +型源区域18和p < SP> + 型区域19设置成相对于沟槽栅极17的纵向具有倾斜度相互交叉。(C)2006,JPO和NCIPI