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1. 发明专利

JPS5930792A Apparatus for growing single crystal 失效
标题翻译：用于生长单晶的装置
公开(公告)号：JPS5930792A
公开(公告)日：1984-02-18
申请号：JP13804082
申请日：1982-08-10
申请人： Toshiba Corp
发明人： USAMI TOSHIROU
IPC分类号： C30B15/00 , C30B15/10 , C30B29/06 , H01L21/208
CPC分类号： C30B15/10
摘要： PURPOSE:To prolong the service lives of a heater and heat insulating tubes and to prevent reduction in the rate of single crystallization of a grown crystal due to reduction in the amount of SiC powder, by regulating the amount of a carrier gas passing through the gap between a main heat insulating tube placed around the heater in a chamber and an upper heat insulating tube to a prescribed value or above. CONSTITUTION:A crucible 10 is put in the lower part 51 of a chamber 50, a cylindrical carbon heater 3 is placed around the crucible 10, and a main heat insulating tube 4 is placed around the heater 3 apart from the heater 3 and the wall of the part 51. The inside of an upper heat insulating tube 6 is fixed on the wall of the part 51 at a height close to the upper edge of the crucible 10. A gap 13 is left between the tubes 4, 6, and since the gap 13 is present, when gaseous Ar introduced as a carrier gas from the upper part 52 of the chamber is exhausted 12 with a vacuum pump 8, it is exhausted through the space between the tube 4 and the wall of the part 51 as a pass besides the inside and outside of the heater 3. By changing the cross-sectional area of the gap 13, the ratio of the amount of Ar passing through the gap to the total amount is regulated to >=0.4 to prolong the life of the heater and to improve the concn. of C in a crystal.
摘要翻译：目的：为了延长加热器和绝热管的使用寿命，并且通过调节通过间隙的载气量，防止由于SiC粉末的量的减少而使生长的晶体的单结晶速率降低在放置在室内的加热器周围的主绝热管和上部绝热管之间达到规定值以上。构成：将坩埚10放入室50的下部51，在坩埚10的周围放置圆筒状的碳加热器3，在加热器3的周围设置有隔热管3和主体隔热管4，上部绝热管6的内部以接近坩埚10的上边缘的高度固定在部件51的壁上。间隙13留在管4,6之间，因此存在间隙13时，当从真空泵8排出来自腔室上部52的作为载气的气态Ar被排出时，其通过管4与部件51的壁之间的空间排出，作为通过改变间隙13的横截面积，通过间隙的Ar的量与总量的比值被调整为> = 0.4以延长加热器3的内部和外部。加热器并改善浓度的C在一个水晶。

2. 发明专利

JPS58185495A Silicon nitride jig for pulling up silicon single crystal 失效
标题翻译：硅胶浸渍硅胶单晶
公开(公告)号：JPS58185495A
公开(公告)日：1983-10-29
申请号：JP6577582
申请日：1982-04-20
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp
发明人： MATSUO HIDEYASU , NAGASHIMA HIDEO , WATANABE MASAHARU , USAMI TOSHIROU , MURAOKA HISASHI
IPC分类号： C04B35/584 , C30B15/10 , C30B15/34 , C30B29/06 , H01L21/208
CPC分类号： C30B15/10
摘要： PURPOSE:In a jig for pulling up single crystal silicon, the part contacting with the silicon melt is finished on its surface up to a prescribed level of roughness to enable constant production of good-quality single crystal silicon. CONSTITUTION:A silicon nitride jig is used to pull up a cylindrical and plate single crystal of silicon form its melt. More than 90% of the area with which the silicon melt comes into contact is finished to such a level of surface roughness less than 400mu in Hmax. This finishing causes no polycrystallization of the silicon to give good-quality single crystal of silicon constantly.
摘要翻译：目的：在用于拉出单晶硅的夹具中，与硅熔体接触的部分在其表面上完成达到规定的粗糙度，以使得能够恒定地生产优质单晶硅。构成：使用氮化硅夹具从其熔体中提取硅的圆柱形和板状单晶。超过90％的硅熔体接触区域的表面粗糙度达到Hmax以下的表面粗糙度小于400μm。这种整理不会导致硅的多晶化，从而不断地提供优质硅晶体。

3. 发明专利

JPS60189971A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS60189971A
公开(公告)日：1985-09-27
申请号：JP4521684
申请日：1984-03-09
申请人： Toshiba Corp
发明人： USAMI TOSHIROU , MIKATA YUUICHI , SHINADA KAZUYOSHI
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L21/28273 , Y10S148/053 , Y10S148/138 , Y10S148/169
摘要： PURPOSE: To contrive the improvement in characteristic of withstand voltage of the oxide film on an amorphous single crystal Si film and in leakage characteristic by a method wherein an amorphous single crystal Si film serving as the first gate electrode is deposited on a semiconductor substrate and an insulation film is then formed thereon, through which an impurity is ion-implanted to the amorphous single crystal Si film, and the insulation film is removed; thereafter, the second gate oxide film is formed on the surface of the amorphous single crystal Si film.
CONSTITUTION: A field oxide film 22 is formed on the surface of the P
- type Si substrate 21 having a crystal orientation of (100); thereafter, the first gate oxide film 23 is formed on the surface of the substrate 21 surrounded by the oxide film 22 by heat treatment. Next, the first polycrystalline Si film 24 of no doping is deposited over the entire surface. Phosphorus is ion-implanted to the polycrystalline Si film 24 through a CVD oxide film 25. After annealing in a nitrogen atmosphere, the oxide film 25 is removed. Then, the second gate oxide film 26 is formed on the surface of the polycrystalline Si film 24. The second polycrystalline Si film 27, second gate oxide film 26, first polycrystalline film 24, and first gate oxide film 23 are successively removed by etching.
COPYRIGHT: (C)1985,JPO&Japio
摘要翻译：目的：通过在半导体衬底上沉积作为第一栅电极的非晶单晶Si膜而将半导体衬底上的氧化物膜的耐电压特性提高到非晶单晶硅膜的漏电特性，然后在其上形成绝缘膜，将杂质离子注入到非晶单晶Si膜中，并除去绝缘膜; 此后，在非晶单晶Si膜的表面上形成第二栅氧化膜。构成：在具有（100）晶体取向的P型Si衬底21的表面上形成场氧化膜22。此后，通过热处理在由氧化物膜22包围的基板21的表面上形成第一栅极氧化膜23。接下来，在整个表面上沉积无掺杂的第一多晶Si膜24。通过CVD氧化膜25将磷离子注入到多晶硅膜24中。在氮气气氛中退火后，除去氧化膜25。然后，在多晶硅膜24的表面上形成第二栅极氧化膜26.通过蚀刻，依次除去第二多晶Si膜27，第二栅极氧化膜26，第一多晶膜24和第一栅极氧化膜23。

4. 发明专利

JPS58181792A Apparatus for pulling up single crystal silicon 失效
标题翻译：用于拉出单晶硅的装置
公开(公告)号：JPS58181792A
公开(公告)日：1983-10-24
申请号：JP6509882
申请日：1982-04-19
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp
发明人： MATSUO HIDEYASU , NAGASHIMA HIDEO , WATANABE MASAHARU , USAMI TOSHIROU , MURAOKA HISASHI
IPC分类号： C30B15/10 , C30B15/12 , C30B15/30 , C30B29/06 , H01L21/208
CPC分类号： C30B15/305
摘要： PURPOSE:To prevent a change in the resistance value of single crystal Si and to uniformalize and reduce the concn. of oxygen as an impurity by immersing a silicon nitride structure in molten Si in the crucible of an apparatus for manufacturing single crystal Si by the CZ method to prevent the convection of the molten Si. CONSTITUTION:A quartz crucible 2 is supported in a chamber 1 by a freely rotatable rod 4 through a graphite protector 3 covering the outside of the crucible 2, and a cylindrical heater 5 and heat insulating tubes 6, 7 are arranged around the protector 3 in order. Si as a starting material and a dopant for controlling the resistance value of a single crystal Si ingot are put in the crucible 2 and melted with the heater 5. A seed crystal 8 attached to the lower end of a rotatable pulling shaft 9 is dipped in the molten Si10, and the shaft 9 is pulled up. In order to prevent the convection of the molten Si10 during the pulling, a crucible-shaped silicon nitride structure 11 having holes 11a... at the desired positions of the bottom is immersed in the Si10, and the upper part protruding from the surface of the melt 10 is supported on the crucible 2.
摘要翻译：目的：防止单晶硅电阻值的变化，均匀化，降低浓度。通过用CZ法将用于制造单晶Si的装置的坩埚中的氮化硅结构浸渍在熔融Si中的氧作为杂质，以防止熔融Si的对流。构成：石英坩埚2通过可自由旋转的棒4通过覆盖坩埚2的外部的石墨保护器3支撑在腔室1中，并且圆柱形加热器5和隔热管6,7围绕保护器3布置订购。将作为原料的Si和用于控制单晶Si锭的电阻值的掺杂剂放入坩埚2中并用加热器5熔化。将安装在可旋转的牵引轴9的下端的晶种8浸入熔融的Si10和轴9被拉起。为了防止熔融Si10在拉拔期间的对流，将具有位于底部的所需位置的孔11a ...的坩埚状氮化硅结构11浸渍在Si10中，并且从上表面突出的上部熔体10被支撑在坩埚2上。

5. 发明专利

JPS58181797A Apparatus for pulling up single crystal silicon 失效
标题翻译：用于拉出单晶硅的装置
公开(公告)号：JPS58181797A
公开(公告)日：1983-10-24
申请号：JP6509982
申请日：1982-04-19
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp
发明人： MATSUO HIDEYASU , NAGASHIMA HIDEO , WATANABE MASAHARU , USAMI TOSHIROU , MURAOKA HISASHI
IPC分类号： C30B15/10 , C30B15/14 , C30B29/06 , H01L21/208
CPC分类号： C30B15/10
摘要： PURPOSE:To inhibit increase in the concns. of carbon and oxygen in single crystal Si and to prevent deterioration in the characteristics of a semiconductor device, by specifying the materials of the crucible, the protector and the heat insulating tubes of an apparatus for manufacturing single crystal Si by the CZ method. CONSTITUTION:A crucible 2 is supported in a chamber 1 by a freely rotatable rod 4 through a protector 3 covering the outside of the crucible 2, and a cylindrical carbon heater 5 and heat insulating tubes 6, 7 are arranged around the protector 3 in order. A pulling shaft 9 holding a seed crystal 8 at the lower end is rotatably suspended from the upper opening of the chamber 1. The crucible 2, the protector 3 and the tubes 6, 7 are made of silicon nitride, silicon carbide or quartz glass. For example, the crucible 2 is made of quartz, and the protector 3 and the tubes 6, 7 are made of a sintered silicon nitride body. Gaseous SiO2 produced by the reaction of molten Si 10 with the crucible 2 does not react with those members, so no gaseous CO is produced, and the concns. of C and O in pulled single crystal Si can be reduced.
摘要翻译：目的：抑制浓度增加的单晶Si中的碳和氧，并且通过用CZ方法指定用于制造单晶Si的装置的坩埚，保护器和隔热管的材料来防止半导体器件的特性的劣化。构成：坩埚2通过可自由转动的杆4通过覆盖坩埚2的外部的保护器3支撑在腔室1中，并且圆筒形碳加热器5和隔热管6,7依次布置在保护器3的周围。保持下端的晶种8的拉动轴9从室1的上开口可旋转地悬挂。坩埚2，保护器3和管6,7由氮化硅，碳化硅或石英玻璃制成。例如，坩埚2由石英制成，保护器3和管6,7由氮化硅烧结体构成。通过熔融Si 10与坩埚2的反应产生的气态SiO 2与这些部件不反应，因此不产生气体CO。的拉伸单晶Si中的C和O可以减少。

6. 发明专利

JPS58185496A Method of making silicon nitride jig for pulling up silicon single crystal 失效
标题翻译：制造硅化硅夹具用于拉伸硅单晶的方法
公开(公告)号：JPS58185496A
公开(公告)日：1983-10-29
申请号：JP6577782
申请日：1982-04-20
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp
发明人： MATSUO HIDEYASU , NAGASHIMA HIDEO , WATANABE MASAHARU , USAMI TOSHIROU , MURAOKA HISASHI
IPC分类号： C04B41/87 , C30B15/10 , C30B15/34 , C30B29/06 , H01L21/208
CPC分类号： C30B15/10
摘要： PURPOSE:After a smooth base material of a desired shape is coated with a film of crystalline silicon nitride by the CVD method, the substrate is removed to give a crucible that can give good-quality single crystal of low oxygen content. CONSTITUTION:A substrate of a desired shape with smooth surfaces, e.g., a glass carbon with a surface roughness of less than 350mu Hmax, is placed in a CVD reaction furnace to effect coating with crystalline silicon nitride. Then, the carbon substrate is removed by oxidation. The resultant silicon nitride crucible has a small surface area and has a small amount of silicon nitride dissolved in the silicon melt, whereby the silicon crystal grows as a single crystal not as a polycrystal.
摘要翻译：目的：通过CVD法将所需形状的光滑基材涂布在结晶氮化硅膜上之后，除去基板，得到可提供低氧含量的优质单晶的坩埚。构成：将具有光滑表面的所需形状的基底，例如表面粗糙度小于350μmHmax的玻璃碳放置在CVD反应炉中，以用结晶氮化硅进行涂覆。然后，通过氧化除去碳基板。所得到的氮化硅坩埚的表面积小，并且在硅熔体中溶解有少量的氮化硅，由此，硅晶体不以多晶为单晶生长。

7. 发明专利

JPS58181798A Manufacture of single crystal silicon 失效
标题翻译：单晶硅的制造
公开(公告)号：JPS58181798A
公开(公告)日：1983-10-24
申请号：JP6510182
申请日：1982-04-19
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp
发明人： MATSUO HIDEYASU , NAGASHIMA HIDEO , WATANABE MASAHARU , USAMI TOSHIROU , MURAOKA HISASHI
IPC分类号： C30B15/14 , C30B15/10 , C30B29/06 , H01L21/208
CPC分类号： C30B15/10
摘要： PURPOSE:To always obtain an Si crystal as a single crystal in the manufacture of single crystal Si by the CZ method using a silicon nitride crucible by restricting the temp. of the crucible. CONSTITUTION:A silicon nitride crucible 2 is supported in a chamber 1 by a rotating shaft 4 through a protector 3 covering the outside of the crucible 2, and a cylindrical heater 5 and heat insulating tubes 6, 7 are arranged around the protector 3 in order. Si as a starting material is put in the crucible 2 and melted with the heater 5. A seed crystal 8 attached to the lower end of a rotatable pulling shaft 9 is dipped in the molten Si 10, and the shaft 9 is pulled up. When the Si is melted, the crucible 2 is kept at
摘要翻译：目的：通过使用氮化硅坩埚通过限制温度通过CZ方法在制造单晶Si中始终获得作为单晶的Si晶体。的坩埚。构成：氮化硅坩埚2通过旋转轴4通过覆盖坩埚2的外部的保护器3支撑在腔室1中，并且圆筒形加热器5和隔热管6,7依次布置在保护器3的周围。将Si作为起始材料放入坩埚2中并用加热器5熔化。将安装在可旋转牵引轴9的下端的晶种8浸入熔融Si 10中，并将轴9拉起。当Si熔化时，坩埚2保持在<= 1520℃。坩埚2的氮化硅容易地溶解在高于温度的熔融Si中。在Si晶体的拉伸过程中氮化硅沉积并漂浮在熔融Si的表面上。沉积的氮化硅接触固体和液体之间的界面，阻碍了Si晶体的生长。当硅晶体被吸收时，Si晶体被制成多晶体。

8. 发明专利

JPS58181794A Die for manufacturing platelike silicon crystal 失效
标题翻译：用于制造板状硅晶体
公开(公告)号：JPS58181794A
公开(公告)日：1983-10-24
申请号：JP6510082
申请日：1982-04-19
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp
发明人： MATSUO HIDEYASU , NAGASHIMA HIDEO , WATANABE MASAHARU , USAMI TOSHIROU , MURAOKA HISASHI
IPC分类号： C30B15/34 , C30B29/06 , H01L21/208
CPC分类号： C30B15/34
摘要： PURPOSE:To efficiently obtain high-quality platelike single crystal Si having a prescribed shape, by filling Si into the hollow part of a die body made of crystalline silicon nitride. CONSTITUTION:A crystalline silicon nitride film 12 is deposited on the outer surface of a polycrystal Si substrate 11 by a CVD method. Both ends of the resulting platelike body are worked to a prescribed shape to obtain a die 14 for manufacturing a platelike Si crystal. The die 14 consists of a hollow frame- shaped die body 13 made of crystalline silicon nitride and the Si substrate 11 filled into the hollow part of the body 13. The die 14 is set on molten Si in a crucible, and pulling is carried out from the top of the die 14 using a platelike seed crystal. The Si substrate 11 in the body 13 is melted to fill the hollow part of the body 13, so the molten Si 15 in the crucible rises efficiently in the hollow part of the body 13, and platelike single crystal Si can be manufactured efficiently. Since the Si substrate 11 is not removed, no pollution is caused, and high-quality platelike single crystal Si is obtd.
摘要翻译：目的：为了有效地获得具有规定形状的高品质板状单晶Si，通过将Si填充到由结晶氮化硅制成的模具体的中空部分中。构成：通过CVD法在多晶Si衬底11的外表面上沉积结晶氮化硅膜12。将所得板状体的两端加工成规定形状，得到板状Si晶体的制造用模具14。模具14包括由结晶氮化硅制成的中空的框状模体13和填充到主体13的中空部分中的Si衬底11.将模具14设置在坩埚中的熔融Si上，并且进行拉伸从模具14的顶部使用板状晶种。主体13中的Si基板11熔化以填充主体13的中空部分，因此坩埚中的熔融Si 15有效地升高到主体13的中空部分中，并且可以有效地制造板状单晶Si。由于Si基板11没有被去除，所以不会产生污染，并且能够获得高质量的板状单晶Si。

9. 发明专利

JPH0279475A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0279475A
公开(公告)日：1990-03-20
申请号：JP23105888
申请日：1988-09-14
申请人： TOSHIBA CORP
发明人： MIKATA YUICHI , USAMI TOSHIROU
IPC分类号： H01L29/78 , H01L29/786
摘要： PURPOSE:To make a semiconductor device in finer structure sideways by furnishing a gate electrode and a certain projection on a semiconductor substrate or an insulative base board, using the side wall of the projection as an electroconductive channel forming region, and by furnishing a MOS FET whose channel direction is across the thickness of the substrate. CONSTITUTION:A projection 23a consisting of polycrystal silicon is formed on the main surface of a semiconductor substrate 21 through an oxide film 22 and a polycrystal silicon film 23b. A pair of gate electrodes 26a facing the side walls with gate oxide films interposed are furnished on both side walls of this projection 23a. Source drain regions 27, 28 are formed over and under the projection 23a, and an electroconductive channel forming region across the thickness of the substrate is formed on the side wall of projection approx. perpendicular to the main surface of the base board. Thereby two vertical type MOS FETs, for ex. common to source electrodes, are obtained which consist of gate electrodes 26a, gate oxide film 25, and side wall of projection. In this FET in the MOS structure, the height of the projection is adjusted without varying the size of element forming region in its sideways direction, and electroconductive channel forming region with desired length is obtained.

10. 发明专利

JPS59201409A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS59201409A
公开(公告)日：1984-11-15
申请号：JP7501983
申请日：1983-04-28
申请人： Toshiba Corp
发明人： USAMI TOSHIROU
IPC分类号： H01L21/02
CPC分类号： H01L21/02
摘要： PURPOSE:To reduce defective patterns and inaccurate wafer discriminations and to automatically control manufacturing conditions by scanning impurity concentration patterns displayed on the surface of a wafer using optical scanning means, transferring the scanning information to a control equipment and drawing out the manufacturing conditions. CONSTITUTION:Saturated aqueous solution wherein P2O3 is dissolved is dropped by a syringe-like dropping device and coated on a specified area on the surface of a silicon substrate (wafer) 1 for the manufacture of semiconductor device and an impurity concentration pattern 4 by a specified number of circles 2 is formed. The pattern 4 is made to be corresponding to a pattern in the control equipment wherein the manufacturing conditions are previously memorized. In the optical means, the pattern 4 is scanned by laser light, the wavelength of which is longer than 8mum and the scanning information of the pattern 4 is transferred to the control equipment. The manufacturing conditions are drawn out from the control equipement by means of the scanning information and defective patterns and inaccurate wafer discriminations are reduced, thus the manufacturing conditions are automatically controlled.
摘要翻译：目的：为了减少错误的图案和不准确的晶片鉴别，并通过使用光学扫描装置扫描在晶片表面上显示的杂质浓度图案来自动控制制造条件，将扫描信息传送到控制设备并绘出制造条件。构成：其中P2O 3溶解的饱和水溶液通过注射器状滴下装置滴下，并涂覆在硅基板（晶片）1的表面上的指定区域上，用于制造半导体器件和杂质浓度图案4通过指定的形成圆圈数2。使图案4对应于控制设备中的模式，其中制造条件被预先存储。在光学装置中，图案4被激光扫描，其波长长于8μm，图案4的扫描信息被传送到控制设备。制造条件通过扫描信息和缺陷图案从控制设备中抽出，并且不准确的晶片识别被减少，从而自动控制制造条件。

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