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    • 1. 发明专利
    • Stack for flat semiconductor element and power converter using it
    • 平板半导体元件和功率转换器堆栈使用它
    • JP2004296764A
    • 2004-10-21
    • JP2003086803
    • 2003-03-27
    • Toshiba Corp株式会社東芝
    • YANO TOSHIYUKIHASHIMOTO TAKASHIMIYAIRI MASAKI
    • H01L23/36H01L25/11
    • PROBLEM TO BE SOLVED: To provide a stack for a flat semiconductor element capable of decreasing a thermal distortion caused by a power loss in the flat semiconductor element.
      SOLUTION: The stack for the flat semiconductor element has two flat semiconductor elements, two coolers for cooling the flat semiconductor elements provided to each of the two flat semiconductor elements, and two metal blocks arranged to the opposite side of the cooler of the two flat semiconductor elements. The stack further has an insulating base engaged with an opposite side of the semiconductor element of the two coolers; an elastic body engaged with at least one insulating base to pressurize a laminated body comprising two flat semiconductor elements, two coolers, two metal blocks, and an insulator; a pressure supporting plate engaged with the elastic body; and a pressurizing means provided to the pressure power supporting body consisting of the elastic body and a pressure supporting plate.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种能够降低由平坦半导体元件中的功率损耗引起的热失真的平坦半导体元件的堆叠。 解决方案:用于平坦半导体元件的堆叠具有两个平坦的半导体元件,用于冷却设置到两个平坦半导体元件中的每一个的平坦半导体元件的两个冷却器和布置在两个平坦半导体元件的冷却器的相对侧上的两个金属块 两个平面半导体元件。 堆叠还具有与两个冷却器的半导体元件的相对侧接合的绝缘基座; 与至少一个绝缘基体接合的弹性体,以对包括两个平坦半导体元件,两个冷却器,两个金属块和绝缘体的层压体加压; 与弹性体接合的压力支撑板; 以及设置在由弹性体和压力支撑板构成的压力动力支撑体上的加压装置。 版权所有(C)2005,JPO&NCIPI
    • 3. 发明专利
    • THYRISTOR VALVE
    • JPH07176686A
    • 1995-07-14
    • JP31885093
    • 1993-12-20
    • TOSHIBA CORP
    • YANO TOSHIYUKIMATSUMOTO HISAAKIIMURA MASAYUKI
    • H01L25/07H01L25/18
    • PURPOSE:To obtain a thyristor valve excellent in aseismic strength by a constitution wherein a plurality of insulating struts made of reinforced plastic are arranged concentrically at a constant interval and thyristor modules are stacked polygonally in a plurality of stages between the insulating struts through module supporting boards. CONSTITUTION:Twelve insulating struts 1 are arranged concentrically and three insulating struts are arranged in the center. A module supporting board 2 is pierced by two insulating struts 1 along with fixing rings 3 and bonded to the insulating struts 1 through an adhesive so that a module 4 is secured between adjacent supporting boards 2 by means of bolts 5. The module 4 is secured such that a thyristor stack 8 is set on the inner peripheral side whereas a capacitor 9 is set on the outer peripheral side and a resistor 10 is disposed therebetween. The stack 8, the resistor 10 and the capacitor 9 are secured collectively to a metal vessel which is then secured to the module supporting board 2 by means of the bolts 5. This structure suppresses the stress generated in the module and the insulating strut thus enhancing aseismic strength.
    • 6. 发明专利
    • JPH05249177A
    • 1993-09-28
    • JP5009092
    • 1992-03-09
    • TOSHIBA CORP
    • YANO TOSHIYUKISHIMIZU TOSHIOTAKANO IKUO
    • G01N3/32G01N3/34G01R31/12
    • PURPOSE:To diagnose the degree of deterioration of an insulating material and the remaining service life of the material until the insulating property of the material becomes insufficient by finding the degree of impact fatigue of the material. CONSTITUTION:The deterioration of an insulating material can be diagnosed from a decline in impact fatigue strength. A linear relation exists between the degree of impact fatigue of the material after arbitrary periods of time t1, t2, and t3 and the degree of initial fatigue 4 of the material. A difference in degree of deterioration appears as a difference in impact fatigue strength after an arbitrary period of time. The area 14 shown in the diagram represents the area of insufficient insulation of the material which can be regarded as the service life of the material. In addition, the impact fatigue characteristic of the material the insulating property of which becomes insufficient also has a nearly linear relation against the impact fatigue strengths at the periods of time t1, t2, and t3. Therefore, the impact fatigue strength 6 of the insulating material is first checked at time of diagnosing the deterioration of the material. Then the strength 6 is connected to the strength 4 with a straight line and the time until the straight line crosses the area 14 can be regarded as the remaining service life 15 of the material.
    • 8. 发明专利
    • Pressure-welding semiconductor device and pressure-welding method of the same
    • 压力焊接半导体器件及其压焊方法
    • JP2013236004A
    • 2013-11-21
    • JP2012108432
    • 2012-05-10
    • Toshiba Corp株式会社東芝Toshiba Mitsubishi-Electric Industrial System Corp東芝三菱電機産業システム株式会社
    • YANO TOSHIYUKITSUNEOKA OSAMUTAKENAKA HIROSHIKARASAWA MASARUTSUMENAGA MASAHIRONAKAJIMA AKIRAOMOTE KENICHIRO
    • H01L25/07H01L23/40H01L23/473H01L25/18
    • PROBLEM TO BE SOLVED: To provide a pressure-welding semiconductor device which reduces the costs, presses with an equal pressure-welding pressure, and achieves high reliability.SOLUTION: A pressure-welding semiconductor device includes: a semiconductor substrate having multiple semiconductor elements; a first cooling mechanism and a second cooling mechanism which are respectively provided on front and rear surfaces of the semiconductor substrate sandwiching the semiconductor substrate therebetween; a first insulation member and a second insulation member which are respectively provided on a front surface of the first cooling mechanism and a rear surface of the second cooling mechanism; and a pressing mechanism sandwiching the first insulation member and the second insulation member from the front and rear surfaces and pressing an area between the first insulation member and the second insulation member with a predetermined pressure. Recessed parts are provided on one of or both of a first pressure welding surface of the first cooling mechanism, which contacts with the first insulation member, and a second pressure welding surface of the second cooling mechanism which contacts with the second insulation member.
    • 要解决的问题:提供降低成本的压焊半导体器件,以相同的压焊压力进行压制,并且实现高可靠性。压焊半导体器件包括:具有多个半导体元件的半导体衬底; 第一冷却机构和第二冷却机构分别设置在半导体基板的夹在其间的半导体基板的前表面和后表面; 分别设置在第一冷却机构的前表面和第二冷却机构的后表面上的第一绝缘构件和第二绝缘构件; 以及按照预定压力将第一绝缘构件和第二绝缘构件从前表面和后表面夹持并按压第一绝缘构件和第二绝缘构件之间的区域的按压机构。 在第一冷却机构的与第一绝缘部件接触的第一压力焊接面和与第二绝缘部件接触的第二冷却机构的第二压力接合面的一个或两侧设置有嵌入部。
    • 9. 发明专利
    • STACK FOR FLAT SEMICONDUCTOR ELEMENT
    • JP2003168778A
    • 2003-06-13
    • JP2001368123
    • 2001-12-03
    • TOSHIBA CORP
    • YANO TOSHIYUKINISHI TADASHI
    • H01L25/11H02M1/00
    • PROBLEM TO BE SOLVED: To provide a stack for a flat semiconductor element having a connection structure of an insulation rod and a pressurizing support plate capable of keeping pressure contact. SOLUTION: A plurality of the flat semiconductor elements 3 and heat sinks 4 are alternately stacked on the inner side of a frame constituted of the insulation rod 2, and conductors 5 are clamped at both ends. A spherical seat 6 and a belleville spring 7 are provided on a stacked body in its upper part, and a lower pressurizing support plate 9 and an upper pressurizing supporting plate 8 supporting them at both ends are arranged. The insulation rod 2 and a connecting metal fitting 10 are connected through a pin 11 attached through a hole provided in the radial direction, the connecting metal fitting 10 of the insulation rod 2 is passed through the upper pressurizing supporting plate 8 and the lower pressurizing support plate 9 and then fixed with a nut 12, and thus the pressure contact of the stack 1 is kept. COPYRIGHT: (C)2003,JPO