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3. 发明专利

JPS53113446A INFORMATION PROCESSOR AND ITS METHOD 失效
公开(公告)号：JPS53113446A
公开(公告)日：1978-10-03
申请号：JP2843277
申请日：1977-03-15
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： SATOU FUMITAKA , IWANE MASAHIKO , MURAYAMA MASAKI
IPC分类号： G06F11/22 , G06F11/00
摘要： PURPOSE:To make easy the execution of test program, by degenerating all the addresses of the main memory unit to the data register in the ports of the main memory interface unit, and protecting the content.

4. 发明专利

JPS53113443A INFORMATION PROCESSING SYSTEM 失效
公开(公告)号：JPS53113443A
公开(公告)日：1978-10-03
申请号：JP2842877
申请日：1977-03-15
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： SATOU FUMITAKA , IWANE MASAHIKO , MURAYAMA MASAKI
IPC分类号： G06F9/22 , G06F3/153 , G06F9/00 , G06F11/00 , G06F11/22 , G06F11/30
摘要： PURPOSE:To process a failure in CPU without manual operation, by providing flopy disc units and a microprocessor with the operation console.

5. 发明专利

JPS6049332B2 失效
公开(公告)号：JPS6049332B2
公开(公告)日：1985-11-01
申请号：JP937477
申请日：1977-01-31
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： MURAYAMA MASAKI
IPC分类号： G06F9/22 , G06F9/26
摘要： A microprogram control system comprising first and second control memories each supplied with microinstructions. The microprogram control system usually executes a microinstruction of a prescribed bit length read out of the first control memory. The first control memory contains data instructing the use of the second control memory. When the first control memory sends forth data instructing the use of the second control memory, a composite microinstruction of larger bit length is executed. The composite microinstruction is formed of a microinstruction read out of the first control memory and a microinstruction read out of the second control memory.

6. 发明专利

JPS5552985A COUNTING DEVICE 失效
公开(公告)号：JPS5552985A
公开(公告)日：1980-04-17
申请号：JP12586578
申请日：1978-10-13
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： MURAYAMA MASAKI
IPC分类号： G04G3/00 , G04F3/00 , G04F5/00
摘要： PURPOSE:To enable counting time in high accuracy for long time by counting pulses of high frequency produced from an oscillator at every half cycle of commercial alternating current by a timer counter and controlling an oscillator enable by n shift counter. CONSTITUTION:A commercial alternating current is applied through a full-wave rectifier 2 and a waveform shaper 3 to a flip-flop FF5, which is thereupon set at every half wave of the commercial alternating current to allow a timer oscillator 6 to generate a clock pulse of higher frequency than the commercial alternating current. When this clock is counted by a timer counter 9 to count the time and also by a decimal counter 8 to cause the counted value to become 10, the flip-flop FF5 is reset through a detector 10 by the pulse from the counter 8 to enable the oscillator 6. Accordingly, an error is not accumulated in the counter 9 to count the time in high accuracy for long time in response to the commercial alternating current stable in period for long time.

7. 发明专利

JPS53113447A INFORMATION PROCESSOR 失效
公开(公告)号：JPS53113447A
公开(公告)日：1978-10-03
申请号：JP2843377
申请日：1977-03-15
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： SATOU FUMITAKA , IWANE MASAHIKO , MURAYAMA MASAKI
IPC分类号： G06F9/22 , G06F11/00 , G06F11/22
摘要： PURPOSE:To increase the reliability of processor, by providing the memory for exclusive use and the control circuit to detect a failure in the processor and by inspecting the processor based on the instruction by the control circuit for exclusive use at idling time of the processor.

8. 发明专利

JPS5394740A MICROPROGRAM CONTROL SYSTEM 失效
公开(公告)号：JPS5394740A
公开(公告)日：1978-08-19
申请号：JP937477
申请日：1977-01-31
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： MURAYAMA MASAKI
IPC分类号： G06F9/22 , G06F9/26
摘要： PURPOSE:To realize the control system of the horizontal micro-instruction form with the low-costed control memory by providing the sub memory in which fields of relatively-low frequency in use are stored and the main memory in which fields of high frequency are stored.

9. 发明专利

JPS51140450A DATA PROCESSING SYSTEM 失效
公开(公告)号：JPS51140450A
公开(公告)日：1976-12-03
申请号：JP6405775
申请日：1975-05-30
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： WAKAI TETSUYA , TADA AKIO , MURAYAMA MASAKI
IPC分类号： G06F12/10 , G06F9/00 , G06F13/00
摘要： PURPOSE:To provide a segmentation system for managing and accessing segments by using segment descriptors and for managing to define segment group to be managed with processing procedure in every procedure by the descriptor list formed from the descriptor in relation to the group in list form to enable of refrrring managing segment of certain procedure dynamically with the program operation of the procedure to the other procedure.

10. 发明专利

JPS51140449A DATA PROCESSING SYSTEM 失效
公开(公告)号：JPS51140449A
公开(公告)日：1976-12-03
申请号：JP6405575
申请日：1975-05-30
申请人： TOKYO SHIBAURA ELECTRIC CO
发明人： SHIMAKURA TATSUROU , SAKAUCHI AKIRA , MURAYAMA MASAKI
IPC分类号： G06F12/10 , G06F9/00 , G06F9/40 , G06F13/00
摘要： PURPOSE:To provide a data processing system which can control moving control information among program sections (segments) divided with regard to logic relation as a descriptor, clarify existence of starting right of special program to the program, and accurately control the connection of control by setting called segment execution start address and various states.

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