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1. 发明专利

JP2000022110A METHOD AND SYSTEM FOR HEAT TREATMENT 失效
公开(公告)号：JP2000022110A
公开(公告)日：2000-01-21
申请号：JP20450198
申请日：1998-07-03
申请人： TOKYO ELECTRON LTD
发明人： HASEBE KAZUHIDE , KUMAGAI TAKESHI , SATO SHOICHI , MATSUNAGA MASANOBU , KIRYU HIDEKI , NAKANO TETSUYA , MIURA KAZUTOSHI
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/108
摘要： PROBLEM TO BE SOLVED: To prevent adverse effect of trace moisture contained in an interlayer insulation film, or the like, by heating a matter to be treated within a range of temperature higher than a point where moisture is desorbed from an oxide containing a trace of moisture and lower than a point where hydrogen bonded to the surface of a silicon film is desorbed. SOLUTION: A substrate W is subjected to pretreatment in a heat treatment furnace for pretreatment. More specifically, the entire substrate W is heated by a high temperature inert gas for a specified time within a range of temperature higher than a point where moisture is desorbed from an interlayer insulation film 16 containing moisture and lower than a point where hydrogen bonded to a doped silicon film 20 is desorbed. The temperature range is 200-400 deg.C and moisture is desorbed from the interlayer insulation film 16 containing moisture and discharged. Since the heating temperature is lower than a point where hydrogen bonded to a lower electrode, i.e., the doped polysilicon film 20, is desorbed, previously desorbed moisture is not bonded to the polysilicon film 20 thus blocking formation of an oxide film retarding growth of nucleus crystal.

2. 发明专利

JP2000323425A PROCESSOR 失效
公开(公告)号：JP2000323425A
公开(公告)日：2000-11-24
申请号：JP13468499
申请日：1999-05-14
申请人： TOKYO ELECTRON LTD
发明人： SUGIURA MASAHITO , JINRIKI HIROSHI , KIRYU HIDEKI , AOYAMA SHINTARO
IPC分类号： H01L21/68 , H01L21/205 , H01L21/26
摘要： PROBLEM TO BE SOLVED: To provide a processor capable of reducing the foot print and enhancing the throughput. SOLUTION: A pre-processing chamber 120 is disposed in a vacuous carrying chamber 102 of a processor. The pre-processing chamber 120 comprises a positioning mechanism 128 which rotates a wafer W mounted on a mounting stand 130, and positions the wafer W by an optical sensor 134; and a UV lamp 124 which radiates UV via a UV transmission window 126 meshing with a ceiling part of the pre-processing chamber 120 on a surface of the wafer W at the same time as positioning, and removes carbon adhered to the wafer W. The UV is radiated also on a processing gas to be supplied into the pre- processing chamber 120 to remove the carbon also by active atoms generated from the processing gas. As the pre-processing chamber 120 is formed in the vacuous carrying chamber 102, the foot print of the processor can be decreased. As the positioning of the wafer W and a contamination removal processing are simultaneously carried out, the throughput is enhanced.

3. 发明专利

JP2001284344A METHOD OF FORMING DIELECTRIC FILM 失效
公开(公告)号：JP2001284344A
公开(公告)日：2001-10-12
申请号：JP2000095818
申请日：2000-03-30
申请人： TOKYO ELECTRON LTD
发明人： KIRYU HIDEKI , AOYAMA SHINTARO , TAKAHASHI TAKESHI , JINRIKI HIROSHI
IPC分类号： C23C16/02 , C23C16/40 , C23C16/44 , C23C16/455 , H01L21/02 , H01L21/28 , H01L21/316 , H01L29/51 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To improve uniformity in a dielectric film and control the composition along the thickness direction of the dielectric film by eliminating incubation time in forming the dielectric film by a CVD method on a Si substrate surface, that is covered by a thin molecular layer of an insulator. SOLUTION: The CVD process for forming the dielectric film starts, after a vapor-phase molecular compound of a metal element that constitutes the dielectric film, is made to adsorb uniformly on the molecular layer of the insulator and is oxidized to form a dielectric molecular layer.

4. 发明专利

JP2001085422A METHOD AND SYSTEM FOR FORMING LAMINATED GATE INSULATING FILM 失效
公开(公告)号：JP2001085422A
公开(公告)日：2001-03-30
申请号：JP26354899
申请日：1999-09-17
申请人： TOKYO ELECTRON LTD
发明人： KIRYU HIDEKI , AOYAMA SHINTARO
IPC分类号： H01L29/78 , H01L21/00 , H01L21/28 , H01L21/311 , H01L21/316 , H01L29/51
摘要： PROBLEM TO BE SOLVED: To provide a method and system for forming a laminated gate insulating film composed of a high-quality thin silicon oxide film and a high dielectric film. SOLUTION: A laminated gate insulating film 63 is composed of a silicon oxide film 61 and a tantalum oxide film 62, which is laminated upon the film 61 and has a higher dielectric constant than that of the film 61. The insulating film 63 is formed, in such a way that the silicon oxide film 61 is formed on the surface of a semiconductor wafer 10 by thermally oxidizing the surface of the wafer 10 by heating (thermally oxidizing step), and the thickness of the film 61 is reduced by etching back the film 61 (etching back step). Then the tantalum oxide film 62 is laminated upon the thinned silicon oxide film 61 (dielectric film forming step).

5. 发明专利

JP2000323554A PROCESSING APPARATUS 失效
公开(公告)号：JP2000323554A
公开(公告)日：2000-11-24
申请号：JP13475399
申请日：1999-05-14
申请人： TOKYO ELECTRON LTD
发明人： KIRYU HIDEKI , JINRIKI HIROSHI , SUGIURA MASAHITO
IPC分类号： H01L21/677 , C23C14/56 , C23C16/54 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To obtain a processing apparatus which can improve its throughput. SOLUTION: A preliminary processing chamber 120 is positioned in the upper part of a vacuum transfer chamber 102 of a processing apparatus 100. A carrier base 124 disposed within the preliminary processing chamber 120 is raised or lowered by vertical movement of an elevator shaft 128 together with an elevator plate 126. The carrier base 124 or the like is positioned in a region, where downward movement of the base will not block rotational movement of a transfer arm 106 upon its retracting operation, and a vacuum transfer chamber 102 is positioned correspondingly. The carrier base 124 upon its downward movement is positioned in a transfer path for transfer of a wafer W to a first vacuum processing chamber 108 and exchange the wafer W with the arm 106. At upward movement of the carrier base 124, the wafer W on the base 124 is subjected to a preliminary process. Since a second vacuum processing chamber 110 is provided around the vacuum transfer chamber 102 in place of the preliminary processing chamber, the number of processing steps in a processing apparatus 100 can be increased, so that its production efficiency is increased.

6. 发明专利

JP2010056582A Method of forming dielectric film 审中-公开
标题翻译：形成电介质膜的方法
公开(公告)号：JP2010056582A
公开(公告)日：2010-03-11
申请号：JP2009280314
申请日：2009-12-10
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： KIRYU HIDEKI , AOYAMA SHINTARO , TAKAHASHI TAKESHI , JINRIKI HIROSHI
IPC分类号： H01L21/314 , H01L21/283 , H01L21/316 , H01L21/318 , H01L29/423 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To improve uniformity of a dielectric film by eliminating incubation time when forming the dielectric film by Chemical Vapor Deposition (CVD) method on a silicon (Si) substrate surface covered with a thin molecular layer of an insulator and to control composition of the dielectric film in the thickness direction. SOLUTION: A method of forming a dielectric film on an Si substrate includes a first step of substantially uniformly adsorbing a first metallic vapor molecular compound on the Si substrate to cover the Si substrate with the first metallic vapor molecular compound, a second step of decomposing the first metallic vapor molecular compound covering the Si substrate in an oxidizing atmosphere to form a first dielectric molecular layer including the first metal on the Si substrate, a third step of substantially uniformly adsorbing a second metallic vapor molecular compound on the Si substrate to cover the Si substrate with the second metallic vapor molecular compound, a fourth step of decomposing the second metallic vapor molecular compound covering the Si substrate in an oxidizing atmosphere to form a second dielectric molecular layer including the second metal on the first dielectric molecular layer. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过化学气相沉积（CVD）方法在用绝缘体的薄分子层覆盖的硅（Si）衬底表面上消除形成电介质膜时的温育时间来提高电介质膜的均匀性，以控制电介质膜在厚度方向上的组成。解决方案：在Si衬底上形成电介质膜的方法包括：在Si衬底上基本均匀地吸附第一金属蒸汽分子化合物以用第一金属蒸汽分子化合物覆盖Si衬底的第一步骤，第二步骤在氧化气氛中分解覆盖Si衬底的第一金属蒸气分子化合物，以在Si衬底上形成包括第一金属的第一介电分子层，在Si衬底上基本上均匀地吸附第二金属蒸气分子化合物的第三步骤，用第二金属蒸气分子化合物覆盖Si衬底;第四步骤，在氧化气氛中分解覆盖Si衬底的第二金属蒸汽分子化合物，以在第一介电分子层上形成包括第二金属的第二介电分子层。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2009278131A Method for forming membrane of insulator 审中-公开
标题翻译：绝缘子膜形成方法
公开(公告)号：JP2009278131A
公开(公告)日：2009-11-26
申请号：JP2009189743
申请日：2009-08-19
申请人： Tokyo Electron Ltd , 東京エレクトロン株式会社
发明人： KIRYU HIDEKI , TAKAHASHI TAKESHI , AOYAMA SHINTARO , JINRIKI HIROSHI , IGETA MASANOBU
IPC分类号： H01L21/316 , C23C16/30 , C23C16/34 , C23C16/40 , C23C16/44 , C23C16/452 , H01L21/00 , H01L21/28 , H01L21/283 , H01L21/31 , H01L21/314 , H01L29/51 , H01L29/78
CPC分类号： C23C16/345 , C23C16/308 , C23C16/40 , C23C16/452 , C23C16/45529 , C23C16/45531 , C23C16/45542 , H01L21/28185 , H01L21/28194 , H01L21/3141 , H01L21/3145 , H01L21/31616 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L21/67017 , H01L21/67167 , H01L29/513 , H01L29/517 , H01L29/518
摘要： PROBLEM TO BE SOLVED: To provide a method for forming a membrane of insulator by which a high dielectric constant material insulator with excellent membrane quality is formed on a barrier layer.
SOLUTION: The method for forming the membrane of insulator includes a first step to form a first insulating membrane whose essential constituent is a material having a first relative dielectric constant on a surface of semiconductor substrate, and a second step to form a second insulating membrane whose essential constituent is a material having a second relative dielectric constant larger than the first relative dielectric constant, on the first insulating membrane, the membrane thickness of the second insulating membrane being thicker than that of the first insulating membrane. The second step is executed by repeating the following steps successively: a step to flow a first raw material gas in a processing chamber; a step to purge the first raw material gas; a step to flow a first oxidizer in the processing chamber; a step to purge the first oxidizer; step to flow a second raw material gas in the processing chamber; a step to purge the second raw material gas; a step to flow a second oxidizer in the processing chamber; and a step to purge the second oxidizer.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种形成绝缘体膜的方法，通过该方法在阻挡层上形成具有优异膜质量的高介电常数材料绝缘体。解决方案：用于形成绝缘体膜的方法包括：形成第一绝缘膜的第一步骤，其第一绝缘膜的必要组分是在半导体衬底的表面上具有第一相对介电常数的材料，第二步骤形成第二绝缘膜，绝缘膜，其主要成分是具有比第一相对介电常数大的第二相对介电常数的材料，在第一绝缘膜上，第二绝缘膜的膜厚比第一绝缘膜厚。通过连续重复以下步骤来执行第二步骤：使处理室中的第一原料气体流动的步骤; 清洗第一原料气体的步骤; 在处理室中流动第一氧化剂的步骤; 清洗第一氧化剂的步骤; 使处理室中的第二原料气体流动; 清洗第二原料气体的步骤; 在处理室中流动第二氧化剂的步骤; 以及清洗第二氧化剂的步骤。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2001104776A TREATMENT APPARATUS AND METHOD 失效
公开(公告)号：JP2001104776A
公开(公告)日：2001-04-17
申请号：JP28561299
申请日：1999-10-06
申请人： TOKYO ELECTRON LTD
发明人： SUGIURA MASAHITO , JINRIKI HIROSHI , KIRYU HIDEKI , AOYAMA SHINTARO
IPC分类号： H01L21/302 , B01J19/12 , C23C14/02 , C23C16/02 , H01L21/205 , H01L21/304 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a treatment apparatus and the method which can efficiently perform the application of ultraviolet rays by a simple structure and can irradiate a base sheet to be treated with ultraviolet rays while the base sheet to be treated is smoothly carried. SOLUTION: Since a constitution wherein ultraviolet rays irradiation devices 100 and 101 are arranged near each gate valve connecting a transferring room 8 with each treating chamber 12 and on/off of these ultraviolet rays irradiation devices 100 and 101 are synchronized with action of a transferring arm 16 and the surface of a wafer W is irradiated with ultraviolet rays on every time when the wafer W passes through a position just under the ultraviolet rays irradiation devices 100 and 101 under a condition where the wafer W is held on the transferring arm 16, is provided, it is possible to efficiently apply surface clarifying treatment of the wafer by ultraviolet rays irradiation without spoiling transferring speed of the wafer W.

9. 发明专利

JP2001023976A DEVICE AND METHOD FOR TREATING PLASMA 失效
公开(公告)号：JP2001023976A
公开(公告)日：2001-01-26
申请号：JP19375399
申请日：1999-07-07
申请人： TOKYO ELECTRON LTD
发明人： KIRYU HIDEKI , JINRIKI HIROSHI , SUGIURA MASAHITO , AOYAMA SHINTARO
IPC分类号： H01L21/31 , H05H1/46
摘要： PROBLEM TO BE SOLVED: To uniformly supply plasma onto the treatment surface of a body to be treated for uniformly treating the body by properly opening and closing a plurality of plasma introduction paths and a plurality of exhaust paths for changing the introduction position of the plasma in a plasma treatment chamber and the exhaust position of atmosphere. SOLUTION: At the ceiling part of a treatment chamber 102 opposite to the placement surface of a mounting rest 106 where a wafer W is placed, introduction pipes 110, 114, and 118 branching from a plasma introduction pipe 132 for introducing a radical into the treatment chamber 102 are formed, and introduction valves 122, 126, and 130 are included into each of them. Also, at the floor part of the treatment chamber 102 at the lower-periphery part of the mounting rest 106, branch exhaust pipes 144 and 148 for discharging gas in the treatment chamber 102 are formed, and exhaust valves 156 and 160 are included into each of them. Then, in the introduction valves 122, 126, and 130, and the exhaust valves 156 and 160, opening is regularly adjusted at each fixed time by a controller 120.

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