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1. 发明专利

JP2014049477A Substrate with built-in electronic components and method for manufacturing the same 有权
标题翻译：具有内置电子元件的基板及其制造方法
公开(公告)号：JP2014049477A
公开(公告)日：2014-03-17
申请号：JP2012188799
申请日：2012-08-29
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： TANAKA KOICHI , KURASHIMA NOBUYUKI , IIZUKA HAJIME , SHIRAKI SATOSHI
IPC分类号： H05K3/46 , H01L23/12
CPC分类号： H05K1/185 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H05K1/186 , H05K3/4015 , H05K3/4614 , H05K2203/061 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a substrate with built-in electronic components capable of easily dealing with the narrowing of a pitch of a pad.SOLUTION: A substrate with built-in electronic components 1 comprises: a first substrate 2 and a second substrate 5 electrically connected to each other via a spacer part 6; a semiconductor chip 3 arranged between the first substrate 2 and the second substrate 5, and mounted to the first substrate 2; and a sealing resin 7 formed in a space between the first substrate 2 and the second substrate 5 and sealing the semiconductor chip 3. The spacer part 6 has a structure in which a metal post 40 and a solder ball with a core 50 are stacked in a lamination direction of the first substrate 2 and the second substrate 5, and an insulating layer covering a side surface of the metal post 40.
摘要翻译：要解决的问题：提供一种能够容易地处理垫的间距变窄的内置电子部件的基板。解决方案：具有内置电子部件1的基板包括：第一基板2和第二基板 5通过间隔件6彼此电连接; 布置在第一基板2和第二基板5之间并安装到第一基板2的半导体芯片3; 以及形成在第一基板2和第二基板5之间的空间中并密封半导体芯片3的密封树脂7.间隔件6具有其中将金属柱40和具有芯体50的焊球堆叠在一起的结构第一基板2和第二基板5的层叠方向，以及覆盖金属柱40的侧面的绝缘层。

2. 发明专利

JP2014049476A Substrate with built-in electronic components and method for manufacturing the same 有权
标题翻译：具有内置电子元件的基板及其制造方法
公开(公告)号：JP2014049476A
公开(公告)日：2014-03-17
申请号：JP2012188798
申请日：2012-08-29
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： TANAKA KOICHI , KURASHIMA NOBUYUKI , IIZUKA HAJIME , KOYAMA TETSUYA
IPC分类号： H05K3/46 , H01L23/29 , H01L23/31 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H05K1/185 , H01L21/4846 , H01L21/563 , H01L23/3121 , H01L23/5385 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/97 , H01L2224/131 , H01L2224/13144 , H01L2224/16237 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/12042 , H01L2924/12044 , H01L2924/1533 , H01L2924/181 , H01L2924/1815 , H01L2924/351 , H05K1/186 , H05K3/36 , H05K2201/042 , H05K2201/10674 , Y10T29/49126 , H01L2224/16225 , H01L2924/00012 , H01L24/81 , H01L24/83 , H01L2924/00014 , H01L2924/014 , H01L2924/00 , H01L2224/83 , H01L2224/81
摘要： PROBLEM TO BE SOLVED: To provide a substrate with built-in electronic components capable of easily dealing with the narrowing of a pitch of a pad.SOLUTION: A substrate with built-in electronic components 1 comprises: a first substrate 2 and a second substrate 5 electrically connected to each other via a spacer part 6; and a semiconductor chip 3 arranged between the first substrate 2 and the second substrate 5, and mounted to the first substrate 2. The substrate with built-in electronic components 1 also comprises: a sealing resin 7 formed in a space between the first substrate 2 and the second substrate 5 and sealing the semiconductor chip 3; and a sealing resin 8 formed on an upper surface of the sealing resin 7 and filled in a space between the sealing resin 7 and the second substrate 5. The spacer part 6 has a structure in which a solder ball with a core 40, a metal post 50 and a solder ball with a core 60 are stacked in a lamination direction of the first substrate 2 and the second substrate 5.
摘要翻译：要解决的问题：提供一种能够容易地处理垫的间距变窄的内置电子部件的基板。解决方案：具有内置电子部件1的基板包括：第一基板2和第二基板 5通过间隔件6彼此电连接; 以及设置在第一基板2和第二基板5之间并安装到第一基板2的半导体芯片3.具有内置电子部件1的基板还包括：密封树脂7，其形成在第一基板2 和第二基板5，并密封半导体芯片3; 以及密封树脂8，其形成在密封树脂7的上表面上并填充在密封树脂7和第二基板5之间的空间中。间隔件6具有这样的结构，其中具有芯40的焊球，金属柱50和具有芯60的焊球在第一基板2和第二基板5的层叠方向上堆叠。

3. 发明专利

JP2013004865A Semiconductor device manufacturing method and semiconductor device 有权
标题翻译：半导体器件制造方法和半导体器件
公开(公告)号：JP2013004865A
公开(公告)日：2013-01-07
申请号：JP2011136474
申请日：2011-06-20
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： TANAKA KOICHI , KURASHIMA NOBUYUKI , IIZUKA HAJIME , KOYAMA TETSUYA
IPC分类号： H01L21/60 , H01L23/12
CPC分类号： H01L23/49816 , H01L21/4853 , H01L21/568 , H01L23/3135 , H01L25/105 , H01L2224/16225 , H01L2224/73253 , H01L2225/1023 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/3511
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method and a semiconductor device, which can form a connection pad having high connection reliability without causing smear and the like; easily respond to a narrow pitch; and achieve a POP structure at low cost.SOLUTION: A semiconductor device manufacturing method comprises: connecting a solder ball 5 mounted on a projection-like solder ball mount part 11 formed on a support plate 10 and having a pad diameter larger than a pad diameter of a connection pad 4 with the connection pad 4 through a circular truncated cone-shaped solder layer 5B formed from a solder ball 5 on the basis of a difference between the pad diameter of the solder ball mounting part 11 and the pad diameter of the connection pad 4; forming a mold resin layer 7 between a mounting surface of a circuit board 2 and the support plate 10; transforming the circular truncated cone-shaped solder 5B to the spherical solder layer 5B in a circular truncated cone-shaped via 6 by performing a reflow treatment after removing the support plate 10 to form the via 6 in the mold resin layer 7 along the circular truncated cone-shaped solder layer 5B; and exposing a part of the spherical solder layer 5B through the via 6.
摘要翻译：要解决的问题：提供一种半导体器件制造方法和半导体器件，其可以形成具有高连接可靠性而不引起涂片等的连接焊盘; 轻松响应狭窄的音调; 并以低成本实现POP结构。解决方案：一种半导体器件制造方法，包括：将安装在形成于支撑板10上的凸出状焊球安装部11上的焊球5连接起来，焊盘直径大于连接焊盘4的焊盘直径，基于焊锡球安装部分11的焊盘直径和连接焊盘4的焊盘直径之间的差，通过由焊球5形成的圆形截头圆锥形焊料层5B连接焊盘4; 在电路板2的安装表面和支撑板10之间形成模制树脂层7; 通过在去除支撑板10之后进行回流处理，将圆形截头圆锥形焊料5B转变成圆形截头圆锥形通孔6中的球形焊料层5B，以在模制树脂层7中沿圆截面形成通孔6 锥形焊料层5B; 并通过通孔6将一部分球形焊料层5B暴露出来。（C）2013，JPO＆INPIT

4. 发明专利

JP2009272512A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009272512A
公开(公告)日：2009-11-19
申请号：JP2008122998
申请日：2008-05-09
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： KOBAYASHI TOSHIO , ARAI SUNAO , IIZUKA HAJIME
IPC分类号： H01L23/12
CPC分类号： H01L21/568 , H01L2224/04105 , H01L2224/12105
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device for bonding (laminating) a semiconductor chip to an insulating layer by using the adhesive power of an insulating layer in providing a semiconductor embedded between insulators. SOLUTION: The method of manufacturing the semiconductor device includes: a step of forming, on the surface of a metallic layer 10 formed on one side of a support 12, a hole 18 for connecting to an electrode pad 32 of a semiconductor element 30; a step of laminating a non-cured insulating layer 20 on the surface of the metallic layer 10; a step of aligning the position of the electrode pad 32 to the position of the hole 18 formed in the metallic layer 10, and for loading the semiconductor element 30 on the insulating layer 20; a step of curing the insulating film 20; a step of removing a support 12; a step of removing the insulating film 20 at the position of the hole 18 formed in the metallic layer 10, and for forming a via hole 36 from which the electrode pad 32 is exposed; and a step of resin-sealing the loaded side face of the semiconductor element 30. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造半导体器件的方法，所述半导体器件通过在提供绝缘体中嵌入的半导体中使用绝缘层的粘合力将半导体芯片接合（层合）到绝缘层。解决方案：制造半导体器件的方法包括：在形成在支撑体12的一侧的金属层10的表面上形成用于连接到半导体元件的电极焊盘32的孔18的步骤 30; 将非固化绝缘层20层压在金属层10的表面上的步骤; 将电极焊盘32的位置与形成在金属层10中的孔18的位置对准并将半导体元件30装载在绝缘层20上的步骤; 固化绝缘膜20的步骤; 去除支撑件12的步骤; 在形成在金属层10中的孔18的位置处去除绝缘膜20并形成电极焊盘32从其露出的通孔36的步骤; 以及树脂密封半导体元件30的负载侧面的步骤。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2009283788A Method of manufacturing substrate with built-in chip 审中-公开
标题翻译：使用内置芯片制造基板的方法
公开(公告)号：JP2009283788A
公开(公告)日：2009-12-03
申请号：JP2008135980
申请日：2008-05-23
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： IIZUKA HAJIME , KOBAYASHI TOSHIO
IPC分类号： H05K3/36 , H01L23/12 , H05K3/46
CPC分类号： H01L2224/16225 , H01L2224/73204
摘要： PROBLEM TO BE SOLVED: To solve such a problem of a conventional method of manufacturing a substrate with a built-in chip for performing inspections, such as, continuity tests with a completed substrate with a built-in chip. SOLUTION: After forming a first multi-layer wiring board 12 on one surface side of a first metal plate 10 by a build-up method, the electrical connection between a second pad 20 and a first pad 14 making contact with the first metal plate 10, in correspondence with each of the second pads, is checked by a continuity test between the second pad 20 and the first metal plate 10. Then, the insulation of wiring patterns connected to the first pad 14 is checked by the continuity test between the first pads 14 and 14, that are exposed by peeling the first metal plate 10, after bonding the second metal plate via an insulating layer which covers the entire surface on the other surface side with the first multi-layer wiring board 12. After that, a semiconductor chip is mounted on one board of the first multi-layer wiring board 10 and the second multi-layer wiring board, after performing the continuity test, in a similar manner as to that with respect to the second multi-layer wiring board that is bonded to the first multi-layer wiring board 12. Then, the other board is laminated on the chip-mounting surface of the one board. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了解决传统的用内置芯片制造基板的方法的问题，例如具有内置芯片的完成的基板的连续性测试。解决方案：通过积聚方法在第一金属板10的一个表面侧上形成第一多层布线板12之后，第二焊盘20和与第一金属板10接触的第一焊盘14之间的电连接通过第二焊盘20和第一金属板10之间的连续性测试来检查与每个第二焊盘相对应的金属板10。然后，通过连续性测试来检查连接到第一焊盘14的布线图案的绝缘在通过剥离第一金属板10而暴露的第一焊盘14和14之间，在第二金属板经由覆盖另一表面侧的整个表面的绝缘层与第一多层布线板12接合之后。之后在进行连续性试验之后，半导体芯片以与第二多层布线相同的方式安装在第一多层布线板10和第二多层布线基板的一个基板上董事会 t接合到第一多层布线板12.然后，另一个板层压在一个板的芯片安装表面上。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2008294330A Substrate with built-in chip 有权
标题翻译：基板与内置芯片
公开(公告)号：JP2008294330A
公开(公告)日：2008-12-04
申请号：JP2007140140
申请日：2007-05-28
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： IIZUKA HAJIME , MACHIDA KIYOHIRO
IPC分类号： H05K3/46 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To attain thinning and high-densification, in a substrate with built-in chip wherein a chip is built in between a pair of substrates. SOLUTION: The substrate with built-in chip includes a semiconductor chip 110A, a first substrate 100 mounted with the semiconductor chip 110A, a second substrate 200 laminated on the first substrate 100, an electrode 112 which electrically connects the first and second substrates 100 and 200, and a sealing resin 115 arranged between the first and second substrates 100 and 200. An opening part 206 is formed in the second substrate 200. When the second substrate 200 is laminated on the first substrate 100, at least a part of the semiconductor chip 110A is in the opening part 206. The first substrate 100 is mounted with a built-in component having a shape larger than the semiconductor chip 110A. The built-in component is positioned at the part upper than the chip component, in the opening part. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了实现薄型化和高致密化，在具有内置芯片的基板中，其中芯片内置在一对基板之间。解决方案：具有内置芯片的基板包括半导体芯片110A，安装有半导体芯片110A的第一基板100，层叠在第一基板100上的第二基板200，电连接第一和第二基板100和200以及布置在第一和第二基板100和200之间的密封树脂115.在第二基板200中形成开口部206.当第二基板200层压在第一基板100上时，至少一部分半导体芯片110A在开口部206中。第一基板100安装有具有比半导体芯片110A大的形状的内置部件。内置元件位于开口部分中位于芯片组件上方的部分。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2014150154A Substrate with built-in electronic component and method of manufacturing the same 有权
标题翻译：具有内置电子元件的基板及其制造方法
公开(公告)号：JP2014150154A
公开(公告)日：2014-08-21
申请号：JP2013017749
申请日：2013-01-31
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： TANAKA KOICHI , KURASHIMA NOBUYUKI , IIZUKA HAJIME , SHIRAKI SATOSHI
IPC分类号： H05K3/46
CPC分类号： H01L21/56 , H01L21/52 , H01L21/563 , H01L23/145 , H01L23/3121 , H01L23/3135 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/83192 , H01L2225/1023 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/15331 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a substrate with a built-in electronic component, which can be thinned.SOLUTION: The substrate with a built-in electronic component comprises: a first substrate; an electronic component mounted on the first substrate; a first resin which is provided on the first substrate and covers a side surface of the electronic component; a second substrate which is provided above the electronic component and the first resin and is laminated on the first substrate; a substrate connection member which is provided between the first substrate and the second substrate and electrically connects the first substrate and the second substrate; a second resin filled between the second substrate and both the electronic component and the first resin; and a third resin which encapsulates the substrate connection member, the electronic component, the first resin, and the second resin and is filled between the first substrate and the second substrate.
摘要翻译：要解决的问题：为基板提供可以变薄的内置电子部件。解决方案：具有内置电子部件的基板包括：第一基板; 安装在所述第一基板上的电子部件; 第一树脂，其设置在所述第一基板上并覆盖所述电子部件的侧面; 第二基板，其设置在所述电子部件上方和所述第一树脂上，并层叠在所述第一基板上; 衬底连接构件，设置在第一衬底和第二衬底之间并电连接第一衬底和第二衬底; 填充在所述第二基板和所述电子部件和所述第一树脂之间的第二树脂; 以及第三树脂，其封装所述基板连接构件，所述电子部件，所述第一树脂和所述第二树脂，并且填充在所述第一基板和所述第二基板之间。

8. 发明专利

JP2014045051A Electronic component built-in substrate and manufacturing process therefor 有权
标题翻译：电子部件内置基板及其制造工艺
公开(公告)号：JP2014045051A
公开(公告)日：2014-03-13
申请号：JP2012186065
申请日：2012-08-27
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： KURASHIMA NOBUYUKI , KOYAMA TETSUYA , IIZUKA HAJIME , TANAKA KOICHI
IPC分类号： H05K3/46 , H05K1/14
CPC分类号： H01L23/28 , H01L21/565 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49833 , H01L23/562 , H01L25/165 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19105 , H05K1/14 , H05K1/186 , H05K3/284 , H05K3/462 , H05K3/4697 , H05K2201/10234 , H05K2203/1327 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide an electronic component built-in substrate which can be filled with resin reliably, while narrowing the arrangement pitch of conductive balls.SOLUTION: An electronic component built-in substrate comprises: a lower wiring board 5; electronic components 40 and 50 mounted on the lower wiring board 5; an intermediate wiring board 6 arranged around the electronic components 40 and 50 while having an aperture 6a for housing the electronic components 40 and 50, and connected with the lower wiring board 5 via conductive balls 28; an upper wiring board 7 arranged above the electronic components 40 and 50 and intermediate wiring board 6, and connected with the intermediate wiring board 6 via conductive balls 29; and a resin 38 filling the regions between the lower wiring board 5, intermediate wiring board 6 and upper wiring board 7, and sealing the electronic components 40 and 50. The conductive balls 28 and 29 being arranged on the upper and lower sides of the intermediate wiring board 6 are arranged at positions shifted from each other.
摘要翻译：要解决的问题：提供一种能够可靠地填充树脂的电子部件内置基板，同时缩小导电球的排列间距。解决方案：电子部件内置基板包括：下布线板5; 安装在下布线板5上的电子部件40和50; 配置在电子部件40,50周围的中间布线板6，同时具有用于容纳电子部件40和50的孔6a，并且经由导电球28与下布线板5连接; 配置在电子部件40,50和中间布线基板6的上方的上部布线基板7，经由导电球29与中间布线基板6连接; 以及填充下布线基板5，中间布线板6和上布线基板7之间的区域的树脂38，并密封电子部件40和50.导电球28和29布置在中间层布线板6布置在彼此偏移的位置。

9. 发明专利

JP2008135781A Production of substrate with built-in chip 有权
标题翻译：用内置芯片生产基板
公开(公告)号：JP2008135781A
公开(公告)日：2008-06-12
申请号：JP2008031917
申请日：2008-02-13
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： YAMANO KOJI , IIZUKA HAJIME , SAKAGUCHI HIDEAKI , KOBAYASHI TOSHIO , ARAI SUNAO , KOBAYASHI TAKESHI , KOYAMA TETSUYA , IIDA KIYOAKI , MASHIMA TOMOAKI , TANAKA KOICHI , KUNIMOTO YUJI , YANAGISAWA TAKASHI
IPC分类号： H05K3/46 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L21/565 , H01L24/73 , H01L25/0657 , H01L2221/68345 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/06568 , H01L2924/01019 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/15331 , H01L2924/19041 , H01L2924/19104 , H01L2924/19105 , H01L2924/19106 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a substrate with a built-in chip having excellent production yield and high reliability in a multilayered wiring connected to the built-in semiconductor chip. SOLUTION: The manufacturing method has a first step for mounting a semiconductor chip onto a first substrate with a first wiring formed thereon, and a second step for sticking the first substrate to a second substrate with a second wiring formed thereon. The semiconductor chip is sealed in the second step between the first substrate and the second substrate, and the first wiring is electrically connected to the second wiring to form a multilayered wiring connecting the semiconductor chip. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有内置芯片的基板的制造方法，该内置芯片在与内置半导体芯片连接的多层布线中具有优异的生产率和高可靠性。解决方案：制造方法具有将半导体芯片安装到其上形成有第一布线的第一基板上的第一步骤，以及将第一基板粘附到第二基板上的第二步骤，其中形成有第二布线。半导体芯片在第一基板和第二基板之间的第二阶段中被密封，并且第一布线电连接到第二布线，以形成连接半导体芯片的多层布线。版权所有（C）2008，JPO＆INPIT

10. 发明专利

JP2008010885A Chip built-in substrate 有权
标题翻译：芯片内置基板
公开(公告)号：JP2008010885A
公开(公告)日：2008-01-17
申请号：JP2007218182
申请日：2007-08-24
申请人： Shinko Electric Ind Co Ltd , 新光電気工業株式会社
发明人： YAMANO KOJI , IIZUKA HAJIME , SAKAGUCHI HIDEAKI , KOBAYASHI TOSHIO , ARAI SUNAO , KOBAYASHI TAKESHI , KOYAMA TETSUYA , IIDA KIYOAKI , MASHIMA TOMOAKI , TANAKA KOICHI , KUNIMOTO YUJI , YANAGISAWA TAKASHI
IPC分类号： H01L23/12 , H01L25/10 , H01L25/11 , H01L25/18 , H05K3/46
CPC分类号： H01L24/73 , H01L25/0657 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/06558 , H01L2225/06568 , H01L2924/01019 , H01L2924/01079 , H01L2924/01087 , H01L2924/15311 , H01L2924/15331 , H01L2924/19041 , H01L2924/19104 , H01L2924/19105 , H01L2924/19106 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a chip built-in substrate which gives satisfactory manufacturing yield and high reliability in multilayer wirings connected with a built-in semiconductor chip. SOLUTION: The chip built-in substrate is manufactured with a first step of mounting the semiconductor chip 110 on a first substrate whereupon a first wiring is formed, and a second step of bonding a second substrate whereupon a second wiring is formed with the first substrate. In the second step, the semiconductor chip 110 is sealed between the first substrate and the second substrate, the first wiring is electrically connected with the second wiring, and the multilayer wiring connected with the semiconductor chip 110 is formed. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种内置衬底，其在与内置半导体芯片连接的多层配线中具有令人满意的制造成品率和高可靠性。解决方案：芯片内置基板的制造是将半导体芯片110安装在形成第一布线的第一基板上的第一步骤，以及形成第二布线的第二基板接合的第二步骤第一个底物。在第二步骤中，将半导体芯片110密封在第一基板和第二基板之间，第一布线与第二布线电连接，形成与半导体芯片110连接的多层布线。版权所有（C）2008，JPO＆INPIT

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