专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2007005785A Phase-change memory cell having cell diode and bottom electrode self-aligned with each other, and manufacturing method thereof 审中-公开
标题翻译：具有单独二极管的相变存储单元和与每个其它单元自动对准的底电极及其制造方法
公开(公告)号：JP2007005785A
公开(公告)日：2007-01-11
申请号：JP2006150232
申请日：2006-05-30
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： PARK JAE-HYUN , GO ZAIKI , LEE SE-HO , JEONG WON-CHEOL
IPC分类号： H01L27/105 , H01L45/00
CPC分类号： H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： PROBLEM TO BE SOLVED: To provide an integrated circuit device having a vertical diode.
SOLUTION: An integrated circuit device includes an integrated circuit substrate, and an insulating film formed on the integrated circuit substrate. A contact hole penetrates the insulating film. A vertical diode is provided in a lower region of the contact hole, and a bottom electrode is provided above the vertical diode in the contact hole. The bottom surface of the bottom electrode is positioned above the top surface of the vertical diode. The bottom electrode is self-aligned with the vertical diode. The top surface area of the bottom electrode is smaller than the horizontal section area of the contact hole. A method of manufacturing the integrated circuit device is also provided.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有垂直二极管的集成电路器件。解决方案：集成电路器件包括集成电路衬底和形成在集成电路衬底上的绝缘膜。接触孔穿透绝缘膜。在接触孔的下部区域设置有垂直二极管，在接触孔中的垂直二极管的上方设置有底部电极。底部电极的底表面位于垂直二极管的顶表面之上。底部电极与垂直二极管自对准。底部电极的顶表面积小于接触孔的水平截面面积。还提供了一种制造集成电路器件的方法。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2005340837A Semiconductor device comprising phase change memory element covered with oxygen barrier film, electronic system using the same, and method of manufacturing the same 审中-公开
标题翻译：包含氧气阻挡膜的相变记忆元件的半导体器件，使用其的电子系统及其制造方法
公开(公告)号：JP2005340837A
公开(公告)日：2005-12-08
申请号：JP2005156360
申请日：2005-05-27
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： SONG YOON-JONG , HWANG YOUNG-NAM , NAM SANG-DON , CHO SUNG-LAE , KOH GWAN-HYEOB , LEE CHOONG-MAN , KUH BONG-JIN , HA YONG-HO , LEE SU-YOUN , JEONG CHANG-WOOK , YI JI-HYE , RYOO KYUNG-CHANG , LEE SE-HO , AHN SU-JIN , PARK SOON-OH , LEE JANG-EUN
IPC分类号： H01L27/105 , H01L27/10 , H01L27/24
CPC分类号： H01L29/7843 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1666
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device comprising a phase change memory element covered with an oxygen barrier film. SOLUTION: A semiconductor device comprises a molding film formed on a semiconductor substrate. The molding film comprises a projection extended from the upper surface of the film in a vertical direction. A phase change substance pattern is provided such that the pattern is in contact with the projection. The phase change substance pattern is electrically connected to a lower electrode. There are provided the semiconductor device and an electronic system using the phase change memory element. There is also provided the method of manufacturing the phase change memory element. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决的问题：提供一种半导体器件，其包括被氧阻隔膜覆盖的相变存储元件。解决方案：半导体器件包括形成在半导体衬底上的成型膜。成型膜包括从膜的上表面沿垂直方向延伸的突起。提供相变物质图案，使得图案与突起接触。相变物质图案电连接到下电极。提供了使用相变存储元件的半导体器件和电子系统。还提供了制造相变存储元件的方法。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2007184591A Phase change storage element including contact with multi-bit cell and diameter to be adjusted therein, its manufacturing method, and its program method 有权
标题翻译：相变存储元件，包括与要调整的多位单元和直径的接触，其制造方法及其程序方法
公开(公告)号：JP2007184591A
公开(公告)日：2007-07-19
申请号：JP2006346152
申请日：2006-12-22
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： JEONG WON-CHEOL , KIM HYUNG-JUN , LEE SE-HO , PARK JAE-HYUN , JEONG CHANG-WOOK
IPC分类号： H01L27/105 , G11C13/00 , H01L45/00
摘要： PROBLEM TO BE SOLVED: To provide a phase change storage element including a contact where a multi-bit cell and a diameter are adjustable, and to provide its manufacturing method, and its program method. SOLUTION: The phase change storage element includes a chalcogenide element containing substance to be changed into a crystalline state or amorphous state with the impression of a heating current. The first contact is connected to the first region of a chalcogenide element so as to have a first cross sectional region. The second contact is connected to the second region of the chalcogenide element so as to have a second cross sectional region. The first programmable region of the chalcogenide substance is limited within the first region of the chalcogenide element and the state of the first programmable region is programmed by resistance related to the first contact. The second programmable region of the chalcogenide substance is limited within the second region of the chalcogenide element and the state of the second programmable region is programmed by resistance related to the second contact. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种包括多位单元和直径可调的接点的相变存储元件，并提供其制造方法及其程序方法。解决方案：相变存储元件包括硫族化物元素，其含有待加热电流的变形为结晶状态或非晶状态的物质。第一触点连接到硫族化物元件的第一区域以具有第一横截面区域。第二接触件连接到硫族化物元件的第二区域以具有第二横截面区域。硫族化物物质的第一可编程区域被限制在硫族化物元素的第一区域内，并且通过与第一接触相关的电阻对第一可编程区域的状态进行编程。硫族化物物质的第二可编程区域在硫族化物元素的第二区域内被限制，并且通过与第二接触相关的电阻对第二可编程区域的状态进行编程。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2004311015A Low-current and high-speed phase-change memory device and driving method therefor 审中-公开
公开(公告)号：JP2004311015A
公开(公告)日：2004-11-04
申请号：JP2004107242
申请日：2004-03-31
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： LEE SE-HO
IPC分类号： G11C13/00 , G11C11/00 , G11C11/56 , G11C16/00 , G11C16/02 , H01L27/10 , H01L27/105 , H01L27/24 , H01L45/00 , H03D13/00
CPC分类号： G11C13/0004 , G11C11/5678 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/0078 , G11C2213/79 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/148
摘要： PROBLEM TO BE SOLVED: To provide a low-current and high-speed phase-change memory device and a driving method therefor. SOLUTION: In the phase-change memory, a set state is defined as a state where amorphous nuclei are formed in the phase-change layer of a memory cell and the phase-change layer has an initial resistance that is higher than in a crystaline matrix, and a reset state is defined as a state where the number and/or the density of the amorphous nuclei are greater than those in the set state and a resistance is higher than in the set state. A current for writing the reset and set states is reduced to several hundred microamperes, and a period required for writing the reset and set states is reduced to several tens of nanoseconds to several hundred nanoseconds. Also, highly integrated and almost nonvolatile memory devices can be realized. COPYRIGHT: (C)2005,JPO&NCIPI

5. 发明专利

JP2004158852A Phase conversion memory device and its manufacturing method 审中-公开
公开(公告)号：JP2004158852A
公开(公告)日：2004-06-03
申请号：JP2003362078
申请日：2003-10-22
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： HWANG YOUNG-NAM , LEE SE-HO
IPC分类号： G11C13/00 , G11C16/02 , H01L27/10 , H01L27/115 , H01L45/00
CPC分类号： G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/1666
摘要： PROBLEM TO BE SOLVED: To provide a phase conversion memory device and a method of manufacturing the device. SOLUTION: The phase conversion memory device includes a lower electrode formed on a semiconductor substrate, a phase conversion pattern formed on the lower electrode, and an upper electrode formed on the pattern. The upper electrode has a chip faced to the lower electrode above the lower electrode. In the method of manufacturing the memory device, the upper electrode having the chip faced to the lower electrode is formed by forming a conductive film on a phase conversion film having a dent faced to the lower electrode. Consequently, the density of the current flowing through the phase conversion film can be increased, because electric fields are concentrated toward the chip of the upper electrode. COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2004158854A Phase conversion memory device and its manufacturing method 审中-公开
公开(公告)号：JP2004158854A
公开(公告)日：2004-06-03
申请号：JP2003366415
申请日：2003-10-27
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： HWANG YOUNG-NAM , LEE SE-HO
IPC分类号： H01L27/10 , H01L27/105 , H01L27/115 , H01L45/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/1666
摘要： PROBLEM TO BE SOLVED: To provide a phase conversion memory device in which both the interface resistance between a lower electrode and a phase conversion film, and the density of a current in the contact area with the lower electrode by means of the phase conversion film are increased so as to improve the efficiency of the device, and to provide a method of manufacturing the device. SOLUTION: This phase conversion memory device includes a cylindrical lower electrode which is formed on a semiconductor substrate and has a flat plate section and a vertical section, and a phase conversion pattern which is formed on part of the vertical section and is in contact with the lower electrode. An upper electrode is formed on the phase conversion pattern and has a chip faced to the lower electrode above the lower electrode. The lower electrode is formed by forming a first molded film on the substrate and a conductive film on the molded film in a conformal state, and polishing the conductive film through a chemical mechanical polishing step. An interlayer insulating film having a contact hole is formed on part of the vertical section on the substrate having the lower electrode, and a spacer pattern is formed on the internal wall of the hole. The phase conversion film having a dent in a halo-region defined by the spacer pattern is formed on the substrate having the interlayer insulating film and spacer pattern in the halo-region. COPYRIGHT: (C)2004,JPO

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式