专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2014022030A Magnetic memory device 审中-公开
标题翻译：磁记忆装置
公开(公告)号：JP2014022030A
公开(公告)日：2014-02-03
申请号：JP2013142385
申请日：2013-07-08
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG , CHA SOO-HO , KANG DONG-SEOK , PARK CHEOLWOO , SOHN DONG HYUN , RI JUNSO , KIM HYE JIN
IPC分类号： G11C11/15 , H01L21/8246 , H01L27/105 , H01L29/82 , H01L43/08
CPC分类号： G11C11/165 , G11C5/025 , G11C5/04 , G11C7/1009 , G11C7/1054 , G11C7/1057 , G11C7/1081 , G11C7/222 , G11C11/161 , G11C11/1653 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/5607 , G11C13/047 , G11C29/022 , G11C29/028 , G11C29/50008
摘要： PROBLEM TO BE SOLVED: To provide a magnetic memory device, a memory module with the same attached to it, and a memory system.SOLUTION: A magnetic memory device (MRAM) comprises a magnetic memory cell that switches between at least two states in accordance with a magnetization direction, and comprises an interface part that provides various interface functions. A memory module comprises: a module board; at least one or more MRAM chips mounted on the module board; and also a buffer chip mounted on the module board and configured to manage the operation of the MRAM chip. A memory system comprises a memory controller configured to communicate with the MRAM, and transmits or receives an electric-photo conversion signal or photo-electric conversion signal through an optical connection device connected between the MRAM and the memory controller.
摘要翻译：要解决的问题：提供一种磁存储器件，与其相连的存储器模块和存储器系统。解决方案：磁存储器件（MRAM）包括磁存储器单元，其在至少两个状态之间切换具有磁化方向，并且包括提供各种界面功能的接口部分。存储器模块包括：模块板; 安装在模块板上的至少一个或多个MRAM芯片; 以及安装在模块板上并被配置为管理MRAM芯片的操作的缓冲芯片。存储器系统包括被配置为与MRAM通信的存储器控制器，并且通过连接在MRAM和存储器控制器之间的光学连接装置来发送或接收电光转换信号或光电转换信号。

2. 发明专利

JP2006048916A Memory device having single bit bus structure with current mode signaling system 审中-公开
标题翻译：具有电流模式信号系统的单位总线结构的存储器件
公开(公告)号：JP2006048916A
公开(公告)日：2006-02-16
申请号：JP2005224612
申请日：2005-08-02
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG
IPC分类号： G11C11/409 , G11C11/413 , H03M1/12 , H03M1/66
CPC分类号： G11C7/16
摘要： PROBLEM TO BE SOLVED: To provide a memory device for the storage of digitally formatted data.
SOLUTION: The memory device includes a digital to analog converter circuit that is configured to convert digitally formatted data received from outside the memory device to analog-formatted data, and an analog to digital converter circuit coupled to the digital to analog converter circuit to convert the analog-formatted data to digitally formatted data for storage in the memory device.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供用于存储数字格式化数据的存储器件。解决方案：存储器件包括数模转换器电路，其被配置为将从存储器件外部接收的数字格式的数据转换为模拟格式化数据，以及耦合到数模转换器电路的模数转换器电路将模拟格式的数据转换为数字格式的数据以存储在存储器件中。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2013242957A Magnetic random access memory 审中-公开
标题翻译：磁性随机存取存储器
公开(公告)号：JP2013242957A
公开(公告)日：2013-12-05
申请号：JP2013099097
申请日：2013-05-09
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG , KANG DONG-SEOK , KIM HYE JIN , PARK CHEOLWOO , SOHN DONG HYUN , RI JUNSO , KANG SANG-BEOM , HYUNG-ROK OH , CHA SOO-HO
IPC分类号： G11C11/15
CPC分类号： G11C11/165 , G06F12/0246 , G11C11/161 , G11C11/1653 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693
摘要： PROBLEM TO BE SOLVED: To provide a magnetic random access memory (MRAM).SOLUTION: This invention relates to a magnetic random access memory (MRAM), and a memory module and a memory system including the MRAM. The MRAM includes magnetic memory cells configured to change between at least two states according to a magnetization direction, and a mode register supporting a plurality of operational options of the MRAM. The memory module includes a module board and at least one MRAM chip mounted on the module board, and further includes a buffer chip mounted on the module board and managing an operation of the MRAM chip. The memory system includes a memory controller communicating with the MRAM, in which an electric to optical conversion signal or an optical to electric conversion signal is communicated through an optical link device which is linked between the MRAM and the memory controller.
摘要翻译：要解决的问题：提供一种磁性随机存取存储器（MRAM）。本发明涉及一种磁性随机存取存储器（MRAM），以及一种存储器模块和包括MRAM的存储器系统。 MRAM包括配置为根据磁化方向在至少两个状态之间变化的磁存储器单元和支持MRAM的多个操作选项的模式寄存器。存储器模块包括模块板和安装在模块板上的至少一个MRAM芯片，并且还包括安装在模块板上的缓冲芯片，并管理MRAM芯片的操作。存储器系统包括与MRAM通信的存储器控制器，其中通过连接在MRAM和存储器控制器之间的光学链路装置传送电光转换信号或光电转换信号。

4. 发明专利

JP2007187661A Temperature sensor and section-by-section temperature detection method 有权
标题翻译：温度传感器和分段温度检测方法
公开(公告)号：JP2007187661A
公开(公告)日：2007-07-26
申请号：JP2007002857
申请日：2007-01-10
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG
IPC分类号： G01K7/01 , G11C11/406 , G11C11/407 , H01L21/822 , H01L27/04 , H03K5/13
CPC分类号： G01K7/01 , G01K7/00 , G11C7/04
摘要： PROBLEM TO BE SOLVED: To provide a temperature sensor for generating temperature codes according to temperatures section by section and to provide a section-by-section temperature detection method. SOLUTION: The temperature sensor is provided with: a plurality of serially-connected constant delay cells for receiving and delaying temperature detection signals; a variable delay cell for receiving the delaying and delaying the temperature detection signals; and a section determination logic part for latching output of the constant delay cells in response to output of the variable delay cell and generating temperature codes. The section determination logic part divides temperatures into section by section with reference to temperatures at which output of the variable delay cell corresponds to output of the constant delay cells according to temperature changes and generates temperature codes corresponding to the temperatures section by section. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种温度传感器，用于逐段产生根据温度的温度代码，并提供逐段温度检测方法。解决方案：温度传感器设置有：多个串联连接的恒定延迟单元，用于接收和延迟温度检测信号; 用于接收延迟和延迟温度检测信号的可变延迟单元; 以及部分确定逻辑部分，用于响应于可变延迟单元的输出而锁存恒定延迟单元的输出并产生温度代码。区段确定逻辑部分参照温度变化逐段将温度分为可变延迟单元的输出对应于恒定延迟单元的输出的温度，并根据温度逐段生成对应于温度的温度代码。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2014107004A Nonvolatile memory and operation method of nonvolatile memory 审中-公开
标题翻译：非易失性存储器的非易失性存储器和操作方法
公开(公告)号：JP2014107004A
公开(公告)日：2014-06-09
申请号：JP2013241704
申请日：2013-11-22
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG , RI SOFU , JEON SEONG HYUN
IPC分类号： G11C16/02
CPC分类号： G11C7/1045 , G11C7/109 , G11C7/222 , G11C8/12 , G11C11/1653 , G11C11/1673 , G11C11/1675
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile memory.SOLUTION: A nonvolatile memory includes: a plurality of banks; control logic configured to output write enable signals and read enable signals corresponding to the plurality of banks respectively on the basis of mode information stored in a plurality of storage units; and a plurality of read/write circuit configured to enable and disable the plurality of banks to be written and read according to whether the write enable signal and read enable signal are activated. In an initial state after the mode information is stored in the plurality of storage units, the control logic activates the write enable signal and read enable signal without reference to the mode information.
摘要翻译：要解决的问题：提供非易失性存储器。解决方案：非易失性存储器包括：多个存储体; 控制逻辑被配置为基于存储在多个存储单元中的模式信息分别输出写入使能信号和对应于所述多个存储体的读取使能信号; 以及多个读/写电路，被配置为根据写使能信号和读使能信号是否被激活来启用和禁止要写入和读取的多个存储体。在模式信息存储在多个存储单元中之后的初始状态下，控制逻辑激活写使能信号和读使能信号，而不参考模式信息。

6. 发明专利

JP2013122810A Memory device and sensing and latch circuit, and data writing and reading method and memory system 审中-公开
标题翻译：存储器件和感测和锁存电路以及数据写入和读取方法和存储器系统
公开(公告)号：JP2013122810A
公开(公告)日：2013-06-20
申请号：JP2012271383
申请日：2012-12-12
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG , LEE YUN-SANG , PARK CHEOL-WOO , KO OZEN
IPC分类号： G11C11/15 , H01L21/8246 , H01L27/105
CPC分类号： G11C7/06 , G11C7/065 , G11C7/222 , G11C11/16 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/4076 , G11C11/4091 , G11C13/0002 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C13/0069 , G11C16/26 , G11C16/28 , G11C27/02 , G11C2207/002 , G11C2207/005 , G11C2213/71 , H01L27/222 , H01L43/08 , H01L45/04 , H01L45/06
摘要： PROBLEM TO BE SOLVED: To provide a memory device and a sensing and latch circuit, and a data writing and reading method and a memory system in which the credibility and speed of writing and reading operations are increased.SOLUTION: Provided is a memory device for operations to read data from a memory cell and write data in the memory cell, the memory device including a first switch for data transfer and memory column selection, a second switch directly connected to the memory cell for the data transfer and memory column selection, and a sensing and latch circuit being located between the first switch and the second switch and being for the amplification or storage of the data.
摘要翻译：要解决的问题：提供一种存储装置和感测和锁存电路，以及数据写入和读取方法和存储系统，其中写入和读取操作的可信度和速度增加。解决方案：提供一种用于从存储器单元读取数据并将数据写入存储单元的操作的存储器件，该存储器件包括用于数据传输和存储器列选择的第一开关，直接连接到存储器的第二开关用于数据传输和存储器列选择的单元，以及感测和锁存电路，位于第一开关和第二开关之间，并用于数据的放大或存储。版权所有（C）2013，JPO＆INPIT

7. 发明专利

JP2010074834A Oscillator and method of generating oscillating signal 有权
标题翻译：振荡器和产生振荡信号的方法
公开(公告)号：JP2010074834A
公开(公告)日：2010-04-02
申请号：JP2009217562
申请日：2009-09-18
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG
IPC分类号： H03K3/354 , H03K3/03 , H03L7/099
CPC分类号： H03K3/354 , G11C7/22 , G11C7/222
摘要： PROBLEM TO BE SOLVED: To provide an oscillator which can be suitably used in phase lock loop clock generators etc., and to provide a method of generating an oscillating signal. SOLUTION: The oscillator, comprising: a first starved inverter (current-starved inverter); a second starved inverter including an inner inverter cross-coupled to the inner inverter of the first starved inverter; a first inverter connected to the output of the inner inverter of the first starved inverter; and a second inverter connected to the output of the inner inverter of the second starved inverter, wherein an output of the first inverter is supplied to an input of the outer inverter of the second starved inverter, and an output of the second inverter is supplied to an input of the outer inverter of the first starved inverter. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供可以适用于锁相环时钟发生器等的振荡器，并提供产生振荡信号的方法。解决方案：振荡器，包括：第一饥饿逆变器（电流欠压逆变器）; 第二饥饿逆变器，包括与第一饥饿逆变器的内部逆变器交叉耦合的内部逆变器; 第一逆变器连接到第一饥饿逆变器的内逆变器的输出端; 以及第二逆变器，连接到第二饥饿逆变器的内逆变器的输出，其中第一逆变器的输出被提供给第二饥饿逆变器的外逆变器的输入，并且第二反相器的输出被提供给第一饥饿逆变器的外部逆变器的输入。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2013045498A Nonvolatile memory device, data reading method thereof and sttmram device 审中-公开
标题翻译：非易失性存储器件，数据读取方法和STTMRAM器件
公开(公告)号：JP2013045498A
公开(公告)日：2013-03-04
申请号：JP2012185018
申请日：2012-08-24
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG , KO OZEN , PARK CHEOL-WOO , KANG SANG-BOM , OH HYUNG ROK
IPC分类号： G11C11/15
CPC分类号： G11C13/0033 , G11C7/062 , G11C7/067 , G11C7/08 , G11C7/14 , G11C11/1673 , G11C11/1693 , G11C11/5678 , G11C13/0004 , G11C13/0023 , G11C13/004 , G11C13/0061 , G11C2013/0042 , G11C2013/0054
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile memory device capable of improving performance by securing reliability of data in accordance with deviation in various factors, and a data reading method thereof.SOLUTION: A data reading method of a nonvolatile memory device has: a step in which a first sense amplifier receives a data voltage corresponding to data stored in a memory cell, a first reference voltage, and a second reference voltage; a step in which the first sense amplifier senses voltage level difference among the data voltage, the first reference voltage and the second reference voltage to generate a first differential output signal and a second differential output signal; and a step in which a second sense amplifier amplifies the first differential output signal and the second differential output signal to generate read data of the memory cell.
摘要翻译：要解决的问题：提供一种能够通过根据各种因素的偏差确保数据的可靠性而提高性能的非易失性存储装置及其数据读取方法。非易失性存储器件的数据读取方法具有：第一读出放大器接收对应于存储在存储单元中的数据的数据电压，第一参考电压和第二参考电压的步骤; 第一读出放大器感测数据电压，第一参考电压和第二参考电压之间的电压电平差以产生第一差分输出信号和第二差分输出信号的步骤; 以及第二读出放大器放大第一差分输出信号和第二差分输出信号以产生存储器单元的读取数据的步骤。版权所有（C）2013，JPO＆INPIT

9. 发明专利

JP2007187659A Temperature sensor and temperature detection method 审中-公开
标题翻译：温度传感器和温度检测方法
公开(公告)号：JP2007187659A
公开(公告)日：2007-07-26
申请号：JP2007001820
申请日：2007-01-09
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIM CHAN-KYUNG , KIN EIKEN
IPC分类号： G01K7/00 , G01K7/01 , H03K3/03 , H03K3/354 , H03K17/945
CPC分类号： G01K7/32 , G01K7/01 , G11C7/04
摘要： PROBLEM TO BE SOLVED: To provide a temperature sensor implemented by ring oscillators and to provide a temperature detection method using the same. SOLUTION: The temperature sensor is provided with: a first bias part of which the amount of internal current changes due to temperature changes to generate first and second bias signals; a second bias part of which the amount of internal current is constant regardless of temperature changes to generate third and fourth bias signals; a first ring oscillator for generating first clock signals in response to the first and second bias signals; a second ring oscillator for generating second clock signals in response to the third and fourth bias signals; a one-shot pulse generating part for generating one-shot pulses by latching one pulse of the first clock signals; and a counter for generating temperature codes by counting the widths of the one-shot pulses as the pulses of the second clock signals. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供由环形振荡器实现的温度传感器，并提供使用该温度传感器的温度检测方法。解决方案：温度传感器具有：第一偏置部分，其内部电流量由于温度变化而改变以产生第一和第二偏置信号; 第二偏置部分，其内部电流的量是恒定的，而不管温度如何变化以产生第三和第四偏置信号; 第一环形振荡器，用于响应于第一和第二偏置信号产生第一时钟信号; 第二环形振荡器，用于响应于第三和第四偏置信号产生第二时钟信号; 单脉冲产生部分，用于通过锁存第一时钟信号的一个脉冲来产生单触发脉冲; 以及用于通过对作为第二时钟信号的脉冲的单触发脉冲的宽度进行计数来产生温度代码的计数器。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2005071586A Circuit device, memory device, and clock skew compensating method 审中-公开
标题翻译：电路设备，存储器件和时钟补偿方法
公开(公告)号：JP2005071586A
公开(公告)日：2005-03-17
申请号：JP2004242597
申请日：2004-08-23
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： SOHN YOUNG-SOO , KIM CHAN-KYUNG
IPC分类号： G06F1/10 , G06F1/04 , G11C7/22 , G11C11/407 , G11C11/4076 , G11C29/02 , H03L7/06
CPC分类号： G11C29/028 , G06F1/10 , G11C7/22 , G11C7/222 , G11C11/4076 , G11C29/02 , G11C29/50012
摘要： PROBLEM TO BE SOLVED: To provide a memory device compensating for a clock skew causing a centering error and a method for compensating for the clock skew. SOLUTION: To compensate for the clock skew causing the centering error between an external clock signal and an output data signal, the memory device comprises a phase detection part which detects a phase difference between the output data signal and the external clock signal and generates an up- or down-signal, and an up-down counter which is enabled by a calibration signal instructing skew compensation and generates a predetermined offset code in response to the up- or down-signal. The offset code is fed back to a DLL circuit, and thereby the edge of the external clock signal and the middle point of the output data signal are centered. Thus, the offset code can be generated without communication between the controller and the memory device. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供补偿引起定心误差的时钟偏移的存储器件以及补偿时钟偏移的方法。解决方案：为了补偿引起外部时钟信号和输出数据信号之间的对中误差的时钟偏移，存储器件包括相位检测部分，其检测输出数据信号和外部时钟信号之间的相位差;以及产生向上或向下信号，以及通过指示偏斜补偿的校准信号使能的升降计数器，并且响应于上升或下降信号产生预定的偏移代码。偏移代码被反馈到DLL电路，从而外部时钟信号的边沿和输出数据信号的中点位于中心。因此，可以在控制器和存储器件之间没有通信的情况下生成偏移代码。版权所有（C）2005，JPO＆NCIPI

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式