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1. 发明专利

JP2013222467A Electronic apparatus, and method of controlling the same 审中-公开
标题翻译：电子装置及其控制方法
公开(公告)号：JP2013222467A
公开(公告)日：2013-10-28
申请号：JP2013085796
申请日：2013-04-16
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： KIN KYOKON , CHANG JEOM-JIN , CHOI YUN-HO
IPC分类号： G06F9/445 , G06F1/00 , G06F1/26
CPC分类号： G06F9/44505 , G06F1/26 , G06F1/3234 , G06F9/4401 , G06F9/4418 , Y02D10/44
摘要： PROBLEM TO BE SOLVED: To provide an electronic apparatus to reduce a booting time of a system by using a log off mode and a maximum power saving mode, and a method of controlling the same.SOLUTION: An electronic apparatus includes a non-volatile memory, a volatile memory for an operation of an operating system (OS), a user interface unit to receive an end command to terminate an operation of the operating system, and a control unit to change an operation mode of the operating system to a log off mode and to store operating system data of the log off mode stored in the volatile memory in the non-volatile memory and to cut off power supplied to the electronic apparatus, if the end command is input.
摘要翻译：要解决的问题：提供一种通过使用注销模式和最大省电模式来减少系统的启动时间的电子设备及其控制方法。电子设备包括非易失性存储器，用于操作系统（OS）的操作的易失性存储器，用于接收终止操作系统的操作的结束命令的用户接口单元，以及将操作系统的操作模式改变为注销的控制单元模式，并且存储存储在非易失性存储器中的易失性存储器中的注销模式的操作系统数据，并且如果输入了结束命令，则切断提供给电子设备的电力。

2. 发明专利

JP2007026648A Method and device for efficiently correcting transformed part of content 有权
标题翻译：有效地校正内容变换部分的方法和设备
公开(公告)号：JP2007026648A
公开(公告)日：2007-02-01
申请号：JP2006197246
申请日：2006-07-19
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： YOU YOUNG-KUK , TEI GENKEN , SHIN JUN-BUM , CHOI YUN-HO , NAM SU-HYUN
IPC分类号： G11B20/10 , G06F21/24
CPC分类号： G06F21/10 , G11B20/00086 , G11B20/00427 , G11B2020/1288 , G11B2220/2541
摘要： PROBLEM TO BE SOLVED: To provide a method and a device for efficiently correcting contents transformed by scrambling. SOLUTION: The method includes checking information for fixing the transformed part of contents for a PMT packet of packets constituting the contents, extracting location information of a next PMT packet containing data to be corrected in the transformed part of the contents from the correction information of the PMT packet, and easily detecting a location of information to correct the transformed part of the contents in the contents by correcting the transformed part of the contents by using correction data contained in the next PMT packet indicated by the location information. Thus, the transformed part of the contents is quickly corrected. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于有效地校正通过加扰变换的内容的方法和装置。解决方案：该方法包括检查用于固定用于构成内容的分组的PMT分组的变换部分内容的信息，从修正中提取包含要在内容的变换部分中进行校正的数据的下一个PMT分组的位置信息信息，并且通过使用由位置信息指示的下一个PMT分组中包含的校正数据来校正内容的变换部分，从而容易地检测信息的位置以校正内容中的内容的变换部分。因此，快速校正内容的变换部分。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2006020319A Multimedia equipment comprising encryption module 审中-公开
标题翻译：包含加密模块的多媒体设备
公开(公告)号：JP2006020319A
公开(公告)日：2006-01-19
申请号：JP2005190653
申请日：2005-06-29
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： CHOI YUN-HO , KIM YUN-SANG , SAI RYORIN
IPC分类号： H04L9/10
CPC分类号： G11B20/00086 , G11B20/0021 , G11B20/00253 , G11B20/00855 , H04L9/0822 , H04L9/0894 , H04L2209/60 , H04N5/913 , H04N7/1675 , H04N21/4334 , H04N21/4367 , H04N21/4408 , H04N2005/91364
摘要： PROBLEM TO BE SOLVED: To provide a multimedia equipment comprising an encryption module. SOLUTION: The multimedia equipment has both a key processing part to form and manage a key to be used for encryption, and a data processing part to encipher/decrypt contents, by using the formed key in an encryption module. In other words, the encryption module has both a key processing part and a data processing part, forms a key by itself, without the interference of such an external device as CPU, and enciphers contents by using the formed key. The key is enciphered and transmitted, when conveying to the outside, in order to record a key value in record media. Accordingly, the key is protected from being exposed to the outside, and the hazard with respect to hacking is basically blocked. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种包括加密模块的多媒体设备。解决方案：多媒体设备具有形成和管理用于加密的密钥的密钥处理部分，以及通过使用加密模块中形成的密钥来加密/解密内容的数据处理部分。换句话说，加密模块具有密钥处理部分和数据处理部分，自身形成密钥，而不受诸如CPU的外部设备的干扰，并且通过使用形成的密钥对内容进行加密。当输入到外部时，密钥被加密和传输，以便在记录介质中记录密钥值。因此，保护钥匙免受外界的侵害，基本上阻止了对黑客的危害。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2007189688A Method and apparatus for changing codec to reproduce video and/or audio data stream encoded by different codec within the same channel 有权
标题翻译：改变编码解码器的方法和装置，用于在相同的通道中复制由不同编解码器编码的视频和/或音频数据流
公开(公告)号：JP2007189688A
公开(公告)日：2007-07-26
申请号：JP2007001795
申请日：2007-01-09
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： JUNG CHOON SIK , HAM CHEUL-HEE , CHOI YUN-HO
IPC分类号： H04N7/173 , H04N5/93 , H04N19/00 , H04N19/102 , H04N19/134 , H04N19/189 , H04N19/44 , H04N19/46 , H04N19/70 , H04N21/426 , H04N21/438
CPC分类号： H04N21/435 , H04N21/235 , H04N21/434 , H04N21/4341 , H04N21/4345 , H04N21/44008 , H04N21/8193
摘要： PROBLEM TO BE SOLVED: To provide a method and an apparatus for changing codecs to reproduce video and/or audio data streams.
SOLUTION: The method and the apparatus are capable of seamlessly reproducing video and/or audio data streams encoded by two or more different codecs when a change of codecs occurs by determining in advance the stored position of a program element at which a change of codec occurs among video and/or audio data streams stored in buffers using information regarding a change of codecs included in a predetermined data packet and performing control to immediately convert the codec used for decoding at a point in time when the program element at which the change of codecs occurs is first decoded.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于改变编解码器以再现视频和/或音频数据流的方法和装置。解决方案：当通过确定编程元件的存储位置而发生编码的改变时，该方法和装置能够无缝地再现由两个或多个不同编解码器编码的视频和/或音频数据流，使用关于包含在预定数据分组中的编解码器的改变的信息，并且执行控制以在当时的程序元素的时间点处立即转换用于解码的编解码器时，在存储在缓冲器中的视频和/或音频数据流之间发生编解码器首先解码编解码器的改变。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2012252777A Method for efficiently releasing transformed part of content 有权
标题翻译：有效释放变换部分内容的方法
公开(公告)号：JP2012252777A
公开(公告)日：2012-12-20
申请号：JP2012172593
申请日：2012-08-03
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： YOU YOUNG-KUK , TEI GENKEN , SHIN JUN-BUM , CHOI YUN-HO , NAM SU-HYUN
IPC分类号： G11B20/10 , H04N21/83 , G06F21/24
CPC分类号： G11B20/00086 , G06F21/10 , G11B19/02 , G11B20/00427 , G11B20/00449 , G11B2020/1288 , G11B2220/2541 , H04N21/4405
摘要： PROBLEM TO BE SOLVED: To provide a method and a device for efficiently correcting content transformed by scrambling.SOLUTION: A method for efficiently correcting content comprises the steps of: confirming information for correcting a transformed part of content for a PMT packet among packets constituting the content; extracting location information on a next PMT packet containing data to be corrected in the transformed part of the content from correction information on the PMT packet; and easily retrieving where information for correcting the transformed part is located in the content by correcting the transformed part of the content by using correction data contained in the next PMT packet indicated by the location information. Thus, the transformed part of the content is quickly corrected.
摘要翻译：要解决的问题：提供一种用于有效地校正通过加扰变换的内容的方法和装置。解决方案：一种用于有效地校正内容的方法，包括以下步骤：确认用于在组成内容的分组中校正用于PMT分组的内容的变换部分的信息; 从PMT分组的修正信息中提取包含内容变换部分中要修正的数据的下一个PMT分组的位置信息; 并且通过使用由位置信息指示的下一个PMT分组中包含的校正数据来校正内容的变换部分，容易地检索用于校正变换部分的信息位于内容中。因此，内容的变换部分被快速地校正。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2008172240A Gap occurrence prevention structure and plasma processing apparatus having the same 审中-公开
标题翻译： GAP事件预防结构和等离子体处理装置
公开(公告)号：JP2008172240A
公开(公告)日：2008-07-24
申请号：JP2008002005
申请日：2008-01-09
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： PARK EUI-JIN , CHOI YUN-HO , PARK IN-YOUNG , JEONG HWAN-IL , CHOI SUNG-SOK
IPC分类号： H01L21/683 , H02N13/00
CPC分类号： H01L21/67126 , H01J37/32495 , H01L21/68735
摘要： PROBLEM TO BE SOLVED: To provide a gap occurrence prevention structure which is capable of preventing a sealing member interposed between an electrostatic chuck and a focus ring from burning. SOLUTION: This plasma processing apparatus comprises: a chamber in which a plasma atmosphere is formed; an upper electrode which is mounted on the upper end of the chamber; an eletrostatic chuck 200 which is mounted on the lower end of the chamber and houses a lower electrode, and on the upper surface of which a wafer W is disposed; and a gap protection portion 400 which isolates a space between the eletrostatic chuck 200 and a focus ring arranged on the outer side of the eletrostatic chuck 200 from the outside. The apparatus prevents sealing members interposed between the electrostatic chuck and the focus ring from burning, and also prevents a space between the electrostatic chuck and the focus ring from being accumulated by polymer or a by-product after etching. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供能够防止静电卡盘和聚焦环之间的密封构件燃烧的间隙发生防止结构。该等离子体处理装置包括：形成等离子体气氛的室; 安装在所述室的上端的上电极; 安装在室的下端并容纳下电极的静电吸盘200，其上表面设置有晶片W; 以及间隔保护部400，其隔离从静电卡盘200和设置在静电吸盘200的外侧的聚焦环之间的空间。该装置防止静电卡盘和聚焦环之间插入的密封件燃烧，并且还防止静电卡盘和聚焦环之间的空间在蚀刻之后被聚合物或副产物积聚。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2008052743A Error correcting circuit, its method, and semiconductor memory device equipped with the circuit 有权
标题翻译：错误校正电路，其方法和配备电路的半导体存储器件
公开(公告)号：JP2008052743A
公开(公告)日：2008-03-06
申请号：JP2007220270
申请日：2007-08-27
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： YIM YONG-TAE , CHOI YUN-HO
IPC分类号： G06F12/16
CPC分类号： G11C7/1006 , G06F11/1008 , G11C2029/0411 , G11C2207/104
摘要： PROBLEM TO BE SOLVED: To provide an error correcting circuit, its method, and a semiconductor memory device equipped with the circuit. SOLUTION: The error correcting circuit comprises a partial syndrome generator, first and second error position detectors, a coefficient computer and a determining section. The partial syndrome generator computes two or more partial syndromes using code data. The first error position detector computes a first error position using only a part of the partial syndrome, and the coefficient computer computes a coefficient of an error position equation using two or more partial syndromes. The determining section determines an error type based on the computed coefficient. The second error position detector selectively computes a second error position based on the error type. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种纠错电路，其方法和配备该电路的半导体存储器件。解决方案：误差校正电路包括部分校正子发生器，第一和第二误差位置检测器，系数计算机和确定部分。部分综合征发生器使用代码数据计算两个或更多个部分综合征。第一误差位置检测器仅使用部分综合征的一部分来计算第一误差位置，并且系数计算机使用两个或更多个部分综合征计算误差位置方程的系数。确定部分基于所计算的系数来确定错误类型。第二错误位置检测器基于错误类型选择性地计算第二错误位置。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2006114221A Semiconductor memory 有权
标题翻译：半导体存储器
公开(公告)号：JP2006114221A
公开(公告)日：2006-04-27
申请号：JP2006011280
申请日：2006-01-19
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： PARK CHEOLWOO , CHO KENJUN , KIM CHULL-SOO , KIN MEIKO , LEE SEUNG-HUN , LEE SI-YEOL , RI KOTETSU , KIM TAE-JIN , CHOI YUN-HO
IPC分类号： G11C11/401 , G11C7/00 , G11C7/10 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/4076 , G11C11/408 , G11C11/409
CPC分类号： G11C7/1018 , G11C7/1045 , G11C7/1072 , G11C7/222 , G11C7/225 , G11C11/406 , G11C11/40618 , G11C11/4076 , G11C11/408 , G11C11/4082 , G11C11/4087 , G11C2207/2281
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory capable of accessing data in a memory cell array at a high speed in synchronization with an external system clock. SOLUTION: The semiconductor memory which receives an external clock is provided with a plurality of memory banks operable in an active cycle or a precharge cycle indicating a reading cycle or a writing cycle, a means for latching the logical level of a received row address strobe signal in response to the rising or falling edge of the external clock, an input means for an external address to select one of the memory banks, and a means for receiving the latched logical level and an address from the address input means, outputting an activation signal to the selected memory bank when the logical level is a first logical level, and outputting an inactivation signal to the unselected memory bank in the active cycle to operate in the precharge cycle. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种与外部系统时钟同步地能够以高速访问存储单元阵列中的数据的半导体存储器。解决方案：接收外部时钟的半导体存储器设置有多个存储器组，其可以在指示读取周期或写入周期的活动周期或预充电周期中操作，用于锁存接收到的行的逻辑电平的装置响应于外部时钟的上升沿或下降沿的地址选通信号，用于选择存储体之一的外部地址的输入装置，以及用于从地址输入装置接收锁存的逻辑电平和地址的装置，输出当所述逻辑电平为第一逻辑电平时，将所述激活信号发送到所述选择的存储体，并且在所述激活周期中将所述未选择的存储体输出到所述预选电池周期中。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2005100652A Semiconductor memory 有权
标题翻译：半导体存储器
公开(公告)号：JP2005100652A
公开(公告)日：2005-04-14
申请号：JP2005001938
申请日：2005-01-06
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： PARK CHEOLWOO , CHO KENJUN , KIM CHULL-SOO , KIN MEIKO , LEE SEUNG-HUN , LEE SI-YEOL , RI KOTETSU , KIM TAE-JIN , CHOI YUN-HO
IPC分类号： G11C11/401 , G11C7/00 , G11C7/10 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/4076 , G11C11/408 , G11C11/409
CPC分类号： G11C7/1018 , G11C7/1045 , G11C7/1072 , G11C7/222 , G11C7/225 , G11C11/406 , G11C11/40618 , G11C11/4076 , G11C11/408 , G11C11/4082 , G11C11/4087 , G11C2207/2281
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory capable of accessing data in a memory cell array at a high speed in synchronism with an external system clock. SOLUTION: The semiconductor memory to which an external clock is inputted is provided with: a plurality of memory banks operated at an active cycle indicating a read or write cycle, or a precharge cycle; a means for latching the logical level of an inputted row address strobe signal in response to the rising or falling edge of the external clock; an external address input means for selecting one of the memory banks; and a means for receiving the latched logical level and an address from the address input means, and outputting, when the logical level is at a first logical level, an activating signal to the selected memory bank to operate it at the active cycle, and outputting a nonactivating signal to the unselected memory bank to operate it at the precharge cycle. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种与外部系统时钟同步地能够以高速访问存储单元阵列中的数据的半导体存储器。
解决方案：输入外部时钟的半导体存储器具有：以指示读或写周期或预充电循环的活动周期操作的多个存储体; 用于响应于外部时钟的上升沿或下降沿来锁存输入的行地址选通信号的逻辑电平的装置; 外部地址输入装置，用于选择存储体之一; 以及用于从地址输入装置接收锁存的逻辑电平和地址的装置，并且当逻辑电平处于第一逻辑电平时，将所述激活信号输出到所选择的存储体以在所述有效周期操作，并输出对未选择的存储体的非激活信号在预充电循环中进行操作。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2005135580A Semiconductor memory 有权
标题翻译：半导体存储器
公开(公告)号：JP2005135580A
公开(公告)日：2005-05-26
申请号：JP2005001936
申请日：2005-01-06
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： PARK CHEOLWOO , CHO KENJUN , KIM CHULL-SOO , KIN MEIKO , LEE SEUNG-HUN , LEE SI-YEOL , RI KOTETSU , KIM TAE-JIN , CHOI YUN-HO
IPC分类号： G11C11/401 , G11C7/00 , G11C7/10 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/4076 , G11C11/408 , G11C11/409
CPC分类号： G11C7/1018 , G11C7/1045 , G11C7/1072 , G11C7/222 , G11C7/225 , G11C11/406 , G11C11/40618 , G11C11/4076 , G11C11/408 , G11C11/4082 , G11C11/4087 , G11C2207/2281
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory where it is possible to access fast to data in a memory cell array in synchronization with an external system clock. SOLUTION: The semiconductor memory for inputting the external clock is provided with a plurality of memory banks which can operate with an active cycle or a pre-charge cycle showing a reading cycle or a writing cycle respectively, a means for latching the logical level of an inputted row address strobe signal in response to the rising edge or the falling edge of the external clock, an input means of an external address for selecting one of the memory banks, and a means which receives the latched logical level and the address from the address input means, operates the selected memory bank in the active cycle by outputting an activation signal to the selected memory bank, and operates the not-selected memory banks in the pre-charge cycle by outputting a non-activation signal to the not-selected memory banks when the logical level is a first logical level. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供半导体存储器，其中可以与外部系统时钟同步地快速访问存储单元阵列中的数据。解决方案：用于输入外部时钟的半导体存储器设置有多个存储体，其可以分别以显示读取周期或写入周期的活动周期或预充电周期操作，用于锁存逻辑响应于外部时钟的上升沿或下降沿，输入的行地址选通信号的电平，用于选择存储体之一的外部地址的输入装置，以及接收锁存的逻辑电平和地址的装置从地址输入装置，通过向选择的存储体输出激活信号，在所述激活周期中操作所选择的存储体，并通过向非充电周期输出非激活信号来操作预充电周期中未选择的存储体当逻辑电平是第一逻辑电平时，选择的存储体。版权所有（C）2005，JPO＆NCIPI

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