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JP2004280103A Apparatus and method for performing montgomery type modular multiplication 有权
标题翻译：用于执行蒙特卡洛模式多路复用的装置和方法
公开(公告)号：JP2004280103A
公开(公告)日：2004-10-07
申请号：JP2004069540
申请日：2004-03-11
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： LEE KYUNG HEE , IM BUM-JIN , HUH MI-SUK
IPC分类号： G09C1/00 , G06F7/52 , G06F7/533 , G06F7/72
CPC分类号： G06F7/728 , G06F7/5332
摘要： PROBLEM TO BE SOLVED: To provide a modular multiplication apparatus for high-speed encryption/decryption and electronic signature in a mobile communication environment including smart cards and mobile terminals. SOLUTION: The present invention provides an apparatus for performing Montgomery type modular multiplication for calculating A×B×R -1 modN (where R=4 m+2 ) in m+2 (where m=n/2) clocks with the multiplier A and the multiplicand B, each having n bits as its inputs, wherein bits of the multiplier are sequentially shifted to generate a shifted bit string and the two least significant bits of the generated bit string are Booth-recorded. The present invention provides a high-speed modular multiplication apparatus with fewer gates and reduced power consumption. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于在包括智能卡和移动终端的移动通信环境中的高速加密/解密和电子签名的模块化乘法装置。解决方案：本发明提供一种用于执行蒙哥马利类型模乘的装置，用于计算A×B×R -1 modN（其中R = 4 m + 2 ）在m + 2（其中m = n / 2）时钟与乘法器A和被乘数B的每个具有n位作为其输入，其中乘法器的位被顺序地移位以产生移位的位串，并且两个最低有效位的生成的位串被显示记录。本发明提供一种具有较少闸门和降低的功耗的高速乘法装置。版权所有（C）2005，JPO＆NCIPI

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