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1. 发明专利

JP2009302260A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009302260A
公开(公告)日：2009-12-24
申请号：JP2008154532
申请日：2008-06-12
申请人： Panasonic Corp , パナソニック株式会社
发明人： OGAWA HISASHI , MORI YOSHIHIRO
IPC分类号： H01L21/8238 , H01L21/28 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78
CPC分类号： H01L21/28088 , H01L21/823842 , H01L21/82385 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： PROBLEM TO BE SOLVED: To solve such a problem of a possibility of generating a residue consisting of polysilicone on the element separation region during the production of a semiconductor having a gate insulating film containing a high-dielectric material and a metal gate electrode. SOLUTION: On the first active region 10a of a semiconductor substrate 10, a first transistor of the first conductive type is formed including: a first gate insulation film 13a containing a high-dielectric material and a first metal; and a first gate electrode 30a having a lower layer conductive film 15a, a first conductive film 18a and a first silicone film 19a. On the second active region 10b of the semiconductor substrate 10, a second transistor of the second conductive type is formed including: a second gate insulation film 13b containing the high-dielectric material and a second metal; and a second gate electrode 30b having a second conductive film 18b composed of the same material as the first conductive film 18a and a second silicone film 19b. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题为了解决在制造具有含有高电介质材料和金属栅电极的栅极绝缘膜的半导体时，在元件分离区域产生由聚硅氧烷构成的残渣的可能性的问题。解决方案：在半导体衬底10的第一有源区域10a上，形成第一导电类型的第一晶体管，其包括：包含高电介质材料的第一栅极绝缘膜13a和第一金属; 以及具有下层导电膜15a，第一导电膜18a和第一硅氧烷膜19a的第一栅电极30a。在半导体衬底10的第二有源区10b上形成第二导电类型的第二晶体管，其包括：包含高电介质材料的第二栅极绝缘膜13b和第二金属; 以及具有由与第一导电膜18a相同的材料构成的第二导电膜18b和第二硅酮膜19b的第二栅电极30b。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2009044051A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009044051A
公开(公告)日：2009-02-26
申请号：JP2007209343
申请日：2007-08-10
申请人： Panasonic Corp , パナソニック株式会社
发明人： OGAWA HISASHI
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49
CPC分类号： H01L21/823462 , H01L21/28202 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L27/092 , H01L29/4966 , H01L29/518 , H01L29/665
摘要： PROBLEM TO BE SOLVED: To enable to stabilize and ensure the reliability of a gate insulating film in a semiconductor device which is provided with a high dielectric film as the gate insulating film and has different gate electrode structures of N-type MISFET and P-type MISFET.
SOLUTION: After sequentially forming an HfSiO film 13 and a TiN film 16 on a semiconductor substrate 10 including a P-type MISFET region 1 and an N-type MISFET region 2, the TiN film 16 in the part located in the N-type MISFET region 2 is alternatively removed. Then, after nitriding the HfSiO film 13 in the part located in the N-type MISFET region 2 to form an HfSiON modified layer 19, a polysilicon film 20 is formed.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了能够稳定并确保半导体器件中的栅极绝缘膜的可靠性，该半导体器件设置有高介电膜作为栅极绝缘膜并且具有不同的N型MISFET的栅电极结构和 P型MISFET。解决方案：在包括P型MISFET区域1和N型MISFET区域2的半导体衬底10上顺序形成HfSiO膜13和TiN膜16之后，位于N型部分的部分中的TiN膜16 替代地，移除型MISFET区域2。然后，在位于N型MISFET区域2的部分中的HfSiO膜13氮化之后，形成HfSiON改性层19，形成多晶硅膜20。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2009224386A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009224386A
公开(公告)日：2009-10-01
申请号：JP2008064435
申请日：2008-03-13
申请人： Panasonic Corp , パナソニック株式会社
发明人： SATO YOSHIHIRO , OGAWA HISASHI
IPC分类号： H01L21/8238 , H01L21/28 , H01L21/336 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78
CPC分类号： H01L21/823807 , H01L21/28088 , H01L21/823814 , H01L21/823842 , H01L29/165 , H01L29/4966 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/7843 , H01L29/7848
摘要： PROBLEM TO BE SOLVED: To obtain high-accuracy formed first and second gate electrodes, and to obtain an element isolation region, having a width which is reduced in the gate breadthwise direction. SOLUTION: A first MIS transistor includes a first gate electrode 30A comprising a second metallic film 30a, formed on a first gate insulation film 13a and an insulation film 27, formed from a side face of the first gate electrode, across the upper surface of a region located sideways of the first gate electrode in a first active region 10a. A second MIS transistor includes a second gate electrode 30B, formed on a second gate insulating film 13b and comprising a first metal film 14b and a conductive film 30b, formed on the first metallic film, and the insulation film 27, formed from a side face of the second gate electrode, across an upper surface of a region located sideways of the second gate electrode in a second active region. The first and second metal films are made of metallic materials which differ from each other, and insulation film is not formed on the upper surfaces of the first and second gate electrodes. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了获得高精度形成的第一和第二栅电极，并获得具有在栅极宽度方向上减小的宽度的元件隔离区域。解决方案：第一MIS晶体管包括第一栅极电极30A，其包括形成在第一栅极绝缘膜13a上的第二金属膜30a和由第一栅电极的侧面形成的绝缘膜27跨过上部在第一有源区域10a中位于第一栅电极侧面的区域的表面。第二MIS晶体管包括形成在第二栅极绝缘膜13b上并且包括形成在第一金属膜上的第一金属膜14b和导电膜30b的第二栅电极30B和由侧面形成的绝缘膜27 的第二栅电极穿过第二有源区域中位于第二栅电极侧面的区域的上表面。第一和第二金属膜由彼此不同的金属材料制成，并且绝缘膜不形成在第一和第二栅电极的上表面上。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2009141168A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009141168A
公开(公告)日：2009-06-25
申请号：JP2007316672
申请日：2007-12-07
申请人： Panasonic Corp , パナソニック株式会社
发明人： OGAWA HISASHI
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78
CPC分类号： H01L21/823857 , H01L21/823842
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device with a p-type MISFET (metal insulator semiconductor field effect transistor) and an n-type MISFET having respectively the optimal gate insulating film and gate electrode while not generating poly silicon film residue which becomes the cause of failure.
SOLUTION: The semiconductor device includes a first gate insulating film 13A formed on the first region 10A of a semiconductor substrate 10, a first gate electrode 14A formed on the first gate insulating film 13A, a second gate insulating film 13B formed on the second region 10B of the semiconductor substrate 10 and a second gate electrode 14B formed on the second gate insulating film 13B. The first gate insulating film 13A includes a first insulating film consisting of a first material including a first metal while a second gate insulating film 13B includes a second insulating film, in which a first material and a second material including a second metal are mixed.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供具有分别具有最佳栅极绝缘膜和栅电极的p型MISFET（金属绝缘体半导体场效应晶体管）和n型MISFET的半导体器件，同时不产生多晶硅膜残留物这成为失败的原因。解决方案：半导体器件包括形成在半导体衬底10的第一区域10A上的第一栅极绝缘膜13A，形成在第一栅极绝缘膜13A上的第一栅电极14A，形成在第一栅极绝缘膜13A上的第二栅极绝缘膜13B 半导体衬底10的第二区域10B和形成在第二栅极绝缘膜13B上的第二栅极电极14B。第一栅极绝缘膜13A包括由包括第一金属的第一材料构成的第一绝缘膜，而第二栅极绝缘膜13B包括混合有第一材料和第二材料的第二绝缘膜。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2009111200A Semiconductor device and fabrication method for same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009111200A
公开(公告)日：2009-05-21
申请号：JP2007282678
申请日：2007-10-31
申请人： Panasonic Corp , パナソニック株式会社
发明人： OSUGA TSUTOMU , OGAWA HISASHI , SATO YOSHIHIRO
IPC分类号： H01L21/768 , H01L21/28 , H01L21/3205 , H01L23/52 , H01L29/417 , H01L29/78
CPC分类号： H01L23/535 , H01L21/28518 , H01L21/28525 , H01L21/76895 , H01L21/823425 , H01L21/823468 , H01L21/823475 , H01L27/11 , H01L29/161 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device including a local interconnection structure wherein the size of a source/drain region never increases.
SOLUTION: The semiconductor device includes: a transistor 12 having a gate electrode 22 formed on a semiconductor substrate 11 and first and second source/drain regions 29A and 29B formed on both sides of the gate electrode 22 in the semiconductor substrate 11; a gate interconnect 42 formed at a position opposite to the gate electrode 22 with respect to the first source/drain region 29A on the semiconductor substrate 11; and the local interconnect structure 60 which connects the gate interconnect 42 and the first source/drain region 29A. The local interconnect structure 60 is configured by a SiGe layer 61 formed over the top surface of the first source/drain region 29A and the gate wiring 42.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种包括局部互连结构的半导体器件，其中源极/漏极区域的尺寸永远不会增加。解决方案：半导体器件包括：晶体管12，其具有形成在半导体衬底11上的栅电极22和形成在半导体衬底11中的栅电极22的两侧上的第一和第二源/漏区29A和29B; 在半导体基板11上相对于第一源极/漏极区域29A形成在与栅电极22相对的位置处的栅极互连42; 以及连接栅极互连42和第一源极/漏极区29A的局部互连结构60。局部互连结构60由形成在第一源极/漏极区29A的顶表面上的SiGe层61和栅极布线42构成。（C）2009，JPO和INPIT

6. 发明专利

JP2011023738A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011023738A
公开(公告)日：2011-02-03
申请号：JP2010215165
申请日：2010-09-27
申请人： Panasonic Corp , パナソニック株式会社
发明人： OGAWA HISASHI , MORI YOSHIHIRO
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To solve such a problem that there is a risk of generating a residue consisting of poly silicon on an element isolating region manufacturing a semiconductor device which has a gate insulating layer including a high dielectric material and a metal gate electrode. SOLUTION: On a first active region 10a of a semiconductor substrate 10, a first transistor of a first conductivity type is formed which includes a first gate insulating layer 13a containing the high dielectric material and a first metal, a lower conductive film 15a, and a first gate electrode 30a which has a first conductive film 18a and a first silicon film 19a. On a second active region 10b of the semiconductor substrate 10, a second transistor of a second conductivity type is formed which includes a second gate insulating layer 13b containing the high dielectric material and a second metal, a second conductive film 18b consisting of the same material as the first conductive film 18a, and a second gate electrode 30b which has a second silicon film 19b. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：解决的问题为了解决在制造半导体器件的元件隔离区域上产生由多晶硅构成的残留物的危险的问题，该半导体器件具有包括高电介质材料的栅极绝缘层和金属栅极电极。解决方案：在半导体衬底10的第一有源区域10a上，形成第一导电类型的第一晶体管，其包括含有高电介质材料的第一栅绝缘层13a和第一金属，下导电膜15a 以及具有第一导电膜18a和第一硅膜19a的第一栅电极30a。在半导体衬底10的第二有源区10b上，形成第二导电类型的第二晶体管，其包括含有高电介质材料的第二栅极绝缘层13b和第二金属，由相同材料组成的第二导电膜18b 作为第一导电膜18a和具有第二硅膜19b的第二栅电极30b。版权所有（C）2011，JPO＆INPIT

7. 发明专利

JP2010010199A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2010010199A
公开(公告)日：2010-01-14
申请号：JP2008164603
申请日：2008-06-24
申请人： Panasonic Corp , パナソニック株式会社
发明人： MORI YOSHIHIRO , OGAWA HISASHI , YAMADA TAKAYUKI , SATO YOSHIHIRO
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To overcome the problem that the residue of polysilicon may possibly be left on an element isolation region during fabrication of a semiconductor device having a gate insulating film containing a high dielectric material and a metal gate electrode. SOLUTION: A first transistor of first conductivity type which is equipped with a first gate insulating film 13a, and a first gate electrode 19a having a first underlying conductive film 14a and a first silicon film 18a is formed on the first active region 10a of a semiconductor substrate 10, and a second transistor of second conductivity type which is equipped with a second gate insulating film 13b, and a second gate electrode 19b having a second underlying conductive film 14b and a second silicon film 18b is formed on the second active region 10b of the semiconductor substrate 10. The first gate insulating film 13a contains a high dielectric material and a first metal, the first underlying conductive film 14a contains a conductive material and a first metal, and the second underlying conductive film 14b contains the same conductive material as that of the first underlying conductive film 14a. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题为了克服在具有含有高电介质材料和金属栅电极的栅极绝缘膜的半导体器件的制造期间，多晶硅残渣可能残留在元件隔离区上的问题。解决方案：在第一有源区10a上形成第一导电类型的第一晶体管，其配备有第一栅极绝缘膜13a和具有第一下导电膜14a和第一硅膜18a的第一栅电极19a 半导体衬底10和第二导电类型的第二晶体管，其配备有第二栅极绝缘膜13b，并且具有第二下部导电膜14b和第二硅膜18b的第二栅极电极19b形成在第二有源层半导体衬底10的区域10b。第一栅极绝缘膜13a包含高电介质材料和第一金属，第一下部导电膜14a包含导电材料和第一金属，并且第二下导电膜14b包含相同的导电材料与第一底层导电膜14a的材料相同。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2009224509A Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009224509A
公开(公告)日：2009-10-01
申请号：JP2008066543
申请日：2008-03-14
申请人： Panasonic Corp , パナソニック株式会社
发明人： OSUGA TSUTOMU , SATO YOSHIHIRO , OGAWA HISASHI
IPC分类号： H01L21/8234 , H01L21/28 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/423 , H01L29/49
CPC分类号： H01L21/823842 , H01L21/82345 , H01L21/823462 , H01L21/823481 , H01L21/823857 , H01L21/823878
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device solving the problems such as disconnection of wirings in a PN boundary part and higher resistance, while attaining higher integration in the semiconductor device having an MIPS-structure dual metal gate, and to provide a manufacturing method thereof.
SOLUTION: A gate electrode 122a of an NMIS transistor has a first metal-containing electroconductive film 104a and a third metal-containing electroconductive film 113 formed on the electroconductive film 104a. A PMIS transistor gate electrode 122b has a second metal-containing electroconductive film 104b and a third metal-containing electroconductive film 113 formed on the electroconductive film 104b. The third metal-containing electroconductive film 113 is formed continuously from the first metal-containing electroconductive film 104a onto the second metal-containing electroconductive film 104b, passing above an element-isolation region 102, so that it is in contact with the first and second metal-containing electroconductive films 104a, 104b.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：为了提供解决诸如PN边界部分中的布线断开和更高电阻的问题的半导体器件，同时在具有MIPS结构的双金属栅极的半导体器件中获得更高的集成度，并提供其制造方法。解决方案：NMIS晶体管的栅电极122a具有形成在导电膜104a上的第一含金属的导电膜104a和第三含金属的导电膜113。 PMIS晶体管栅电极122b具有形成在导电膜104b上的第二含金属的导电膜104b和第三含金属的导电膜113。第三含金属的导电膜113从第一含金属的导电膜104a连续地形成在第二含金属的导电膜104b上，通过元件隔离区域102，使得其与第一和第二金属含金属的导电膜104a，104b。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2008288465A Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008288465A
公开(公告)日：2008-11-27
申请号：JP2007133488
申请日：2007-05-18
申请人： Panasonic Corp , パナソニック株式会社
发明人： SATO YOSHIHIRO , OGAWA HISASHI
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/423 , H01L29/49
CPC分类号： H01L21/823857 , H01L21/823828 , H01L21/823835 , H01L21/823842 , H01L27/092
摘要： PROBLEM TO BE SOLVED: To accurately achieve a gate insulating film constituted of insulating materials different for a first MIS transistor and a second MIS transistor. SOLUTION: An N-type MIS transistor NTr comprises a first gate insulating film 105a formed on a first active region 100a in a semiconductor substrate 100 and a first gate electrode 108a formed on the first gate insulating film. A P-type MIS transistor PTr comprises a second gate insulating film 103b which is formed on a second active region 100b in the semiconductor substrate and comprises the insulating material different from that of the first gate insulating film, and a second gate electrode 108b formed on the second gate insulating film. The first gate electrode and the second gate electrode are electrically connected with each other in their upper regions, on an element isolation region, and are disconnected from each other in their lower regions with a sidewall insulating film 105xy therebetween, the sidewall insulating film 105xy being constituted of the same insulating material as that of the first gate insulating film. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：精确地实现由第一MIS晶体管和第二MIS晶体管不同的绝缘材料构成的栅极绝缘膜。解决方案：N型MIS晶体管NTr包括形成在半导体衬底100中的第一有源区域100a上的第一栅极绝缘膜105a和形成在第一栅极绝缘膜上的第一栅电极108a。 P型MIS晶体管PTr包括第二栅极绝缘膜103b，其形成在半导体衬底中的第二有源区域100b上，并且包括与第一栅极绝缘膜的绝缘材料不同的绝缘材料和形成在第一栅极电极108b上的第二栅电极108b 第二栅绝缘膜。第一栅极电极和第二栅电极在其上部区域中在元件隔离区域上彼此电连接，并且在其下部区域中彼此断开，其侧壁绝缘膜105xy之间，侧壁绝缘膜105xy 由与第一栅极绝缘膜相同的绝缘材料构成。版权所有（C）2009，JPO＆INPIT

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