专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPS5977432A Automatic adjusting device of copy density for copying machine 失效
标题翻译：复印机复印自动调节装置
公开(公告)号：JPS5977432A
公开(公告)日：1984-05-02
申请号：JP18676082
申请日：1982-10-26
申请人： Olympus Optical Co Ltd
发明人： HORIGUCHI TOSHIO
IPC分类号： G03B27/72 , G03G15/04 , G03G15/043
CPC分类号： G03G15/043
摘要： PURPOSE:To obtain proper density for clear picture quality automatically regardless of the contrast of a copy original by ajusting the luminous intensity of a light source for exposure automatically according to the contrast of the original. CONSTITUTION:The original 1 and a photoelectric converting element 2 such as a CCD sensor are moved relatively as shown by an arrow A to drive a shift register 4 at specific intervals of time, and an analog original picture signal of every line is led out of the photoelectric converting element 2 and converted by an A/D converter 5 into a digital signal of every picture element, which is transmitted to a processor 6. The processor 6 outputs data for controlling the luminous intensity of the exposure light source so that the contrast of a copy obtained finally is maximum. A controller 7 converts digital data from the processor 6 into an analog voltage to drive a driver, thereby flowing a current necessary to obtain specific luminous intensity to the light source 8. Thus, the proper density is obtained automatically regardless of the contrast of the original.
摘要翻译：目的：通过根据原稿的对比度自动调节曝光光源的发光强度，自动获得清晰图像质量的适当浓度，而不管复印原稿的对比度如何。构成：原稿1和CCD传感器等光电转换元件2如箭头A所示相对移动，以特定的时间间隔驱动移位寄存器4，并且将每行的模拟原始图像信号从光电转换元件2并由A / D转换器5转换成被发送到处理器6的每个像素的数字信号。处理器6输出用于控制曝光光源的发光强度的数据，使得对比度最终获得的副本是最大的。控制器7将来自处理器6的数字数据转换为模拟电压以驱动驱动器，从而将获得特定发光强度所需的电流流向光源8.因此，无论原件的对比度如何，自动获得适当的密度。

2. 发明专利

JPS60196854A Information retrieving system 失效
标题翻译：信息检索系统
公开(公告)号：JPS60196854A
公开(公告)日：1985-10-05
申请号：JP5322884
申请日：1984-03-19
申请人： Olympus Optical Co Ltd
发明人： HORIGUCHI TOSHIO
IPC分类号： G06F12/00 , G06F17/30 , G11B13/04 , G11B20/12 , G11B27/026 , G11B27/10 , G11B27/11 , G11B27/32 , G11B27/34
CPC分类号： G11B27/026 , G11B13/04 , G11B20/1217 , G11B27/105 , G11B27/11 , G11B27/329 , G11B27/34 , G11B2020/1259 , G11B2220/20 , G11B2220/211 , G11B2220/218 , G11B2220/2508 , G11B2220/2512 , G11B2220/2525 , G11B2220/2537
摘要： PURPOSE: To reduce bit unit cost for recording information and to prevent important information from erasing due to malfunction or the like by recording picture information or the like on an erasing disabled recording area separately from a recording area.
CONSTITUTION: To record picture information and retrieving information, an optical disc is set up on an optical disc device 1 and the picture information and the retrieving information are recorded in dead areas of the 1st and 2nd recording areas of the optical disc under control by a CPU4. At the time of retrieval, all the retrieving information recorded in the 2nd recording area is read in a memory of the CPU4 and a keyword is inputted from a console unit 3. The CPU4 read out required picture information from corresponding track and sector of the 1st recording area of the optical disc on the basis of the retrieving information and displays the read information on a picture display device 2.
COPYRIGHT: (C)1985,JPO&Japio
摘要翻译：目的：为了减少记录信息的位单位成本，并且通过在与记录区域分开的擦除禁用记录区上记录图像信息等来防止重要信息由于故障等而被擦除。构成：为了记录图像信息和检索信息，在光盘装置1上设置光盘，并且图像信息和检索信息被记录在光盘的第一和第二记录区域的死区中，由 CPU4。在检索时，记录在第二记录区域中的所有检索信息都在CPU4的存储器中读取，并且从控制台单元3输入关键字.CPU4从第一记录区域的相应轨道和扇区读出所需的图像信息根据检索信息记录光盘的记录区域，并将读取的信息显示在图像显示装置2上。

3. 发明专利

JPS59114639A Ready signal generating circuit of high speed operating element 失效
标题翻译：高速操作元件的准备信号生成电路
公开(公告)号：JPS59114639A
公开(公告)日：1984-07-02
申请号：JP22403782
申请日：1982-12-22
申请人： Olympus Optical Co Ltd
发明人： HORIGUCHI TOSHIO , YOSHIKAWA FUMIO
IPC分类号： G06F9/30 , G06F13/42 , G06F15/16
CPC分类号： G06F13/4226
摘要： PURPOSE:To operate normally a high speed operating element by a simple circuit by obtaining a READY signal of the high speed operating element by AND of a one-shot multivibrator output triggered by a chip select signal, and a wait signal. CONSTITUTION:A READY signal generating circuit 14 is constituted of one one- shot multivibrator and one AND gate 16. The one-shot multivibrator 15 is triggered by a leading edge of a chip select signal CS of a high speed operating element 12, outputs a pulse having a fixed width determined by an external resistance R1 and a capacitor C1, and it appears in a terminal Q. The AND gate 16 gains logical OR of a Q output signal of the one-shot multivibrator 15, and a wait signal (pause) generated by the high speed operating element 12, and its output becomes a READY signal to a CPU11.
摘要翻译：目的：通过简单的电路正常操作高速操作元件，通过由芯片选择信号触发的单稳态多谐振荡器输出和等待信号通过AND获得高速工作元件的就绪信号。构成：就绪信号发生电路14由一个单触发多谐振荡器和一个与门16构成。单稳态多谐振荡器15由高速操作元件12的芯片选择信号CS的前沿触发，输出一个具有由外部电阻R1和电容器C1确定的固定宽度的脉冲，并且它出现在端子Q中。与门16获得单稳多谐振荡器15的Q输出信号的逻辑或或等待信号（暂停），其输出成为CPU11的READY信号。

4. 发明专利

JPS59114638A Ready signal generating system of high speed operating element 失效
标题翻译：高速操作元件准备信号发生系统
公开(公告)号：JPS59114638A
公开(公告)日：1984-07-02
申请号：JP22403682
申请日：1982-12-22
申请人： Olympus Optical Co Ltd
发明人： HORIGUCHI TOSHIO
IPC分类号： G06F9/30 , G06F13/42 , G06F15/16
CPC分类号： G06F13/4226
摘要： PURPOSE:To execute exactly a wait request and a release to a CPU, and to operate normally a high speed operating element by requesting a wait by a chip select signal of the high speed operating element, and releasing it by a trailing edge of a wait signal. CONSTITUTION:A READY signal generating circuit 14 is constituted of one D type flip-flop 15 and two NAND gates 16, 17. The flip-flop 15 is cleared when a read-out signal RD and a write signal WT from a CPU11 are not active, its clear is released when they are active, and also it is set by a trailing edge of a wait signal (pause) from a high speed operating element 12. A READY signal to the CPU is formed by an output Q of the flip-flop 15 and an output obtained through an NAND gate 16 of a chip select signal CS of the high speed operating element 12.
摘要翻译：目的：通过请求等待高速操作元件的芯片选择信号，并通过等待的后沿将其释放，以正确执行等待请求和释放到CPU，并正常操作高速操作元件信号。构成：READY信号发生电路14由一个D型触发器15和两个NAND门16,17组成。当来自CPU11的读出信号RD和写入信号WT不是时，触发器15被清零当它们处于活动状态时，其清除被释放，并且还由来自高速操作元件12的等待信号（暂停）的后沿设置。来自CPU的READY信号由翻转的输出Q形成并且通过NAND门16获得的高速操作元件12的芯片选择信号CS的输出。

5. 发明专利

JPS5979683A Exposing device in electrophotographic copying machine 失效
标题翻译：电子雕刻机中的曝光装置
公开(公告)号：JPS5979683A
公开(公告)日：1984-05-08
申请号：JP18819982
申请日：1982-10-28
申请人： Olympus Optical Co Ltd
发明人： HORIGUCHI TOSHIO , GAMACHI SHINICHI
IPC分类号： H04N1/407 , B41J2/44 , G03G15/04 , H04N1/06 , H04N1/401
CPC分类号： H04N1/401
摘要： PURPOSE:To obtain a copy having a fixed contrast by resolving the non-linearity of an object image with the copied picture density based upon the non-linearity of a photoreceptor. CONSTITUTION:An analog picture density signal of the object image 1 in each line is taken out from the object image 1 and A/D converted and the digital signal is transmitted to a processor 5. The processor 5 operates the picture density signal by a compensation function compensating the non-linearity of the photoreceptor and transmits the compensated picture signal to a register 6 to store the signals successively. The compensated signals are successively taken out by a light quantity controller driving device 7 to control the light emitting of a light emitting device 8. After completing the irradiation of one line, a photodetective drum 10 is revolved by the same distance as the relative moving distance of the object image 1 and the same operation is repeated successively. Consequently, a latent image to obtain a copy with the same density as the object image 1 is formed on the drum 10.
摘要翻译：目的：通过基于感光体的非线性度，利用复制的图像密度解析对象图像的非线性来获得具有固定对比度的复印件。构成：从对象图像1中取出每行中的对象图像1的模拟图像浓度信号，并进行A / D转换，并将数字信号发送到处理器5.处理器5通过补偿来操作图像浓度信号功能补偿感光体的非线性，并将经补偿的图像信号发送到寄存器6，以连续存储信号。补偿信号由光量控制器驱动装置7连续取出，以控制发光装置8的发光。在完成一行的照射之后，光电检测鼓10与相对移动距离相同的距离的对象图像1并且相同的操作被连续地重复。因此，在滚筒10上形成具有与对象图像1相同密度的复制品的潜像。

6. 发明专利

JPS60211573A Picture input editing device 失效
标题翻译：图像输入编辑设备
公开(公告)号：JPS60211573A
公开(公告)日：1985-10-23
申请号：JP6589584
申请日：1984-04-04
申请人： Olympus Optical Co Ltd
发明人： ATOMACHI NAGAHIRO , HORIGUCHI TOSHIO , AKATSUKA YUUICHIROU , MATSUEDA AKIRA
IPC分类号： G06F17/21 , B41B19/00 , G06T3/40 , G06T5/40 , G06T11/60 , H04N1/40
CPC分类号： B41B19/00 , G06T3/40 , H04N1/40093
摘要： PURPOSE: To form accurately a desired picture pattern by storing once an original picture to a memory of a computer and generating a corrected picture pattern together with an original pattern while displaying it through data processing.
CONSTITUTION: A character pattern desired to be generated converted into an electric signal by an image pickup device 6, a CPU 18 fetches a data of the character pattern by using a picture fetch command from an operator console 10, the data is stored in the 1st memory 19 and also displayed on a display device 14. In correcting a displayed character pattern, when a correction command is inputted from the operator console, since a pattern before correction is displayed on the display device 14, a pointer 23 is moved to a position of a picture element desired to be corrected by the operator, the change of the value of the picture element is indicated to generate the desired pattern. The pattern during the correction or after correction is stored in the 2nd memory other than that of the pattern before correction. The pictures before and after correction are arranged on the display device 14 on the way of correction or overlapped for display.
COPYRIGHT: (C)1985,JPO&Japio
摘要翻译：目的：通过将一张原始图像存储到计算机的存储器中并准确地形成所需的图像图案，并通过数据处理显示原始图案并与原始图案一起生成校正图像图案。构成：通过图像拾取装置6转换成电信号的字符图形，CPU18通过使用来自操作员控制台10的图像取出命令取出字符图案的数据，数据存储在第1 存储器19并且还显示在显示装置14上。在校正显示的字符图案时，当从操作员控制台输入校正命令时，由于在显示装置14上显示校正前的图案，所以将指针23移动到位置要求由操作者校正的图像元素，则指示图像元素的值的变化以产生期望的图案。在校正期间或校正后的图案被存储在除了校正之前的图案的第二存储器中。修正前后的图像在校正路径上布置在显示装置14上或重叠显示。

7. 发明专利

JPS5977536A Address generation transfer system of dma controller 失效
标题翻译： DMA控制器地址生成传输系统
公开(公告)号：JPS5977536A
公开(公告)日：1984-05-04
申请号：JP18676182
申请日：1982-10-26
申请人： Olympus Optical Co Ltd
发明人： HORIGUCHI TOSHIO
IPC分类号： G06F3/00 , G06F12/02 , G06F12/06 , G06F13/28
CPC分类号： G06F3/00 , G06F13/28
摘要： PURPOSE:To switch address generation transfer ranges seletively with a simple constitution by switching a circuit which generates an address only in a prescribed memory space and transfers it and a circuit which transfers data across memory spaces continued from this memory space. CONSTITUTION:When a switch 14 is turned on, a 16-bit counter consisting of counters 9-12 counts up the address to generate the address of a memory which is accessed by direct memory access DMA. When values of counters 9-12 become ''FFFF'', the carry output signal from the most significant bit is given as a clock to a DFF13 by the next counting signal. Then, an input terminal D of the FF14 is ''0'', and the output of a full adder 1 is not changed, and outputs A19- A16 of upper four bits are invariable. Values of counters 9-12 become ''0000'' by the first counting signal after ''FFFF''. Thus, the address is generated only in a designated memory space, and data is transferred.
摘要翻译：目的：通过简单的结构切换地址生成传输范围，只需在指定的存储空间中切换生成地址的电路，并传输数据，并将电路从存储空间继续传输。构成：当开关14接通时，由计数器9-12组成的16位计数器对地址进行计数，以产生由直接存储器访问DMA访问的存储器的地址。当计数器9-12的值变为“FFFF”时，来自最高有效位的进位输出信号通过下一个计数信号作为DFF13的时钟给出。然后，FF14的输入端子D为“0”，全加器1的输出不变，上位4位的A19〜A16不变。计数器9-12的值由“FFFF”之后的第一个计数信号变为“0000”。因此，仅在指定的存储器空间中生成地址，并且传送数据。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式