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    • 1. 发明专利
    • RECTIFICATION DETECTING CIRCUIT
    • JPS6086924A
    • 1985-05-16
    • JP19406083
    • 1983-10-19
    • OKI ELECTRIC IND CO LTDNIPPON TELEGRAPH & TELEPHONE
    • HASHIZUME YUKINAOFUJII TERUJIKANEKO TAKAOKIKUCHI HIROYUKIIWATA ATSUSHI
    • H04B3/00H03H19/00H04B3/04
    • PURPOSE:To change the time constant of charge/discharge and to facilitate easy conversion of a rectification detecting circuit into an LSI, by providing an LPF of a switched capacitor film to the smooth part of the rectification detecting circuit and controlling the frequencies before and after detection of rectification for the clock pulse of said LPF. CONSTITUTION:A rectification detecting circuit rectifies an AC signal and converts it into a direct current by means of operational amplifiers 2 and 5. An LPF12 of a switched capacitor filter is provided to the smooth part of the rectification detecting circuit. At the same time, a logical circuit is provided to said detecting circuit to give a logical operation to the clock inputs given from clock input terminals 9 and 10. The clocks phi and -phi given from said logical circuit are applied to MOS transistors Tr1-Tr6 of the LPF12. Then the time during which an AC signal is supplied to the rectification detecting circuit and then detected is set freely together with the time during which the AC signal is cut off and the rectification detecting circuit is recovered. Based on these set times, the frequency of the LPF12 is controlled before and after a rectification detecting mode. Then the time constant of charge/discharge is varied to convert the rectification detecting circuit into an LSI.
    • 4. 发明专利
    • CASCODE DISTRIBUTION AMPLIFIER
    • JPH03136509A
    • 1991-06-11
    • JP27566089
    • 1989-10-23
    • NIPPON TELEGRAPH & TELEPHONE
    • KIKUCHI HIROYUKI
    • H03F1/48H03F3/16H03F3/60
    • PURPOSE:To attenuate a high frequency component leaked to the circuit and to improve the broad band characteristic by connecting one terminal of a 3rd transmission circuit with respect to a transmission line to the ground through an adjacent transmission line and a 3rd termination circuit comprising series connection of a resistive element and a capacitive element in this order. CONSTITUTION:One terminal of a 3rd transmission circuit G3 with respect to a transmission line LCn is connected to the ground through a transmission line LC(n+1) and a 3rd termination circuit B3 comprising series connection of a resistive element R3 and a capacitive element C3 in this order. Thus, a high frequency component forcibly leaked between transmission lines LC1 and LC2, LC2 and LC3, LC3 and LC4...LCn and LC(n+1) of a 3rd transmission circuit G3 via gate parasitic capacitors of field effect transistors(TRs)) TB1, TB2...TBn is effectively absorbed and attenuated by the 3rd termination circuit B2 through the transmission line LC(n+1), and the excellent broad band characteristic is easily realized.
    • 8. 发明专利
    • TIMER CIRCUIT
    • JPS57194379A
    • 1982-11-29
    • JP7902081
    • 1981-05-25
    • NIPPON TELEGRAPH & TELEPHONE
    • KANEKO TAKAOKIKUCHI HIROYUKI
    • G04F3/00G04F1/00H03K17/28
    • PURPOSE:To make a setting time adjustment unnecessary and reduce a capacity value, by obtaining a timer setting time of a timer circuit with a capacity ratio and a switching period in the constitution in which electric charge is redistributed by a capacity and switches. CONSTITUTION:A switch 13 is turned on and a capacity 11 is charged with an power source 5. Switches 12, 13 are turned off and a switch 14 turned on, and an electric charge of the capacity 11 is redistributed to a capacity 10. The switch 14 is turned off and the switch 13 turned on, the capacity 11 is charged again with the source 5. The switch 13 is turned off and the switch 14 on, an electric charge of the capacity 11 is redistributed to the capacity 10. These operations are repeated and when a minus input terminal 2 of a differential amplifier 1 exceeds a reference voltage VR, an output of the amplifier 1 is inverted. A timer setting time is decided by a capacity ratio of the capacity 10 to the switching periods of the switches 13, 14 and the capacity 11.