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1. 发明专利

JP2002111459A PHASE COMPARISON CIRCUIT 失效
公开(公告)号：JP2002111459A
公开(公告)日：2002-04-12
申请号：JP2000303265
申请日：2000-10-03
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： ITO TOSHIHIRO , FUKUYAMA HIROYUKI , ENOKI TAKATOMO
IPC分类号： G01R25/00 , H03K5/26 , H03K19/20
摘要： PROBLEM TO BE SOLVED: To provide a phase comparison circuit with a small number of components. SOLUTION: Input signals Vin1 and Vin2 are input to a first and second input terminals 11 and 12, respectively. When Vin2=V1, an output terminal 13 is turned into a low level VL regardless of the Vin1 value. If Vin1 Vt, then the Vout becomes Vout=VL. Even if the Vin1 varies thereafter, the Vout many not vary.

2. 发明专利

JPH05235325A 失效
公开(公告)号：JPH05235325A
公开(公告)日：1993-09-10
申请号：JP7212892
申请日：1992-02-24
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： SHIGEKAWA NAOTERU , WAHO TAKAO , FUKUYAMA HIROYUKI
IPC分类号： H01L29/205 , H01L29/68
摘要： PURPOSE:To obtain a resonance tunnel transistor, which combines the effect of a valley current suppression and the reduction effect of electron passage time by constituting a barrier layer out of the mixed crystal material doped with n-type impurities, and constituting a well layer out of a semiconductor material which does not contain impurities. CONSTITUTION:This transistor is constituted by stacking a collector layer 1 doped with n-type impurities, a first barrier layer 2, a well layer 3, a second barrier layer 4, and an emitter layer 5 doped with n-type impurities in order, and forming an emitter electrode 6, a base electrode 7, and a collector electrode 8 to connect with the collector layer 1, the well layer 3, and the emitter layer 5, respectively. And, the well layer 3 consists of a direct transition type semiconductor material, and the first barrier layer 2 and the second barrier layer 4 consists of indirect transition type mixed crystal material. The well layer 3 does not contain impurities, and at least one part each of the first barrier layer 2 and the second barrier layer 4 is doped positively with n-type impurities.

3. 发明专利

JP2019004228A 波長分散補償フィルタ审中-公开
公开(公告)号：JP2019004228A
公开(公告)日：2019-01-10
申请号：JP2017115260
申请日：2017-06-12
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MIURA NAOKI , NOSAKA HIDEYUKI , FUKUYAMA HIROYUKI , KATSURAI HIROAKI
IPC分类号： H03H17/08 , H03H17/06 , H04B10/2513
摘要：【課題】FIRフィルタで構成した波長分散補償フィルタの乗算器の数を削減する。【解決手段】入力信号に対して単位遅延時間TのN(Nは3以上の奇数)タップのタップ付遅延線を構成する縦続接続されたN−1個の遅延器と、前記タップ付遅延線から分岐されたタップ信号を更に遅延する分岐遅延器と、前記分岐遅延器の遅延出力を加算総和して加算総和信号を出力する加算器を備える波長分散補償フィルタとした。【選択図】図2

4. 发明专利

JP2003087119A QUANTIZATION CIRCUIT AND ANALOG/DIGITAL CONVERTER USING THE SAME 审中-公开
公开(公告)号：JP2003087119A
公开(公告)日：2003-03-20
申请号：JP2001273926
申请日：2001-09-10
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MUTO YOSHIKAZU , FUKUYAMA HIROYUKI , ENOKI TAKATOMO , SHIBATA YUKIMICHI
IPC分类号： H03M1/12 , H03M3/02
摘要： PROBLEM TO BE SOLVED: To provide quantization circuits with excellent isolation between an input and an output. SOLUTION: Isolation between an input and an output is improved by cascading the quantization circuits to make a multistage configuration that matches clock timing, and the multistage configuration quantization circuits are also applied to a digital sigma type AD converter.

5. 发明专利

JP2002084189A PHASE SYNCHRONIZATION CIRCUIT 失效
公开(公告)号：JP2002084189A
公开(公告)日：2002-03-22
申请号：JP2001079616
申请日：2001-03-21
申请人： NTT ELECTRONICS CORP , NIPPON TELEGRAPH & TELEPHONE
发明人： MURAGUCHI MASAHIRO , YONEYAMA MIKIO , SASAKI HIROAKI , NOSAKA HIDEYUKI , FUKUYAMA HIROYUKI , KAMITSUNA HIDEKI
IPC分类号： H03L7/093 , H03L7/10
摘要： PROBLEM TO BE SOLVED: To provide a phase synchronization circuit having a pull-in circuit, in which the lock range can be enlarged and a locked state can be maintained stably. SOLUTION: The phase synchronization circuit has a signal path, where a phase comparator, a loop filter and a voltage-controlled oscillator are cascaded. The phase comparator compares the phase between an input signal and an output signal from the voltage-controlled oscillator, and outputs the comparison results. The loop filter receives an output signal from the phase comparator and outputs a DC voltage, and the voltage-controlled oscillator controls the output oscillation frequency, depending on the DC output voltage from the loop filter. The phase synchronization circuit adds a signal for matching the average output voltage from the phase comparator with a prescribed reference voltage to the voltage of the signal path.

6. 发明专利

JP2001308646A DIRECT DIGITAL SYNTHESIZER 失效
公开(公告)号：JP2001308646A
公开(公告)日：2001-11-02
申请号：JP2000124077
申请日：2000-04-25
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： FUKUYAMA HIROYUKI , NOSAKA HIDEYUKI , YAMAGUCHI AKIRA , MURAGUCHI MASAHIRO
IPC分类号： H03H17/06 , H03B28/00
摘要： PROBLEM TO BE SOLVED: To realize a direct digital synthesizer(DDS) that outputs high frequency signals. SOLUTION: The DDS has an N bit accumulator 31 for which incrementally accumulates frequency setting data K, synchronizing with the clock fck and has a digital filter 32 which filters signals from the accumulator. Thus, high frequency sine wave signal can be output from the accumulator.

7. 发明专利

JPH07326727A RESONANCE TUNNEL ELEMENT 失效
公开(公告)号：JPH07326727A
公开(公告)日：1995-12-12
申请号：JP14083694
申请日：1994-05-30
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： FUKUYAMA HIROYUKI , WAHO TAKAO
IPC分类号： H01L29/06 , H01L29/66
摘要： PURPOSE:To suppress any non-resonance tunnel current within the voltage range of a resonance current by a method wherein the Fermi-energy of a carrier in the first electrode, the band end energy of the first electrode and the energy level in the local stage of a carrier forming a potential structure are specified to bring about a specific relation. CONSTITUTION:The first electrode 5 is deposited in ohmic mode on the opposite side to the first semiconductor layer 2 on a semiconductor substrate 1. Besides, the second electrode 6 in ohmic mode is fitted to the opposite side to a barrier layer 3 on the second semiconductor layer 4. At this time, the Fermi energy EF of the carrier in the first electrode 5, the band end energy EC of the first electrode 5, the energy EB on the band end of the carrier layer 3 and the energy level EL of local level of the carrier formed in a potential structure are specified to bring about the relation of (EF-EC)

8. 发明专利

JP2001127731A TRANSMITTER AND RECEIVER 失效
公开(公告)号：JP2001127731A
公开(公告)日：2001-05-11
申请号：JP30518099
申请日：1999-10-27
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YAMAGUCHI AKIRA , FUKUYAMA HIROYUKI , NOSAKA HIDEYUKI , MURAGUCHI MASAHIRO
IPC分类号： H04B1/26 , H04B1/04 , H04J11/00 , H04L12/28 , H04W88/06 , H04Q7/38
摘要： PROBLEM TO BE SOLVED: To actualize a transmitter and a receiver which can handle data communication of different systems in common and to actualize a transmitter and a receiver which can handle data communication of different systems in common with simple constitution. SOLUTION: With a switch, a choice of whether the local signal from a local oscillator is inputted to an RF mixer as it is or after being multiplied by a multiplier is made. The number of parallels of data is varied.

9. 发明专利

JPH07153977A TUNNEL MULTI-INPUT ELEMENT 失效
公开(公告)号：JPH07153977A
公开(公告)日：1995-06-16
申请号：JP32344493
申请日：1993-11-30
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： FUKUYAMA HIROYUKI , WAHO TAKAO
IPC分类号： H01L29/88 , H01L29/06 , H01L29/66 , H01L29/80
摘要： PURPOSE:To make tunnel current exhibit strong non-linearity against control voltage by a potential structure wherein carrier's localization is formed in the direction of barrier layer's thickness and also in one direction independent of that direction, within the barrier layer. CONSTITUTION:To the first electrode 5 for supplying a carrier through the first semiconductor layer 2 on a substrate 1, a barrier layer 3 which is a barrier for the carrier is connected. In the barrier layer 3, carrier's localization state is formed of a cubic quantum dot 3a in the thickness direction of the barrier layer 3 and also in one direction independent of that direction. Then to the barrier layer 3, through the second semiconductor layer 4, the second electrode 7 for absorbing the carrier is connected. By this, a tunnel multiple-input element is realized as a high performance element.

10. 发明专利

JPH065844A RESONANCE TUNNEL THREE-TERMINAL DEVICE 失效
公开(公告)号：JPH065844A
公开(公告)日：1994-01-14
申请号：JP18321992
申请日：1992-06-17
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： FUKUYAMA HIROYUKI , WAHO TAKAO
IPC分类号： H01L29/06 , H01L29/68
摘要： PURPOSE:To obtain a current amplification factor larger than one, by stacking a collector layer having a first semiconductor layer, a base layer of a second conductivity type reverse to a first conductivity type, and an emitter layer having a second semiconductor layer of the first conductivity type. CONSTITUTION:A collector layer 2, a base layer 3 and an emitter layer 4 are sequentially stacked on a semiconductor substrate 1. The collector layer 2 comprises a semiconductor layer 2d of GaAs, a semiconductor layer 2e of AlGaAs and a semiconductor layer 2f of AlAs. The base layer 3 comprises a barrier layer 3d, a quantum well layer 3e and a barrier layer 3f. The emitter layer 4 comprises a semiconductor layer 4d, a semiconductor layer 4e of GaAlAs and a semiconductor layer 4f of GaAs. A collector electrode layer 5 is ohmically connected to the semiconductor substrate 1. When electrons are implanted from the semiconductor layer 4d of the emitter layer 4 to the collector layer 2, the number of electrons implanted to the semiconductor layer 2f becomes large and a current amplification factor larger than one can be obtained.

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