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    • 1. 发明专利
    • CONTROLLING INFORMATION OUTPUT DEVICE
    • JPH04189566A
    • 1992-07-08
    • JP32026790
    • 1990-11-23
    • NEC CORPNIPPON ELECTRIC ENG
    • MATSUSHITA HIROYUKIYAMASHITA YOSHIHIRO
    • B41J2/485B41J5/30B41J19/00G06T3/40G09G5/26
    • PURPOSE:To facilitate the arrangement of controlling information for a large amount of image data by providing a timing generation means, a character generation means, a character code storage means, a reference signal generation means, and a main- scanning enlarging means for controlling main-and sub-scanning direction recording positions. CONSTITUTION:A sub-scanning width signal, a main-scanning width signal, and a clock signal are generated from a reference signal generation circuit 11 for outputting a character as management information. In a timing generation circuit 12, character recording start positions in main-and sub-scanning directions are determined and supplied to a character generation circuit 13. After a character pitch is determined, the data is supplied to a character code storage circuit 14. In the character generation circuit 13, a character is generated in accordance with a reference signal so as to be recorded on a predetermined position. In the character code storage circuit 14, a character code for the character generation circuit 13 in which characters required for the management information are stored is stored in a memory so as to be supplied to the character generation circuit 13 when the character is recorded. The character data outputted from the circuit 13 is converted to a character of a magnification set by a CPU 15 by a main scanning enlarging circuit 16. In this manner, the controlling information can be easily recorded on an arbitrary position.
    • 2. 发明专利
    • AUTOMATIC ADJUSTING DEVICE FOR LIGHT QUANTITY
    • JPH04166828A
    • 1992-06-12
    • JP29193490
    • 1990-10-31
    • NEC CORPNIPPON ELECTRIC ENG
    • YAMASHITA YOSHIHIROMATSUSHITA HIROYUKI
    • G03B27/72G11B7/125
    • PURPOSE:To shorten a time required for adjusting luminous energy by a delay circuit by providing a plurality of the delay circuits of different time constant and a limit circuit, and adjusting the luminous energy of a light source by an output signal of the limit circuit. CONSTITUTION:When a quantity of emitted light of a recording light source 7 is detected by a light receiving diode 1, a detection signal is amplified by an amplifier 2 to apply a sample hold by predetermined timing in a sample hold circuit 3. After voltage of the sample hold is compared with the reference voltage in a comparator circuit 4, a compared result is delayed by the first delay circuit 5a to stabilize a fluctuation of the compared result moderated, and further a limit of voltage is applied in a limit circuit 6. Thus, the quantity of emitted light of the light source 7 can be determined by an output signal of the limit circuit 6. In the case of changing the quantity of emitted light of the recording light source 7, the second delay circuit 5b of different time constant is used. In this way, shortening of a luminous energy fluctuation time is contrived while obtaining stable luminous energy at recording time.
    • 5. 发明专利
    • IMAGE PROCESSING SYSTEM AND ITS DEVICE
    • JPH04205476A
    • 1992-07-27
    • JP33707090
    • 1990-11-30
    • NEC CORPNIPPON ELECTRIC ENG
    • MATSUSHITA HIROYUKIYAMASHITA YOSHIHIRO
    • H04N1/387G06T1/00G06T3/00G09G5/38
    • PURPOSE:To make it possible to superpose two received image data on an optional position even when their size is not the same by sending the limited part of the 1st image data stored in an image data storing means to a superposing means and superposing the sent part to the 2nd input image data. CONSTITUTION:In the case of storing the 2nd image data in a memory 15, the logic of a terminal 43 is set up to '1' and memory image data applied from a terminal 42 are allowed to flow and superposed to the other image data and the superposed image data are stored again in the memory 15. The image data stored in the memory 15 are outputted to a selector circuit 16 and partial image data read out from the 1st image data are sent to a superposing processing circuit 14 by a control instruction outputted from a CPU 19. Synthetic image data consisting of a part of the 1st image data and the 2nd image data are outputted from an output buffer 17 to an output terminal 22. Thereby only an optional position of two image data to be originally synthesized in a computer can rapidly be superposed by receiving the XY axis information of the superposing position.
    • 6. 发明专利
    • IMAGE PROCESSING UNIT
    • JP2001136315A
    • 2001-05-18
    • JP31819399
    • 1999-11-09
    • NIPPON ELECTRIC ENG
    • MATSUSHITA HIROYUKI
    • H04N1/00H04N1/387
    • PROBLEM TO BE SOLVED: To solve a problem of a conventional image processing unit that have had waste of its recording time because a system capable of high-speed processing successively recording received image data and marginal character data in real time cannot continuously record the marginal character data and the received image data at present resulting in having had to temporarily stop recording between both the data in the synthesis processing required to additionally record the marginal character data such as a recording time and recording contents to the received image data. SOLUTION: Before an image memory 11 outputs received image data, the image memory 11 outputs number of line data denoting number of line for the marginal character data in white or black level data and the marginal character data are outputted synchronously with this output. Then an AND/OR inversion control section 14 applies AND processing, OR processing or inverting processing to these data to obtain a negative/positive image output. Moreover, the image processing unit is provided with a means that controls the marginal character data to be always a positive erected image independently of the received image data.
    • 7. 发明专利
    • LONGITUDINAL/LATERAL CONVERSION PROCESSOR
    • JP2000182041A
    • 2000-06-30
    • JP36106098
    • 1998-12-18
    • NIPPON ELECTRIC ENG
    • MATSUSHITA HIROYUKI
    • G06F17/21G06T1/00G06T1/20G06T3/60
    • PROBLEM TO BE SOLVED: To provide a longitudinal/lateral converter capable of shortening editorial processing time, with a small capacity of a page memory and at low cost. SOLUTION: Image data which are recorded in the page memory 2 one address of which is constituted by plural bits are read based on an instructed longitudinal/lateral conversion instruction and are outputted in serial by the longitudinal/lateral conversion processor. This processor is provided with an image data recording means to record the image data at a specified position in the page memory 2 in a line order, a mask area calculating means 4 to calculate a mask area in which no image data are recorded in the page memory 2 from the specified position, a control means 6 to read the image data from the leading address of the page memory 2 in the line order and to output the read image data in series when no longitudinal/lateral conversion instruction is given and a mask means 4 to mask the image data in the mask area calculated for the image data which are outputted in series by the mask area calculating means 4.
    • 8. 发明专利
    • RECORDER
    • JP2002240363A
    • 2002-08-28
    • JP2001037803
    • 2001-02-15
    • NIPPON ELECTRIC ENG
    • MATSUSHITA HIROYUKI
    • B41J5/30G06F3/12G06F13/00
    • PROBLEM TO BE SOLVED: To provide a recorder wherein operations of starting, finishing, stopping and restarting of transmitting transmission data necessary for data transmission are simplified, the data can be transmitted to a recording laser diode at high speed and a position having a trouble can be determined when the problem occurs. SOLUTION: When a data receiving section 11 receives image data from an upper system, an image memory section 12 temporarily stores the image data. A control code adding section 13 reads the temporarily stored image data, adds a control code by each unit of one line, and transmits the image data to an image recording data control section 2. A control code detecting section 21 detects the control code in each line data of the image data transmitted from the control code adding section 13. A memory control section 23 controls starting and stopping of the transmitted image data with respect to a line memory section 22 corresponding to the detected control code, and transmits the transmitted image data to a recording LDs 24, 25 from the line memory 22.