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1. 发明专利

JPH01103008A PEAK DETECTING CIRCUIT 失效
公开(公告)号：JPH01103008A
公开(公告)日：1989-04-20
申请号：JP26011587
申请日：1987-10-15
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： OKAMURA TOSHIYUKI , HOTSUTA NORIYA , SUZUKI FUMIO
IPC分类号： H03F3/343 , H03F3/34
摘要： PURPOSE:To detect a peak of a low potential side of a signal by using two pieces of amplifies and one piece of capacitor so that a voltage of an output terminal becomes a voltage which has followed a level variation of the low potential side of an input signal. CONSTITUTION:When the lowest potential of an AC signal which has been inputted to an input terminal 3 is lower than the potential of an output terminal 4, it is amplified by an amplifier 1, a capacitor 5 is charged with an output of the amplifier 1, and the input voltage of an amplifier 2 rises. When the forward turn output of the amplifier 2 drops and becomes equal to the lowest potential of the input signal, the voltage to be charged of the capacitor 5 is saturated and becomes a prescribed value, and the voltage of the forward turn output stops its drop. When the lowest potential of the AC signal of the terminal 3 is higher than the voltage of the terminal 4, the voltage of the forward turn output of the amplifier 1 decreases, the voltage to be charged of the capacitor 5 decreases, and the voltage of the terminal 4 rises. Therefore, the voltage of the terminal 4 becomes a voltage which has followed a level variation of the low potential side of the input signal. In such a way, the peak of the low potential side of the signal is detected.

2. 发明专利

JPH01240869A PEAK DETECTOR 失效
公开(公告)号：JPH01240869A
公开(公告)日：1989-09-26
申请号：JP6768688
申请日：1988-03-22
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： SUZUKI FUMIO , TAKAYAMA JUN , HOTSUTA NORIYA
IPC分类号： G01R19/04 , H03D1/00
摘要： PURPOSE:To reduce a differential voltage between a peak voltage and a peak detection voltage of a signal, by connecting a positive phase input of an amplifier to a signal source, an antiphase input to an output of a peak detection circuit and a normal rotation output to an input of the peak detection circuit. CONSTITUTION:A positive phase input of an amplifier 1 having two inputs, positive phase and antiphase, and a normal rotation output is connected to a signal source 4 through an input terminal 3. Then, the normal rotation output is connected to an input of a peak detection circuit 2. An output of the peak detection circuit 2 is connected to an antiphase input of the amplifier 1 while being done to an output terminal 5. Thus, by increasing the amplification factor of the amplifier 1, a differential voltage can be reduced between a peak voltage and an output voltage of an input signal.

3. 发明专利

JPH0289410A GAIN VARIABLE CIRCUIT 失效
公开(公告)号：JPH0289410A
公开(公告)日：1990-03-29
申请号：JP24156688
申请日：1988-09-27
申请人： NIPPON ELECTRIC ENG
发明人： HOTSUTA NORIYA
IPC分类号： H03G3/10
摘要： PURPOSE:To suppress the fluctuation at an output DC operating point by keeping a DC bias circuit of a differential amplifier of a gain variable circuit utilizing the differential amplifier constant. CONSTITUTION:An input signal is supplied to input terminals 122, 123 of a differential amplifier comprising 1st, 2nd npn transistors(TRs) 101, 102 and 1st and 2nd resistors 7, 8, and a signal from the amplifier whose voltage amplification factor is adjusted to AV2=gmRL is outputted from an output terminal 124, where gm is the mutual conductance of the TRs 101, 102 and RL is a resistance of the resistors 7, 8. Moreover, a control voltage is inputted to input terminals 120, 121 of a differential pair comprising both and both TRs 105, 106 and resistors 109, 110 to control a collector current Ic flowing to the TRs 101, 102 thereby varying the gain of the entire amplifier. In this case, the base DC bias level of the TRs 101, 102 is made equal to each other and a collector current I13 of the TR 101 is made equal to a collector current I14 of the TR 102 thereby suppressing the fluctuation at an output DC operating point.

4. 发明专利

JPH04144422A DISCRIMINATING/REPRODUCING CIRCUIT 失效
公开(公告)号：JPH04144422A
公开(公告)日：1992-05-18
申请号：JP26898990
申请日：1990-10-05
申请人： NIPPON ELECTRIC ENG
发明人： HOTSUTA NORIYA , SUZUKI FUMIO
IPC分类号： H03L7/08 , H04L25/49
摘要： PURPOSE:To obtain a stable data output capable of resisting noise by detecting a phase difference between an input data signal and an output data signal, converting the phase difference into a control voltage, automatically changing the phase of a clock signal, and synchronously reproducing the input data. CONSTITUTION:A voltage controlled oscillation circuit 5 forms a clock signal (t) having a phase corresponding to a DC control voltage (q), inputs the signal (t) to the clock terminal T of a D flip flop(FF) 2 and outputs the signal (t) also to a clock output terminal 7. The D-FF 2 receiving the clock signal (t) synchronously reproduces an input data signal (m) by the signal (t) and inputs the regenerative signal to a phase detecting circuit 3 again. When the phase of the input data signal (m) inputted to a data input terminal 1 coincides with that of the synchronously reproduced data signal (n) outputted from the D-FF 2, a stable state is set up and the reproduced data and the clock signal are respectively stably outputted to a data output terminal 6 and the output terminal 7.

5. 发明专利

JPH02186714A ANALOGUE SWITCH 失效
公开(公告)号：JPH02186714A
公开(公告)日：1990-07-23
申请号：JP621089
申请日：1989-01-13
申请人： NIPPON ELECTRIC ENG
发明人： HOTSUTA NORIYA
IPC分类号： H03K17/62
摘要： PURPOSE:To secure a wide input output voltage range and to control the fluctuation of a characteristics due to element fluctuation by permitting an analogue switch to form a full feedback amplifier circuit instead of the differential amplifier of an open loop. CONSTITUTION:The first full feedback amplifier circuit of the analogue switch consists of first and second transistors(Tr) 1, 2 and Tr 7 and resistors 8 and 9. A second full feedback amplifier circuit consists of Tr 3, 4 and Tr 7 and the resistors 8 and 9. Both amplifier circuits are controlled to get into an active state and an interruption state by the action of a differential couple consisting of Tr 5 and 6. The differential couple can be controlled by inputting control voltages from control terminals 22 and 23. Consequently, the input of the full feedback amplifier circuit which is in the active state by the control voltage is outputted to an output terminal 24. Consequently, the gain fluctuation of the feedback circuit can be secured and the wide input output voltage range can be secured.

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