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1. 发明专利

JP2004333249A Inspection circuit 审中-公开
标题翻译：检查电路
公开(公告)号：JP2004333249A
公开(公告)日：2004-11-25
申请号：JP2003128012
申请日：2003-05-06
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： IDE YUJI , MATSUMOTO ASAKO , NARUSE KAZUHIRO
IPC分类号： G01R31/3183 , G01R31/316 , H03M1/10
摘要： PROBLEM TO BE SOLVED: To solve problems that inspection costs for AD converters and DA converters increase as inspection time is lengthened when serially measuring the AD and DA converters, and that the price of an LSI tester rises to increase the inspection cost for the AD and DA converters even if the LSI tester is given a plurality of analog units allowing the AD and DA converters to be measured in parallel by the respective analog units.
SOLUTION: The DA converters 5 are measured in parallel by means of analog input signal generators 2 fewer than the AD converters 5 by using an analog input signal conversion circuit 4 capable of converting input signals outputted from the signal generators 2 into one or more signals and a digital signal selector circuit 7 capable of selecting/outputting, in an arbitrary order, output signals of the plurality of DA converters 5. The DA converters 15 also uses a conversion circuit 14 and a selector circuit 16.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了解决AD转换器和DA转换器的检测成本随着AD和DA转换器串行测量时检测时间的延长而增加的问题，LSI测试仪的价格上涨，从而增加了检测成本 AD和DA转换器，即使LSI测试仪被给予多个模拟单元，允许AD和DA转换器由相应的模拟单元并行测量。解决方案：DA转换器5通过使用能够将从信号发生器2输出的输入信号转换为一个或多个的模拟输入信号转换电路4，通过比AD转换器5少的模拟输入信号发生器2来并行测量更多信号和数字信号选择电路7能够以任意顺序选择/输出多个DA转换器5的输出信号.DA转换器15还使用转换电路14和选择器电路16。（C）2005，JPO＆NCIPI

2. 发明专利

JP2006105804A Defect determination method of semiconductor element, defect determination program and defect determining device 审中-公开
标题翻译：半导体元素的缺陷确定方法，缺陷确定程序和缺陷确定装置
公开(公告)号：JP2006105804A
公开(公告)日：2006-04-20
申请号：JP2004293470
申请日：2004-10-06
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MATSUMOTO ASAKO
IPC分类号： G01R31/26
摘要： PROBLEM TO BE SOLVED: To provide a defect determination method of a semiconductor element, capable of solving the problems, wherein when a signal value by which the frequency of a histogram becomes lower than the prescribed frequency Hs for the first time from the maximum frequency H0 is determined as a defect determining value, margin for element characteristic is not taken at all for the defect determination value, and thereby the yield is lowered by process fluctuation.
SOLUTION: A data group outputted from a plurality of semiconductor elements 1 is fetched and divided into a plurality of continuous output value sections by a histogram generating part 3, to thereby a histogram is generated. A normal distribution detecting part 4 successively searches for a distribution frequency, based on an output value section where the distribution frequency becomes maximum in the histogram, detects that output value sections, having the distribution frequency lower than a prescribed frequency continue as long as prescribed sections, and detects an output value section, sandwiched between continuous output value sections having the distribution frequency below the prescribed frequency as a normal distribution range. A defect determination value determining part 6 sets the defect determined value, based on the normal distribution range, and a determination part 6 determines the quality of the semiconductor element 1 based on the determined value.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供能够解决问题的半导体元件的缺陷确定方法，其中当直方图的频率从第一次变为低于规定频率Hs的信号值时最大频率H0被确定为缺陷确定值，对于缺陷确定值，根本不采用元件特性的余量，从而通过过程波动降低产量。解决方案：从多个半导体元件1输出的数据组通过直方图生成部分3取出并分割成多个连续的输出值部分，从而生成直方图。正态分布检测部分4基于在直方图中分布频率变为最大的输出值部分连续地搜索分布频率，检测分布频率低于规定频率的输出值部分是否长达规定的部分并且将具有低于预定频率的分布频率的连续输出值部分之间的输出值部分检测为正常分布范围。缺陷确定值确定部6基于正常分布范围来设置缺陷确定值，并且确定部6基于所确定的值来确定半导体元件1的质量。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2005017170A Inspection method of semiconductor integrated circuit 审中-公开
标题翻译：半导体集成电路检测方法
公开(公告)号：JP2005017170A
公开(公告)日：2005-01-20
申请号：JP2003184267
申请日：2003-06-27
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： IDE YUJI , MATSUMOTO ASAKO
IPC分类号： G01R31/316 , G01R31/28
摘要： PROBLEM TO BE SOLVED: To provide an inspection method capable of preventing a measuring circuit which is essentially a nondefective product from being wrongly determined to be a defective product owing to a leakage error, and executing excellently the inspection of a semiconductor integrated circuit in the state where an influence caused by the leakage error is removed to the utmost.
SOLUTION: The setting of parameters such as sampling frequency and the number of discrete Fourier transform execution data, is changed by a prescribed algorithm, and sampling and the discrete Fourier transform are executed repeatedly. The values of the sampling frequency and the number of the discrete Fourier transform execution data by which the leakage error becomes lower than a prescribed level are found, and the inspection of the semiconductor integrated circuit is performed by using the values.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种检查方法，其能够防止由于泄漏误差而将基本上无缺陷的产品的测量电路错误地确定为缺陷产品，并且执行非常好的半导体集成电路的检查在由泄漏误差引起的影响最大程度地消除的状态下。解决方案：通过规定的算法改变诸如采样频率和离散付里叶变换执行数据的参数的设置，并重复执行采样和离散傅里叶变换。找到采样频率和泄漏误差低于规定水平的离散付里叶变换执行数据的数值，并通过使用这些值来执行半导体集成电路的检查。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2004165611A Semiconductor device, inspection apparatus thereof, inspecting method of the device, and manufacturing method of the device 审中-公开
公开(公告)号：JP2004165611A
公开(公告)日：2004-06-10
申请号：JP2003144202
申请日：2003-05-22
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： AOYAMA TAKASHI , MATSUMOTO ASAKO , NARUSE KAZUHIRO
IPC分类号： G01R31/26 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To apply a desired voltage accurately to a semiconductor device, when inspecting the semiconductor device.
SOLUTION: A semiconductor device 1 has a pad 2 to be measured which is applied with a voltage from an external part for inspecting the semiconductor device 1 and has a dummy pad 12, connected with the measuring pad 2 via a conductor 11. An inspection apparatus for the semiconductors has a power supply 6, a voltage-applying probe needle 9 for applying the voltage of the power supply 6 to the pad 2, a voltmeter 7, an applied-voltage measuring probe-needle 10 for measuring the voltage applied to the pad 2 through the voltage meter 7, by connecting electrically the dummy pad 12 with the voltmeter 7, and a correction apparatus 8 for adjusting the application voltage by the power supply 6, based on the measured value of the voltmeter 7.
COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2005300371A Semiconductor inspection device and semiconductor inspection method 审中-公开
标题翻译：半导体检测器件和半导体检测方法
公开(公告)号：JP2005300371A
公开(公告)日：2005-10-27
申请号：JP2004117637
申请日：2004-04-13
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MATSUMOTO ASAKO
IPC分类号： G01R31/26
摘要： PROBLEM TO BE SOLVED: To solve the problems wherein, though an inspection condition of the second inspection part can be extracted, an inspection condition of the first inspection part cannot be extracted correctly, because the first inspection part and the second inspection part are processed by different CPU's in a semiconductor inspection device, and if the inspection condition is extracted at the measuring determination time in operation processing, a different inspection item condition is extracted as the inspection condition of the first inspection part.
SOLUTION: This device has an information synthesizing means wherein inspection setting information of the first inspection part has label information for discriminating an inspection object, and matching with label information carried by inspection setting information of the second inspection part is performed, and the inspection setting information of the first inspection processing and the inspection setting information of the second inspection processing are synthesized together as common information.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决的问题为了解决第一检查部和第二检查部能够提取第二检查部的检查条件，不能正确地提取第一检查部的检查条件的问题由半导体检查装置中的不同CPU进行处理，如果在运算处理中的测定判定时间提取检查条件，则提取不同的检查条件作为第一检查部的检查条件。解决方案：该装置具有信息合成装置，其中第一检查部件的检查设置信息具有用于识别检查对象的标签信息，并且执行与由第二检查部件的检查设置信息携带的标签信息的匹配，将第一检查处理的检查设定信息和第二检查处理的检查设定信息合成为共同信息。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2004184114A Inspection condition extraction program of semiconductor inspection program 审中-公开
公开(公告)号：JP2004184114A
公开(公告)日：2004-07-02
申请号：JP2002348254
申请日：2002-11-29
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MATSUMOTO ASAKO
IPC分类号： G01R31/26 , G01R31/28 , H01L21/82
摘要： PROBLEM TO BE SOLVED: To provide an inspection condition extraction program for simply forming an easily-comprehensible precise document of inspection conditions, concerning a semiconductor inspection program.
SOLUTION: Before reading (routines 22, 23) test conditions of the semiconductor inspection program 1 out of values set in the hardware of a semiconductor inspection device which executes the semiconductor inspection program 1, a subject hardware for extracting inspection conditions is selected (routine 21). Consequently, only set values of the selected hardware are file-outputted (routine 25).
COPYRIGHT: (C)2004,JPO&NCIPI

7. 发明专利

JP2001141793A SEMICONDUCTOR INSPECTION DEVICE AND SEMICONDUCTOR INSPECTION METHOD 失效
公开(公告)号：JP2001141793A
公开(公告)日：2001-05-25
申请号：JP32620699
申请日：1999-11-17
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUMOTO ASAKO , HIRASE JUNICHI , MATSUMOTO MASAHIKO
IPC分类号： G01R29/08 , G01R31/00 , G01R31/30
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor inspection device and a semiconductor inspection method securing the compatibility of both electromagnetic environment and normal operation in a semiconductor device to improve the quality of the semiconductor device, and not requiring a dedicated board and device for every semiconductor device for estimating the electromagnetic environment compatibility to reduce the development man-hours and the cost of the semiconductor device. SOLUTION: This general-purpose semiconductor inspection device has a configuration and a method for inspection for securing the normal operation and an electromagnetic interference property measurement device 12 and an electromagnetic interference property measurement method for inspection for securing an electromagnetic interference property. Thereby, the semiconductor inspection device can inspect the normal operation and the electromagnetic interference property of the semiconductor device 1 in the same one process when executing shipment inspection.

8. 发明专利

JPH05188921A CHARACTER GENERATOR 失效
公开(公告)号：JPH05188921A
公开(公告)日：1993-07-30
申请号：JP192792
申请日：1992-01-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUMOTO ASAKO , SEKI MICHIO
IPC分类号： G09G5/32 , G09G5/24 , G09G5/38
摘要： PURPOSE:To provide the character generator which effectively use a memory area assigned for moved characters by eliminating the load on memory writing software for moved character display. CONSTITUTION:A character signal generating circuit 3 generates a normal character signal 5 with character display data on normal characters which are outputted from a memory 1 and a character signal composing circuit 9 outputs it. A display start signal from a moved character display position circuit 6 and moved character kind character data from a ROM 19 are inputted to a moved character signal generating circuit 7 with externally inputted display position data 4 on the moved characters and a moved character signal 8 is generated there and outputted to the character signal composing circuit 9. The normal character signal 5 and moved character signal 8 are put together by the character signal composing circuit 9 and displayed on a screen. The normal characters and moved characters are distinctively generated, so the load on the software for writing to a memory 1 is reducible.

9. 发明专利

JP2002006007A SEMICONDUCTOR DEVICE AND INSPECTING METHOD THEREOF 失效
公开(公告)号：JP2002006007A
公开(公告)日：2002-01-09
申请号：JP2000190360
申请日：2000-06-26
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUMOTO ASAKO , HIRASE JUNICHI
IPC分类号： G01R31/28 , G01R31/3183 , G01R31/3185 , H01L21/822 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To perform operation inspection of a fast semiconductor device using a slow semiconductor inspecting device. SOLUTION: A semiconductor device 2 is mounted with a PLL circuit 21 and an RAM22, which is operated with a fast clock 24 provided by multiplying a slow clock 7 inputted from a semiconductor inspecting device 1. The operation result is housed in the RAM22 for operation at a low speed, with its data read and inspected. Instead of providing the PAM22, an instruction judging correctness of operation based on an output result 10 from a CPU6 may be housed in a test code memory 11, and an instruction for judging correctness of operation result at inspecting operation of the semiconductor device 2 is performed. Its result is outputted in synchronism with the slow clock 7 of the semiconductor inspecting device 1 for inspection with it. With this configuration, operation inspection for a semiconductor device operating fast is performed without using a fast semiconductor inspecting device.

10. 发明专利

JP2000339995A METHOD FOR VERIFICATION OF ROM INSPECTION PATTERN 失效
公开(公告)号：JP2000339995A
公开(公告)日：2000-12-08
申请号：JP14682099
申请日：1999-05-26
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUMOTO ASAKO
IPC分类号： G01R31/28 , G11C29/00 , G11C29/10
摘要： PROBLEM TO BE SOLVED: To accurately verify a ROM inspection pattern at an early stage in a short period of time at low costs. SOLUTION: On the verification of a ROM inspection pattern 1, the verification method includes a ROM information storage process 2 for storing a position where ROM information is written, a ROM information extraction process 3 for extracting ROM information from the ROM information position being stored by the ROM information storage process 2, a ROM information counting process 4 for counting the number of the ROM information having been extracted by the ROM information extraction process 3, and a result output process 5 for outputting a result having been counted by the ROM information counting process 4, and the ROM information having been extracted in the ROM information extraction process 3 is processed by the counting process 4, thus accurately carrying out verification with less number of man-hours.

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