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1. 发明专利

JP2000182921A APPARATUS AND METHOD FOR DETECTING PATTERN DISTORTION AND SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000182921A
公开(公告)日：2000-06-30
申请号：JP33771098
申请日：1998-11-27
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAOKA HIRONOBU , MORIIZUMI KOICHI
IPC分类号： H01L21/027 , G01B11/16 , G03F1/00 , G03F1/68 , G03F7/20 , G03F7/26
摘要： PROBLEM TO BE SOLVED: To detect pattern distortion on a finished pattern and perform higher precision pattern distortion error verification by comparing a polygonized finishing predicted pattern with an inspection reference pattern. SOLUTION: Vertex number reducing means 4 reduces the vertex number outputted from means 3 for turning a predicted pattern profile to a polygon of vertex number to one which can be treated by a common CAD software. A finishing predicted pattern data retaining part 5 retains polygon data with the vertex number thereof being reduced. Further, inspection reference pattern forming means 6 forms a reference pattern used for detecting pattern distortion not smaller than a permissible range from a design layout pattern data and an inspection reference pattern data retaining part 7 retains it. Pattern distortion detecting means 8 compares a finishing predicted pattern with a comparison reference pattern and extracts the part wherein pattern distortion not smaller than a permissible range occurs and a pattern distortion information retaining part 9 retains it.

2. 发明专利

JP2000020564A DEVICE FOR CORRECTING LAYOUT PATTERN DATA, METHOD FOR CORRECTING LAYOUT PATTERN DATA, MANUFACTURE OF SEMICONDUCTOR DEVICE USING THE METHOD, AND RECORDING MEDIUM HAVING RECORDED MANUFACTURING PROGRAM OF SEMICONDUCTOR DEVICE THEREON 失效
公开(公告)号：JP2000020564A
公开(公告)日：2000-01-21
申请号：JP18279398
申请日：1998-06-29
申请人： MITSUBISHI ELECTRIC CORP
发明人： ONO YUSAKU , MORIIZUMI KOICHI
IPC分类号： G03F1/36 , G03F1/68 , G03F1/70 , G03F7/20 , G06F17/50 , H01L21/82 , G03F1/08
摘要： PROBLEM TO BE SOLVED: To generate a highly accurate correction pattern capable of realizing highly accurate correction under conditions that a pattern is made finer and a circuit is highly integrated in a device for correcting layout pattern data of the circuit. SOLUTION: A side to be corrected is extracted from a layout pattern of the circuit (extracting a part a side to be corrected 42). A density calculation area centering around the center of the side to be corrected is set (a density calculation area setting part 44). The area density of a design pattern in the density calculation area is calculated (an area density calculating part 46). The size of the correction pattern to be superposed on the side to be corrected is calculated based on the area density (a correction pattern size calculating part 48). The correction pattern is generated according to a calculated value of the size (a correction pattern generating part 50) and a corrected layout pattern is generated by adding the correction pattern to a design layout pattern (a graphic calculating part 52).

3. 发明专利

JPH0456210A ELECTRON BEAM EXPOSURE DEVICE 失效
公开(公告)号：JPH0456210A
公开(公告)日：1992-02-24
申请号：JP16567790
申请日：1990-06-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI
IPC分类号： H01L21/027 , H01J37/09 , H01J37/302
摘要： PURPOSE:To obtain a device with which a highly precise exposing operation can be conducted using a plurality of block patterns formed on a second aperture by a method wherein a moving device, with which an electron beam sent from an electrooptical device is projected on the desired block pattern among a plurality of block patterns by moving a second aperture, is provided. CONSTITUTION:The title variable molding type electron beam exposing device is composed of a sample stage 20 which supports a sample 19, an electron gun 11, a first aperture 12 to be used for formation of an electron beam 15 emitted from the electron gun 11, electrooptical devices 13, 16 and 17 with which the electron beam formed by the first aperture 12 is deflected and also the deflected beam is focused on the sample 19 retained on a sample stage 20, a second aperture 14 on which a plurality of block patterns 14a to 14g are formed for reformation of the electron beam sent from the devices 13, 16 and 17, and a moving device 25 with which the electron beam, sent from the electrooptical devices 13, 16 and 17, are made to hit the desired block patterns among a plurality of block patterns 14a to 14g by moving the second aperture 14.

4. 发明专利

JPH038321A LITHOGRAPHY FOR MINUTE WIDTH PATTERN 失效
公开(公告)号：JPH038321A
公开(公告)日：1991-01-16
申请号：JP14477589
申请日：1989-06-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI , TAKEUCHI HIROSHI
IPC分类号： H01L21/027
摘要： PURPOSE:To reduce deformation of a pattern at a seam between shots and to form an accurate pattern by deviating a minute lithographic pattern at each predetermined amount longitudinally at each shot, and carrying out an electron beam lithography. CONSTITUTION:For electron beam lithography for a slender pattern having a minute width, the shape of the beam is formed in a basic pattern of a predetermined size. The longitudinal direction of the slender pattern is set to a x- direction, the length of the basic pattern in the x-direction component is xd, the position is deviated at each xd/n (n is integer number of 3 or more) in the x-direction at each shot, and electron beam lithography is carried out. For example, when the basic pattern has 0.4mum of width and xd=0.5mum of length in case of n=5, the lithographic process is carried out while the pattern is moved by 0.1mum in the x-direction at each shot.

5. 发明专利

JPH02280316A PATTERN FORMATION OF INTEGRATED CIRCUIT 失效
公开(公告)号：JPH02280316A
公开(公告)日：1990-11-16
申请号：JP10222389
申请日：1989-04-20
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI
IPC分类号： G03F7/26 , H01L21/027 , H01L21/3205 , H01L21/3213
摘要： PURPOSE:To omit a patterning process by depositing an intermediate layer consisting of the same material as a semiconductor substrate or a processing film and by carrying out patterning of the semiconductor substrate or the processing film and removal of a remaining part of the intermediate layer simultaneously. CONSTITUTION:A lower layer resist layer 3 is applied and formed on a processing film 2 which covers a semiconductor substrate 1, and an intermediate film 4 which consists of the same material as the processing film 2 is deposited on the lower layer resist layer 3. Thereafter, an upper side resist layer 5 is applied and formed on the intermediate layer 4. After the upper side resist layer 5 is patterned, the intermediate layer 4 is patterned using a remaining part 5a of the upper side resist layer 5 as a mask. Then, the lower side resist layer 3 is patterned using a remaining part 4a of the intermediate layer 4 as a mask and the remaining part 5a of the upper side resist layer 5 is removed at the same time. The processing film 2 is patterned using a remaining part 3a of the lower layer resist layer 3 as a mask and the remaining part 4a of the intermediate layer 4 is removed at the same time. A patterning process can be omitted in this way.

6. 发明专利

JPH0192072A JETTING DEVICE FOR PREPARING SUPERFINE FROZEN PARTICLE 失效
公开(公告)号：JPH0192072A
公开(公告)日：1989-04-11
申请号：JP25034287
申请日：1987-10-02
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI , HAMA MASAHARU , OMORI TOSHIAKI , FUKUMOTO HAYAAKI
IPC分类号： B24C5/00 , B08B7/00 , B24C1/00 , B24C11/00 , H01L21/304
摘要： PURPOSE:To prepare the uniform superfine frozen particles by installing a means which jets the vapor generated by the heating of the frozen liquid onto a treated substance and freezes the jetted vapor immediately before the treated substance. CONSTITUTION:A sealed container 2 is heated by a heater 3, and the frozen liquid in the container 2 is changed to the high pressure vapor. After each of the pressure and flow rate of the high pressure vapor is adjusted by a valve 4, the high pressure vapor is jetted at a high speed into a processing container 15 from a nozzle 7. The high pressure vapor jetted at a high speed is frozen at a high speed by the coolant (e.g., liquid nitrogen) 8 in a holding container 9 directly before the surface of a treated substance (e.g., wafer mask for preparing semiconductor device), and the superfine frozen particles (particle diameter of 10mum or less) are formed and jetted onto the surface of the treated substance 10, and the surface is blast-treated.

7. 发明专利

JPS6367746A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6367746A
公开(公告)日：1988-03-26
申请号：JP21311086
申请日：1986-09-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： ODA SHUICHI , HATANAKA MASAHIRO , KONO YOSHIO , SATO SHINICHI , MORIIZUMI KOICHI , YONEDA MASAHIRO
IPC分类号： H01L21/76 , H01L21/822 , H01L27/04
摘要： PURPOSE:To prevent a leakage current from flowing between groove-shaped capacitors and to realize a finely structured semiconductor device by a method wherein a device isolation region is constructed like a groove and the depth of this groove-shaped device isolation region is made greater than the depth of the groove-shaped capacitros. CONSTITUTION:A groove-shaped device isolation region 30 is provided between groove-shaped capacitors 2a and 2b on a semiconductor substrate 1. The depth of this groove-shaped device isolation region 30 is made deeper than the depth of the groove-shaped capacitors 2a and 2b. With this design, it is possible to separate the groove-shaped capacitors 2a and 2b electrically and to prevent a leakage current from flowing between the groove-shaped capacitors 2a and 2b. It is, therefore, possible to eliminate any electrical mutual interference between these capacitors. Through this constitution, the distance between the groove-shaped capacitors 2a and 2b can be made shorter to be able to contribute toward a finely structured semiconductor device.

8. 发明专利

JPS61260627A CIRCULAR PATTERN GENERATING DEVICE 失效
公开(公告)号：JPS61260627A
公开(公告)日：1986-11-18
申请号：JP10296785
申请日：1985-05-15
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI , TAKEUCHI SUSUMU
IPC分类号： H01L21/027 , H01L21/30
摘要： PURPOSE:To enable accurately the correction of an amount of exposure using the title device by a method wherein the device is provided with means, by which a circular pattern is made to automatically generate on the basis of data being held in the registers, and an exposure amount correcting means, by which the amount of exposure is made constant over the whole surface of the drawing region. CONSTITUTION:Data on a costheta and a sintheta, which are specified by a data specifier 19, are respectively read out from ROMs 20a and 20b and the data are respectively multiplied at high speed by radiuses (r) being held in registers 14 and 15 by high-speed multipliers 21a and 21b. The digital signals to be outputted from the high-speed multipliers 21a and 21b are converted into analog signals in a D/A converter 24, the analog signals are outputted as exposing spots 26 and a circular arc 27 is made to automatically generate. When the density of the exposing spots 26 is increased and the amount of exposure is increased, the correction of the amount of exposure is conducted as follows: firstly, the angle step value being set in a register (angle step) 12 is changed and a rough correction of the amount of exposure is conducted, then a microscopic correction of the amount of exposure is conducted by making a clock 16 being provided in an exposure amount corrector 22 change. By this way, the amount of exposure can be accurately corrected over the whole surface of the exposing region.

9. 发明专利

JPH08306608A FORMING METHOD OF CHARGED BEAM DRAWING DATA AND ITS FORMING EQUIPMENT 失效
公开(公告)号：JPH08306608A
公开(公告)日：1996-11-22
申请号：JP10576595
申请日：1995-04-28
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI , KAMIYAMA KINYA , SUGANO MAKOTO , TAOKA HIRONOBU , NAKAO HIROOMI , YAMAZAKI KAZUHIRO
IPC分类号： H01L21/027 , G06F17/50 , H01J37/302
摘要： PURPOSE: To high precisely form the drawing data of an electron beam drawing equipment at a high speed, from the design layout data of a semiconductor device, by employing an automatic isolation process of an important dimension pattern region wherein the important dimension pattern region necessitating high dimensional precision is previously isolated. CONSTITUTION: The isolation function of an important dimension (CD) region is designated as the pretreatment of the basic figure isolation function, in a drawing data forming equipment. Functions requiring for the CD region isolation function are to extract a region (CD region) conforming to the dimension (CD value) of a previously designated CD pattern, for each inputted polygon, and execute automatic extraction and isolation of a CD region for isolating the CD region. Before a basic figure is divided, the CD region necessitating high dimensional precision can be previously isolated, so that the CD region can be drawn by one shot electron beam. Hence highly precise pattern formation is possible.

10. 发明专利

JPH07122468A ELECTRON BEAM LITHOGRAPHY EQUIPMENT AND DRAWING METHOD USING THE SAME 失效
公开(公告)号：JPH07122468A
公开(公告)日：1995-05-12
申请号：JP27099293
申请日：1993-10-28
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIIZUMI KOICHI , KAMIYAMA KINYA , TAOKA HIRONOBU
IPC分类号： H01L21/027 , H01J37/20 , H01J37/317
摘要： PURPOSE:To set an arbitrary rotation angle between a beam forming equipment and a mounting equipment of a specimen to be drawn, by enabling relative movement of the beam forming equipment and the mounting equipment of a specimen to be drawn in rotation direction along an image drawing surface. CONSTITUTION:A Y-direction moving stage is arranged on an X-direction moving stage 28, and made possible to move on a pair of Y-direction rails 34, 34 laid on the X-direction moving stage 28. The X-direction moving stage 28 is formed so as to be able to move on a pair of X-direction rails 38, 38 arranged on a base 46. A specimen rotation stage 16 is arranged on the moving stages, and made possible to rotate by using a belt for rotating the stage. A beam forming equipment and the mounting equipment for a specimen to be drawn are relatively moved in the X-direction and the Y-direction along the image drawing surface of the specimen to be drawn and the rotation direction.

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