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1. 发明专利

JPH0821823B2 失效
公开(公告)号：JPH0821823B2
公开(公告)日：1996-03-04
申请号：JP7633688
申请日：1988-03-31
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKASUKA KOICHI , KATSUYAMA TAKASHI , TAMAGAWA NOBUYUKI
IPC分类号： H03F1/26 , H03G11/00 , H03G11/02

2. 发明专利

JPH01251910A SIGNAL SUPPRESSION CIRCUIT 失效
公开(公告)号：JPH01251910A
公开(公告)日：1989-10-06
申请号：JP7633688
申请日：1988-03-31
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKASUKA KOICHI , KATSUYAMA TAKASHI , TAMAGAWA NOBUYUKI
IPC分类号： H03F1/26 , H03G11/00 , H03G11/02
摘要： PURPOSE:To make only weak noises removable by suppressing signals of an arbitrarily specified voltage range in such a way that the part of input signals corresponding to the arbitrarily specified voltage range is fetched and converted into an electric current and the current is fed back to the emitter of a transistor. CONSTITUTION:Video signals inputted to an input terminal 36 are respectively inputted to the base of a transistor 30 and limiter circuit 32. The video signals inputted to the limiter circuit 32 are fetched as signals in an arbitrarily specified voltage range and converted into an electric current at a voltage/current conversion circuit 33. The electric current is fed back to the emitter of the transistor 30. Therefore, the part of output signals corresponding to the arbitrarily specified voltage range can be suppressed by utilizing the variation of the voltage across the base and emitter of the transistor 30. Thus only weak noise components can be removed.

3. 发明专利

JPH09233497A VIDEO SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPH09233497A
公开(公告)日：1997-09-05
申请号：JP4011296
申请日：1996-02-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KURIMOTO HIDEHIKO , OHARA JUNJI , TAMAGAWA NOBUYUKI
IPC分类号： H04N9/83
摘要： PROBLEM TO BE SOLVED: To make an integrated circuit small in area and reduced in cost by adding a multiplier circuit and a 2nd delay circuit to a conventional circuit configuration thereby reducing number of bits of the integrated circuit through the simple improvement of the circuit configuration. SOLUTION: This processing circuit is provided with 1st and 2nd delay circuits 2, 6 both receiving a low frequency conversion chrominance carrier signal as an input signal, and the output of the 1st delay circuit 2 is given to a 1st balanced modulation circuit 5 via a 1st buffer 3 and a 1st filter 4. Furthermore, the output of the 2nd delay circuit 6 is given to a 2nd balanced modulation circuit 9 via a 2nd buffer 7 and a 2nd filter 8. A subtractor 10 or the like for subtracting either of outputs of the 1st and 2nd balanced modulation circuits 5, 9 from the other output and outputting the result is provided, and a clock input of the 1st delay circuit 2 is connected to a clock input of the 2nd delay circuit 6 via a multiplier circuit 12. Through the constitution above, number of bits of the delay circuits is reduced by using the clock signal frequency.

4. 发明专利

JPH03117007A AMPLIFIER CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH03117007A
公开(公告)日：1991-05-17
申请号：JP25390589
申请日：1989-09-28
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAMAGAWA NOBUYUKI , HAYASHI TAKAHARU , AKIYAMA KAZUO
IPC分类号： H03F3/187
摘要： PURPOSE:To realize an amplifier circuit, for which over shoot or ringing is hardly generated even when the pulse of sharp rising and falling is amplified, by serially connecting a resistor between the emitter of a transistor and a signal source. CONSTITUTION:Between the emitter of the transistor and a signal source 6, a resistor 5 is serially connected in order to change a frequency property, namely, in order to prevent the over shoot or the ringing from being generated when a signal including a high frequency component is amplified. Thus, the amplifier circuit can be realized so that the over shoot or the ringing can not be generated even when the pulse of sharp rising and falling is amplified.

5. 发明专利

JPS6196876A Gain controller of video camera 失效
标题翻译：视频摄像机增益控制器
公开(公告)号：JPS6196876A
公开(公告)日：1986-05-15
申请号：JP21765984
申请日：1984-10-17
申请人： Matsushita Electric Ind Co Ltd
发明人： TAMAGAWA NOBUYUKI
IPC分类号： H04N5/14 , H03G3/20
摘要： PURPOSE: To eliminate sinking of a low brought part and to improve a gradation characteristic and repeatability of a color in an automatic gain controller for fixing an output signal independent of an input signal not by executing the automatical gain control but fixing to a certain gain when the input signal exceeds the prescribed level.
CONSTITUTION: Normally, an amplifier 2 modulates an output (VOUT) of a gain control amplifier 1, which is modulated by a WBLK pulse, and a detector 3 detects it as a DC signal, while an integrator 4 integrates it to drive a gain controller 5. Here a so-called gain control system is applied which controls the gain control amplifier 1 and obtains the certain output (VOUT) independent of an input (VIN). When the input (VIN) exceeding the prescribed level is obtained, the gain controller 5 fixes the gain of the gain control amplifier 1. Namely, when the input exceeds the prescribed level, the automatic gain control system is switched to a fixed gain control system. Thus the output (VOUT) in proportion to the input (VIN) can be obtained.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：为了消除低带入部分的沉降，并且改善自动增益控制器中的颜色的灰度特性和重复性，用于固定独立于输入信号的输出信号，而不是通过执行自动增益控制而固定一定的增益，输入信号超过规定的电平。构成：通常，放大器2调制由WBLK脉冲调制的增益控制放大器1的输出（VOUT），并且检测器3将其检测为DC信号，而积分器4将其积分以驱动增益控制器这里，应用所谓的增益控制系统，其控制增益控制放大器1并获得与输入（VIN）无关的特定输出（VOUT）。当获得超过规定电平的输入（VIN）时，增益控制器5固定增益控制放大器1的增益。即，当输入超过规定电平时，自动增益控制系统切换到固定增益控制系统。因此，可以获得与输入（VIN）成比例的输出（VOUT）。

6. 发明专利

JPH0365891A PHASE CONTROLLER 失效
公开(公告)号：JPH0365891A
公开(公告)日：1991-03-20
申请号：JP20157689
申请日：1989-08-03
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKASUKA KOICHI , TAMAGAWA NOBUYUKI , KATSUYAMA TAKASHI
IPC分类号： H04N9/455 , H04N9/45
摘要： PURPOSE:To control phase correctly even when the phase of AC(RY) is inverted for each 1H as the PAL standards by providing an inverting means inverting a phase of a subcarrier (referred to as SC(B-Y)) for color difference signal (B-Y), an adder means, a phase shift means and an amplitude control means. CONSTITUTION:A phase inverting means 23 inverting the phase of SC(B-Y) inputted from an input pin 21, a 1st adder means 24 adding an output from the phase inversion means 23 and the SC(R-Y) inputted from an input pin 22, a phase shift means 25 shifting the phase of the output from the 1st adder means 24 by theta, an amplitude control means 26 controlling the amplitude of the output from the phase shift means 25 and a 2nd adder means 27 adding the output from the amplitude control means 26 to the output of the 1st adder means 24 are provided to the controller. Thus, the phase is shifted and controlled correctly even when the phase of AC(R-Y) is inverted for each 1H as the PAL standards.

7. 发明专利

JPH02277384A LUMINANCE SIGNAL PROCESSING CIRCUIT FOR MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPH02277384A
公开(公告)日：1990-11-13
申请号：JP9822689
申请日：1989-04-18
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： AKIYAMA KAZUO , HAYASHI TAKAHARU , TAMAGAWA NOBUYUKI
IPC分类号： H04N5/922 , G11B20/02 , H04N5/92
摘要： PURPOSE:To prevent the malfunction of a synchronizing separator circuit occurring by locating a high-pass filter circuit and a limiter circuit of detail enhanser system at the rear stage of a clamping circuit, and applying the output signal of the clamping circuit on the synchronizing separator circuit via a second low-pass filter circuit. CONSTITUTION:A first LPF circuit 4 is connected to an adder circuit 6 for DE, and an HPF circuit 5 for DE connected to the clamping circuit 8 is connected to the adder circuit 8, and also, the clamping circuit 8 is connected to the synchronizing separator circuit 16. At such a case, since the HPF circuit 5 and the limiter circuit 7 of DE system are located at the rear stage side of the clamping circuit 8 and also, the output signal of the clamping circuit 8 is applied on the synchronizing separator circuit 16 via the second LPF circuit 9, it is possible to eliminate the danger of the malfunction of the synchronizing separator circuit 16 due to a noise.

8. 发明专利

JPS6196810A Logarithmic converting circuit 失效
标题翻译：对数转换电路
公开(公告)号：JPS6196810A
公开(公告)日：1986-05-15
申请号：JP21764084
申请日：1984-10-17
申请人： Matsushita Electric Ind Co Ltd
发明人： TAMAGAWA NOBUYUKI
IPC分类号： H03G11/08 , H04N9/64
摘要： PURPOSE: To attain sufficient vertical color error correction even when the level of an input signal is fluctuated by adding a limiter transistor (TR) whose collector and emitter are connected respectively to a collector and an emitter of an input TR of a logarithmic converting circuit and whose base is given with a comparison reference voltage of a differential amplifier.
CONSTITUTION: An input signal fed to an input terminal 1 is converted into a current from a voltage at the differential amplifier comprising TRs 5, 6 and resistors 7, 8 constituting a current source, TRs 2, 3 and a resistor 4 and subjected to logarithmic conversion at a diode 15. When a voltage fed to the input terminal is a comparison reference voltage VREF or below, that is, lower than the base potential of the TR3, since a TR18 having the same base potential as that of the TR3 exists, a signal among signals inputted to the input terminal 1 below a reference voltage VREF, that is, the base potential of the TR3 is clipped at all.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：即使当输入信号的电平波动时，通过将集电极和发射极分别连接到对数转换电路的输入TR的集电极和发射极的限幅晶体管（TR）来获得足够的垂直颜色误差校正，以及其基准用差分放大器的比较参考电压给出。构成：馈送到输入端子1的输入信号从构成电流源TR 2,3和电阻器4的TR5,6和电阻器7,8的差分放大器的电压转换为电流，并经过对数在馈送到输入端子的电压为比较参考电压VREF或低于TR3的基极电位时，由于存在与TR3具有相同基极电位的TR18，在参考电压VREF之下输入到输入端子1的信号，即TR3的基极电位全部被削波。

9. 发明专利

JPH11205814A COMB FILTER DEVICE 失效
公开(公告)号：JPH11205814A
公开(公告)日：1999-07-30
申请号：JP301798
申请日：1998-01-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OKAMOTO RIYUUCHIN , TAMAGAWA NOBUYUKI , KURIMOTO HIDEHIKO , OZASA MASAYUKI , MICHIMASA SHIRO
IPC分类号： H04N9/78 , H03H17/02
摘要： PROBLEM TO BE SOLVED: To obtain a satisfactory comb characteristic, even if an offset voltage is generated between delay circuits and to easily make LSI by controlling the offset voltage of a second delay amplifier with a recorder output and controlling the gain of a variable gain amplifier with a detector output. SOLUTION: A circuit in which the input of a switch 4 is set to the reference signal of an amplitude level, capable of realizing a desired comb characteristic during a blanking period, then the offset voltage difference between first and second delay circuits 8 and 9 is recorded in a recorder 17 and which negatively feeds back to the second delay amplifier 14 is provided and the offset voltage difference of the first and second delay circuits 8 and 9 is corrected. A circuit, in which the input of the switch 4 is charged over to the test signal which is able to realize the desired comb characteristic, a detector X19 amplifies/integrates the signal amplitude level of the output of a subtracter 15, so that it is matched with the reference signal and which negatively feeds back to a variable gain amplifier 10 is provided and the gain difference of the first and second delay circuits 8 and 9 is suppressed. When finally the input of the switch 4 is changed over to a video signal, since a gain difference does not exist between the delay circuits, a satisfactory comb characteristic can be obtained.

10. 发明专利

JPH06253265A NONLINEAR SIGNAL PROCESSING UNIT AND ITS CIRCUIT 失效
公开(公告)号：JPH06253265A
公开(公告)日：1994-09-09
申请号：JP3958793
申请日：1993-03-01
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OHARA JUNJI , TAMAGAWA NOBUYUKI , SAKA YOSHIMITSU
IPC分类号： G11B20/02 , G11B20/06 , H04N5/922 , H04N5/93
摘要： PURPOSE:To obtain a nonlinear processing unit and its circuit by which reproducibility of detail of a reproduced picture is enhanced by compensating a characteristic of a large signal giving a visually higher effect to a signal subjected to nonlinear signal processing compressing a signal band at video recording of a VTR. CONSTITUTION:In order to compress and reproduce a signal amplified at video recording, a high pass filter 1, a limiter 2, a 1st attenuator 3 and an adder/ subtractor 4 are added to a system. Then a switch 7 is closed only to a signal receiving nonlinear signal processing to compress a signal band at video recording, a band pass filter 5 is used to extract the compressed band and a 2nd attenuator 6 controls the amplified quantity and the adder/subtractor 4 implements addition processing to make compensation.

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