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1. 发明专利

JP2008117845A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008117845A
公开(公告)日：2008-05-22
申请号：JP2006297711
申请日：2006-11-01
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： OSUGA TSUTOMU , SATO YOSHIHIRO , OKAWA HIROSHI , KUDO CHIAKI , OGAWA HISASHI
IPC分类号： H01L21/8234 , H01L21/28 , H01L21/76 , H01L27/08 , H01L27/088 , H01L29/423 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having both a part formed on an active region on a gate electrode and a part formed on an element isolation region fully silicided, and its manufacturing method.
SOLUTION: The semiconductor device includes the element isolation region 15 formed on a semiconductor substrate 10, the active region 10A formed in a region surrounded by the isolation region 15 of the substrate 10, a first fully silicided gate electrode 27A formed on the active region 10A, and a second fully silicided gate electrode 27B formed on the isolation region 15. The upper surface of the element isolation region 15 is lower than the upper surface of the active region 10A. The upper surface of the first electrode 27A is equal in height to the upper surface of the second electrode 27B.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有形成在栅电极上的有源区上的部分和形成在完全硅化的元件隔离区上的部分的半导体器件及其制造方法。解决方案：半导体器件包括形成在半导体衬底10上的元件隔离区域15，形成在由衬底10的隔离区域15包围的区域中的有源区域10A，形成在衬底10上的第一完全硅化栅极电极27A 有源区域10A和形成在隔离区域15上的第二完全硅化栅电极27B。元件隔离区域15的上表面比有源区域10A的上表面低。第一电极27A的上表面与第二电极27B的上表面高度相等。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2008103613A Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008103613A
公开(公告)日：2008-05-01
申请号：JP2006286253
申请日：2006-10-20
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SATO YOSHIHIRO
IPC分类号： H01L21/8234 , H01L21/28 , H01L21/3205 , H01L23/52 , H01L27/088 , H01L29/423 , H01L29/49
CPC分类号： H01L21/823481 , H01L21/28123 , H01L21/823437 , H01L21/823475 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of fully siliciding a gate electrode with a higher reliability, and to provide a manufacturing method thereof.
SOLUTION: An element separation region 12 having an upper surface higher than an active region 11 is formed on a semiconductor substrate 10, and then, a film 14 for forming a gate interconnection and a film 15 for forming a protective film are formed on the active region 11 and the element separation region 12. Then, the film 15 for forming the protective film is ground and made to be flat. Furthermore, patterning is performed to form a gate electrode part 14a, a gate interconnection part 14b, and protective films 15a, 15b. Then, side walls 17 are formed.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供能够以更高可靠性完全硅化栅电极的半导体器件，并提供其制造方法。解决方案：在半导体衬底10上形成具有高于有源区11的上表面的元件分离区12，然后形成用于形成栅互连的膜14和用于形成保护膜的膜15 在有源区域11和元件分离区域12上。然后，将形成保护膜的膜15研磨并使其平坦。此外，进行图案化以形成栅电极部分14a，栅极互连部分14b和保护膜15a，15b。然后，形成侧壁17。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2008066378A Semiconductor device, and method for manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008066378A
公开(公告)日：2008-03-21
申请号：JP2006240279
申请日：2006-09-05
申请人： Matsushita Electric Ind Co Ltd , Renesas Technology Corp , 松下電器産業株式会社 , 株式会社ルネサステクノロジ
发明人： YAMAMOTO KAZUHIKO , ISHINAGA ATSUSHI , SATO YOSHIHIRO , INOUE MASAO , SAKASHITA SHINSUKE , YOSHIGAMI JIRO
IPC分类号： H01L29/78 , H01L21/28 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/423 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To actualize a semiconductor device including a full-silicide gate electrode having a stable work function value and a threshold value.
SOLUTION: The semiconductor device is provided with a gate insulating film 15a formed on a semiconductor substrate and a gate electrode 23 formed on the gate insulating film. The gate electrode 23 is a full silicide gate electrode including a metal silicide film formed by laminating a plurality of crystal grain layers.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：实现包括具有稳定的功函数值和阈值的全硅化物栅电极的半导体器件。解决方案：半导体器件设置有形成在半导体衬底上的栅极绝缘膜15a和形成在栅极绝缘膜上的栅电极23。栅电极23是包括通过层叠多个晶粒层而形成的金属硅化物膜的全硅化物栅电极。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2007287793A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2007287793A
公开(公告)日：2007-11-01
申请号：JP2006111001
申请日：2006-04-13
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SATO YOSHIHIRO
IPC分类号： H01L21/8238 , H01L21/28 , H01L21/8234 , H01L27/088 , H01L27/092 , H01L29/423 , H01L29/49 , H01L29/78
CPC分类号： H01L21/823835 , H01L21/28097 , H01L29/4975 , H01L29/66545 , H01L29/6659 , H01L29/7833
摘要： PROBLEM TO BE SOLVED: To realize a manufacturing method of a semiconductor device capable of highly accurately forming a fully silicidized gate electrode having a predetermined silicide composition.
SOLUTION: In the manufacturing method of the semiconductor device, a first gate electrode forming section 20A consisting of a first silicon film 15a, a second silicon film 18a, and a second protective film 19a is formed on a first region 10A of a semiconductor substrate 10; and a second gate electrode forming section 20B consisting of a first silicon film 15b, a first protective film 16b, a second silicon film 18b, and a second protective film 19b is formed on a second region 10B. Then a first fully silicidized gate electrode 27A is formed of the first gate electrode forming section 20A, and a second fully silicidized gate electrode 27B is formed of the second gate electrode forming section 20B.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：实现能够高精度地形成具有预定的硅化物组成的完全硅化的栅电极的半导体器件的制造方法。解决方案：在半导体器件的制造方法中，由第一硅膜15a，第二硅膜18a和第二保护膜19a组成的第一栅电极形成部分20A形成在第一区域10A上半导体衬底10; 并且在第二区域10B上形成由第一硅膜15b，第一保护膜16b，第二硅膜18b和第二保护膜19b组成的第二栅电极形成部分20B。然后由第一栅电极形成部分20A形成第一完全硅化的栅电极27A，并且由第二栅电极形成部分20B形成第二完全硅化的栅电极27B。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2000186932A ANGULAR VELOCITY SENSOR 失效
公开(公告)号：JP2000186932A
公开(公告)日：2000-07-04
申请号：JP36453198
申请日：1998-12-22
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SHIOZU MASASHI , MATSUMURA TOSHIAKI , SATO YOSHIHIRO
IPC分类号： G01C19/56 , G01C19/5614 , G01C19/5628 , G01P9/04
摘要： PROBLEM TO BE SOLVED: To provide an angular velocity sensor which enables miniaturization of a navigation system, without requiring an acceleration sensor in addition to the angular velocity sensor. SOLUTION: This angular velocity sensor has a pair of detection piezoelectric elements 14a for angular velocity detection disposed on one surfaces of a pair of detection parts 12 in a turning fork part 11, and a pair of detection piezoelectric elements 14b for acceleration detection disposed on the other surfaces of the detection parts 12. The polarization directions of the piezoelectric elements 14a for angular velocity detection are set different from each other, and polarization directions of the piezoelectric elements 14b for acceleration detection are set identical to each other. Thereby, the angular velocity sensor can detect not only the angular velocity but also the acceleration.

6. 发明专利

JPH09280981A LOAD SENSOR 失效
公开(公告)号：JPH09280981A
公开(公告)日：1997-10-31
申请号：JP8618596
申请日：1996-04-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SATO YOSHIHIRO , OMOTO KATSUHIKO , MIYAMOTO AKIRA , OTOBE TOSHIRO , ARAKAWA YOSHIHIRO
IPC分类号： G01L1/22 , G01L5/16 , G06F3/033
摘要： PROBLEM TO BE SOLVED: To make it possible to regulate the output voltage even after assembling by a constitution to have a fifth terminal by dividing any of first, second, third and fourth terminals. SOLUTION: First and second strain detecting means 24, 25 made of strain gages for sensing X- and Y-directions are provided on the upper surface of the board 21 of a sensor unit. The means 24 has a first terminal 26 electrically connected to the mens 24 via first resistance means 27. The mens 25 has a second terminal 28 electrically connected via second resistance means 29. Third and fourth terminals 30, 41 are electrically connected to the means 25, 27. A fifth terminal 32 is provided at the means 29. The terminal 32 is used so that the resistance value of the means 27 becomes equal to that of the means 24 to trim the means 27. Similarly, the terminal 32 is used so that the resistance value of the means 29 becomes equal to that of the means 25 to trim the means 29.

7. 发明专利

JPH07192417A OPTICAL SENSOR 失效
公开(公告)号：JPH07192417A
公开(公告)日：1995-07-28
申请号：JP33584993
申请日：1993-12-28
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KAMEI MAKOTO , YAMAGUCHI TAKESHI , SATO YOSHIHIRO
IPC分类号： G11B21/10
摘要： PURPOSE:To easily adjust positions in an optical sensor used to detect the position of a track 0 in a floppy disk drive. CONSTITUTION:A projecting part 3 and a notch 4 for positional adjustment are provided on a sensor housing 1. Thus, no shifts in a sensor element at the time of adjustment are generated, positioning is accurately performed and fine adjustment is made easy.

8. 发明专利

JPH01100989A STRUCTURE OF CERAMIC SUBSTRATE 失效
公开(公告)号：JPH01100989A
公开(公告)日：1989-04-19
申请号：JP25741287
申请日：1987-10-14
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SATO YOSHIHIRO , CHINOMI NORIMITSU , SHIMOMURA MASAYA
IPC分类号： H05K1/02 , H05K1/03 , H05K3/00
摘要： PURPOSE:To eliminate the influence of errors of break trenches and through holes, avoid the concentration of thermal stress, and prevent the cracks of ceramic substrate, by arranging circular through holes at crossing points of the break trenches of the ceramic substrate provided with the break trenches. CONSTITUTION:Circular through holes 3 are arranged at crossing points of break trenches of a ceramic substrate 2. Even if the trenches 1 and the circular holes 3 have errors, edges of sharp angle do not generate. The connection point of the break trench 1 and the through hole 3 is right angle, and concentration of thermal stress to the brake trench at the time of firing is eliminated.

9. 发明专利

JP2008140853A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008140853A
公开(公告)日：2008-06-19
申请号：JP2006323669
申请日：2006-11-30
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SATO YOSHIHIRO , OGAWA HISASHI
IPC分类号： H01L21/8234 , H01L21/28 , H01L21/3205 , H01L21/8238 , H01L21/8244 , H01L23/52 , H01L27/088 , H01L27/092 , H01L27/11 , H01L29/423 , H01L29/49
CPC分类号： H01L21/823835 , H01L21/28097 , H01L21/82385 , H01L21/823864 , H01L21/823871 , H01L29/4975 , H01L29/66545 , H01L29/7833
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having small gate wiring resistance in an MISFET having a full silicide gate electrode. SOLUTION: The semiconductor device includes a p-type MIS transistor formed on a first active region 13A surrounded by an element isolation region 11 in a semiconductor substrate 10. The semiconductor device further includes: a first gate insulating film formed on the first active region 13A; and a first full silicide gate pattern 24a formed over the first active region 13A through the first gate insulating film, and consisting of a first full silicide gate electrode 24A on the first active region 13A and a first full silicide gate wiring 24E on the element isolation region 11. The first full silicide gate electrode 24A has a thickness thinner than the thickness of the first full silicide gate wiring 24E. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种在具有全硅化物栅电极的MISFET中具有小栅极布线电阻的半导体器件。解决方案：半导体器件包括形成在由半导体衬底10中的元件隔离区域11围绕的第一有源区域13A上的p型MIS晶体管。半导体器件还包括：形成在第一栅极绝缘膜上的第一栅极绝缘膜活性区域13A; 以及通过第一栅极绝缘膜形成在第一有源区域13A上的第一全硅化物栅极图案24a，并且由第一有源区域13A上的第一全硅化物栅电极24A和元件隔离上的第一全硅化物栅极布线24E 第一全硅化物栅电极24A的厚度比第一全硅化物栅极配线24E的厚度薄。版权所有（C）2008，JPO＆INPIT

10. 发明专利

JP2007150244A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007150244A
公开(公告)日：2007-06-14
申请号：JP2006203012
申请日：2006-07-26
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SATO YOSHIHIRO , OGAWA HISASHI
IPC分类号： H01L23/522 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To achieve a semiconductor device that a resistance of wiring in a gate electrode is small and a resistance of contact between the gate electrode and a shared contact plug is small. SOLUTION: The semiconductor device includes fully silicified, first gate wiring 19A formed on a semiconductor substrate 10, a first sidewall 21A formed on the side of the first gate wiring 19A, and an impurity diffused layer 14B formed in an active area 12. On an inter-layer insulating film 35 formed in the semiconductor substrate 10, a shared contact plug 24 connected with the first gate wiring 19A and impurity diffused layer 14B is formed. The first gate wiring 19A has a protrusion 20A protruded from the first sidewall 21A in its portion connected with the shared contact plug 24. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了实现栅电极中的布线电阻小并且栅电极和共用接触插塞之间的接触电阻小的半导体器件。解决方案：半导体器件包括形成在半导体衬底10上的全硅化的第一栅极布线19A，形成在第一栅极布线19A侧的第一侧壁21A和形成在有源区域12中的杂质扩散层14B 在半导体衬底10中形成的层间绝缘膜35上，形成与第一栅极布线19A和杂质扩散层14B连接的共用接触插塞24。第一栅极布线19A具有从与共享接触插塞24连接的部分中的第一侧壁21A突出的突起20A。（C）2007，JPO＆INPIT

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