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    • 3. 发明专利
    • MAGNETICALLY RECORDED SIGNAL REPRODUCING CIRCUIT
    • JP2000030208A
    • 2000-01-28
    • JP19483698
    • 1998-07-09
    • MATSUSHITA ELECTRIC IND CO LTD
    • KANO IKUO
    • G11B5/09
    • PROBLEM TO BE SOLVED: To provide a magnetically recorded signal reproducing circuit which is enhanced in latitude for setting the cut-off frequency of a filter. SOLUTION: This circuit is provided with two low-pass filters 3, 9 (LPF) differing from each other in cut-off frequency used for eliminating saddle noise generated in lower frequency components among plural frequency components, a differentiator 2 for creating a signal of which a peak point of a head reproducing signal containing different high frequency components is converted to zero- crossing, two comparators 4, 10 for digitizing each output signal of the two LPFs 3, 9, and a latching circuit 7 which generates a latch timing for eliminating saddle noise from the outputs of the two comparators. This configuration can surely improve the noise-proofing property of the drooping part and increases the latitude for setting range of LPF constant. This face can extend the range of tolerance for heads and media and improve the reading margin and error rate of the reproducing circuit.
    • 5. 发明专利
    • MAGNETIC RECORDER
    • JPH07147009A
    • 1995-06-06
    • JP3971594
    • 1994-03-10
    • MATSUSHITA ELECTRIC IND CO LTD
    • KANO IKUO
    • G11B5/09G11B5/465
    • PURPOSE:To provide the magnetic recorder constituted to degauss magnetic heads after the end of a writing operation and to easily execute circuit correction without increasing externally mounting parts by adding a circuit to a logic circuit. CONSTITUTION:This magnetic recorder is provided with a delay circuit 5 for forming a writing end delay signal for delaying writing for a specified period of time after the end of the writing time form a writing permissible signal. The recorder is provided with a degaussing writing data forming circuit 6 for forming degaussing writing data of gradually narrow intervals in accordance with the writing end delay signal. A writing/reading out IC 3 attenuates the currents to be passed to magnetic heads 1, 2 from the point where the spacing of the writing data is narrowed from the rising time of the magnetic head currents in accordance with the degaussing writing data, thereby degaussing the magnetic heads 1, 2.
    • 7. 发明专利
    • FLOPPY DISK DEVICE
    • JPH09231668A
    • 1997-09-05
    • JP3337396
    • 1996-02-21
    • MATSUSHITA ELECTRIC IND CO LTD
    • KANO IKUO
    • G11B20/10G11B19/06G11B27/10
    • PROBLEM TO BE SOLVED: To interrupt the generation of reading error due to the skipping of read-out of an index signal at the time of reading from media with a read-only format in which the number of bytes of a preamplifier is reduced. SOLUTION: The device is provided with a delay circuit 1 outputting a delayed inside index signal Sb formed by delaying the inside index signal Sa and a selector 2 selecting the inside index signal Sa supplied to an input terminal A or the delayed inside index signal Sb inputted to an input terminal B by a write protect signal Sc supplied to a selection terminal S and outputting the selected one from an output terminal Y as an outside index signal Sd. The skipping of read-out at the front edge of the index signal in the write inhibiting state is quickly processed, and in the write permitting state, the index signal is generated near the reference position. The skipping of read-out at the front edge of index by an FDC(floppy disk controller) is processed quickly by a specific time, then the time of skipping read-out is made not to overlap with a sector 1 for only this specific time.
    • 9. 发明专利
    • FLOPPY DISK DEVICE
    • JPH03268018A
    • 1991-11-28
    • JP6774890
    • 1990-03-16
    • MATSUSHITA ELECTRIC IND CO LTD
    • KANO IKUO
    • G06F3/06
    • PURPOSE:To decrease the number of kinds of a large scale integrated circuit (LSI) of a floppy disk device (FDD) by selecting an output of a logic circuit in the LSI by a selector in accordance with a level of a select signal, and executing an output and an input of an interface signal. CONSTITUTION:An interface signal inputted to an LSI 1 from an interface connector passes through buffers 6 - 11 and a logic circuit by a select signal of the inside of the LSI 1 and is selected and inputted by selectors 26 - 29, and the interface signal inputted to the logic circuit of the inside of the LSI 1 is extracted by the selectors 25 - 29 by the select signal and outputted to the interface connector through the buffers 6 - 11 in the LSI 1. Accordingly, it is possible to cope with a user of various interface array specifications, and it is possible to cope with various kinds of FDDs by one kind of LSI. In such a way, the kind of various printed boards, and the kind of LSI adopted for the FDD can be curtailed.
    • 10. 发明专利
    • FLOPPY DISK DEVICE
    • JPH03263661A
    • 1991-11-25
    • JP6143190
    • 1990-03-13
    • MATSUSHITA ELECTRIC IND CO LTD
    • ITSUKAICHI KIWAMUNOZOKIDO HIROYUKIKANO IKUO
    • G11B21/08
    • PURPOSE:To securely detect a track phi at the time of turning on a power source by performing forcible seeking toward the inner circumference, making after ward the seeking toward the outer circumference when a sensor flag is being detected by a track phi sensor inside the device and detecting the track phi accordingly. CONSTITUTION:When a step signal 7a is inputted by ignoring a signal from a host side in the outer circumferential direction at the time of detecting the track phi, the seeking is forcibly made toward the inner circumferential side until a position where the track phi is not in existence upon receipt of an output showing that the track phi sensor 6 is situated nearer to the outer circumference than a track 1, and after a given period of time (settling time), the seeking is made in the outer circumferential direction to detect the regular track phi. That is, a TZP signal 7e for forcibly making the inner part seeking and a C-phase signal 7f for outputting only C-phase in excitation phases are inputted to a NAND circuit 11, and its output is inputted to an RS flip flop 12. By this method, at the time of turning on the power source, the correct track phican always be detected by the signal on the host side.