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1. 发明专利

JP2006203166A Semiconductor device and circuit device 有权
标题翻译：半导体器件和电路器件
公开(公告)号：JP2006203166A
公开(公告)日：2006-08-03
申请号：JP2005329184
申请日：2005-11-14
申请人： Kanto Sanyo Semiconductors Co Ltd , Sanyo Electric Co Ltd , 三洋電機株式会社 , 関東三洋セミコンダクターズ株式会社
发明人： SATO AKIHIRO , SEKIGUCHI SATOSHI , KAMATSUCHI KIYOKAZU , SAWAI TETSUO , IMAOKA SHUNICHI , KUROKAWA KAZUNARI , TSUBONOYA MAKOTO , MITA KIYOSHI , NABETA YOICHI
IPC分类号： H01L23/12
CPC分类号： H01L23/645 , H01F2017/008 , H01F2017/0086 , H01L23/49827 , H01L23/49838 , H01L23/552 , H01L24/48 , H01L24/73 , H01L25/16 , H01L2224/32225 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/07802 , H01L2924/12034 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19106 , H01L2924/30107 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To provide a low-cost semiconductor device capable of reproducing an inductance characteristic and stability which are provided before being mounted after it is mounted, and of being easily mounted.
SOLUTION: The semiconductor device comprises a substrate 10, a semiconductor chip 20 secured to one side of the substrate, and a coil 30 which is spirally formed on the other side of the substrate and electrically connected to the semiconductor chip. The semiconductor device further comprises a conductive pattern 40 for stabilizing the inductance characteristic of the coil on the surface of the one side of the substrate that faces the semiconductor chip.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够再现在其安装之后提供的电感特性和稳定性的低成本半导体器件，并且易于安装。解决方案：半导体器件包括衬底10，固定在衬底的一侧的半导体芯片20和螺旋地形成在衬底的另一侧并与半导体芯片电连接的线圈30。半导体器件还包括导电图案40，用于稳定面向半导体芯片的衬底的一侧的表面上的线圈的电感特性。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2011193025A Circuit substrate device 审中-公开
标题翻译：电路基板装置
公开(公告)号：JP2011193025A
公开(公告)日：2011-09-29
申请号：JP2011129102
申请日：2011-06-09
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： SAWAI TETSUO , IMAOKA SHUNICHI , YAMAGUCHI TAKESHI , SAIDA ATSUSHI
IPC分类号： H01F27/00 , H01F17/00 , H01L23/12 , H01P3/08
摘要： PROBLEM TO BE SOLVED: To propose a circuit board device which suppresses generation of electromagnetic fields and meets the requirement for size reduction. SOLUTION: In a circuit board device 100, a first wiring layer 110 has a first inductor 12 and a second inductor 14. A dielectric layer 115 has a first via 70 and a second via 72, each electrically connected to a first inductor 12 and a second inductor 14. A second wiring layer 120 has a bridge wiring line 30, which electrically connects the first via 70 to the second via 72, and a conductor pattern 50 which is formed around a bridge wiring line 30 and has outer edges at positions beyond the outer edges of a first wiring pattern and a second wiring pattern in the first wiring layer 110. A bridge wiring line 30 functions as a coplanar line and suppresses the occurrence of electromagnetic fields. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提出一种抑制电磁场产生并满足减小尺寸要求的电路板装置。解决方案：在电路板装置100中，第一布线层110具有第一电感器12和第二电感器14.电介质层115具有第一通孔70和第二通孔72，第一通孔70和第二通孔72电连接到第一电感器 12和第二电感器14.第二布线层120具有将第一通孔70电连接到第二通孔72的桥接布线30和形成在桥接布线30周围的导体图案50，并且具有外边缘在第一布线层110中的第一布线图案和第二布线图案的外边缘之外的位置处。桥接布线30用作共面线并抑制电磁场的发生。版权所有（C）2011，JPO＆INPIT

3. 发明专利

JP2007324330A Circuit board 审中-公开
标题翻译：电路板
公开(公告)号：JP2007324330A
公开(公告)日：2007-12-13
申请号：JP2006152078
申请日：2006-05-31
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： NAKANO SHINYA , OBARA YASUHIRO , IMAOKA SHUNICHI
IPC分类号： H05K1/02 , H01L23/12 , H05K1/18
CPC分类号： H01L24/32 , H01L24/73 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48464 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/83385 , H01L2224/92247 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To restrain lowering of reliability caused by heat generation from a circuit element by raising heat dissipation of a circuit board.
SOLUTION: The circuit board has a wiring layer 20 consisting of a plurality of insulation layers 2, 4 and conductive layers 3, 5 on a metal plate 1, a solder resist layer 7 provided to partially cover the wiring layer 20, an LSI chip 9 provided on the solder resist layer 7 via an adhesion layer 8, and a plurality of metal protrusions 6a provided through the solder resist layer 7 and the adhesion layer 8 in a region below the LSI chip 9. The wiring layer 20 in a region below the LSI chip 9 is provided with a thermal via hole 3a of the conductive layer 3 and the thermal via hole 5a of the conductive layer 5. A plurality of metal protrusions 6a are provided to corresponding positions each on the thermal via hole 5a. The LSI chip 9 is thermally coupled to the metal plate 1 via the plurality of metal protrusions 6a and the thermal via holes 3a, 5a.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过提高电路板的散热来抑制由电路元件发热产生的可靠性降低。解决方案：电路板具有由多个绝缘层2,4和金属板1上的导电层3,5构成的布线层20，部分地覆盖布线层20的阻焊层7，通过粘合层8设置在阻焊层7上的LSI芯片9，以及在LSI芯片9的下方的区域中通过阻焊层7和粘合层8设置的多个金属突起6a。在LSI芯片9下方设置有导电层3的热通孔3a和导电层5的热通孔5a。多个金属突起6a设置在热通孔5a上的相应位置。 LSI芯片9通过多个金属突起6a和热通孔3a，5a热耦合到金属板1。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2005129904A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005129904A
公开(公告)日：2005-05-19
申请号：JP2004264134
申请日：2004-09-10
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： IMAOKA SHUNICHI , USUI RYOSUKE , NAKANO ATSUSHI , KATO ATSUSHI
IPC分类号： H01L23/12 , H01L23/498
CPC分类号： H01L23/49827 , H01L23/49816 , H01L23/49833 , H01L24/48 , H01L2224/48237 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To improve heat dissipation and high-frequency properties of a semiconductor device.
SOLUTION: A semiconductor device 100 comprises a first conductive film 102 and a second conductive film 104 which are provided on both sides of an insulating resin film 106. A circuit element 120 is placed on the second conductive film 104. The circuit element 120 is electrically connected to the second conductive film 104. The second conductive film 104 is provided to cover a via plug 110. The via plug 110 is formed such that its diameter tapers from the first conductive film 102 toward the second conductive film 104.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提高半导体器件的散热和高频特性。解决方案：半导体器件100包括设置在绝缘树脂膜106两侧的第一导电膜102和第二导电膜104.电路元件120放置在第二导电膜104上。电路元件 120电连接到第二导电膜104.第二导电膜104设置成覆盖通孔塞110.通孔插塞110形成为使得其直径从第一导电膜102向第二导电膜104逐渐变细。 P>版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2013055367A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013055367A
公开(公告)日：2013-03-21
申请号：JP2012279956
申请日：2012-12-21
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： OTSUKA KENJI , IMAOKA SHUNICHI
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/73 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/92247 , H01L2924/01079 , H01L2924/15311 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a technology which improves the heat radiation performance of a semiconductor device having laminated semiconductor elements and improves the reliability.SOLUTION: A semiconductor device includes: a wiring board 40; a first semiconductor element 10 mounted on the wiring board 40; a second semiconductor element 20 laminated on the first semiconductor element 10 and having a protruding part 20b protruding from an outer edge of the first semiconductor element 10; and a sealing resin layer 50 sealing the respective semiconductor elements. The second semiconductor element 20 has a first analog cell 21a and a second analog cell 21b which generates heat at a higher temperature than the first analog cell 21a, on its upper surface and the second analog cell 21b is disposed so as to include the protruding part 20b.
摘要翻译：要解决的问题：提供一种提高具有层叠半导体元件的半导体器件的散热性能并提高可靠性的技术。解决方案：半导体器件包括：布线板40; 安装在布线板40上的第一半导体元件10; 层叠在第一半导体元件10上并具有从第一半导体元件10的外缘突出的突出部20b的第二半导体元件20; 以及密封各个半导体元件的密封树脂层50。第二半导体元件20具有在其上表面上产生比第一模拟电池21a高的温度的第一模拟电池21a和第二模拟电池21b，并且第二模拟电池21b被设置为包括突出部 20b。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2008211188A Semiconductor device and portable equipment 有权
标题翻译：半导体器件和便携式设备
公开(公告)号：JP2008211188A
公开(公告)日：2008-09-11
申请号：JP2008011473
申请日：2008-01-22
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： OTSUKA KENJI , IMAOKA SHUNICHI
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L24/73 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/92247 , H01L2924/01079 , H01L2924/15311 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a technology which enhances a radiation property of a semiconductor device having laminated semiconductor devices, and improves its reliability. SOLUTION: The semiconductor device includes a wiring substrate 40, a first semiconductor device 10 mounted on the wiring substrate 40, a second semiconductor device 20 which is laminated on the first semiconductor device 10, and in which a projected portion 20b projects from an outer edge of the first semiconductor device 10, and a sealed resin layer 50 which seals each of the semiconductor devices. The second semiconductor device 20 includes a first analog cell 21a and a second analog cell 21b on its upper face, wherein the second analog cell is easy to generate heat at higher temperature than the first analog cell 21a, and the second analog cell 21b is arranged so that it may include the projected portion 20b. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种提高具有层叠半导体器件的半导体器件的辐射特性的技术，并提高其可靠性。解决方案：半导体器件包括布线基板40，安装在布线基板40上的第一半导体器件10，层叠在第一半导体器件10上的第二半导体器件20，其中突出部分20b从第一半导体器件10的外边缘和密封每个半导体器件的密封树脂层50。第二半导体器件20在其上表面上包括第一模拟单元21a和第二模拟单元21b，其中第二模拟单元容易在比第一模拟单元21a高的温度下产生热量，并且布置第二模拟单元21b 使得其可以包括突出部分20b。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007180123A Circuit device, manufacturing method thereof, and circuit module 审中-公开
标题翻译：电路设备及其制造方法和电路模块
公开(公告)号：JP2007180123A
公开(公告)日：2007-07-12
申请号：JP2005374217
申请日：2005-12-27
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： MURAI MAKOTO , USUI RYOSUKE , INOUE YASUNORI , IMAOKA SHUNICHI , SAWAI TETSUO
IPC分类号： H01L25/18 , H01L25/04 , H01L25/065 , H01L25/07
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a circuit device having guaranteed KGD (Known Good Die) without increasing a mounting area.
SOLUTION: The circuit device 10 has a structure, where a semiconductor element 30 and a passive component 40 connected to a wiring layer 20 electrically are sealed by a sealing resin layer 50. The sealing resin layer 50 is formed so that the peripheral section of the wiring layer 20 remains, and the wiring layer 20 projects around the sealing resin layer 50. The wiring layer 20 at a part projecting to the sealing resin layer 50 is used as an electrode 22. In the electrode 22, an upper surface is used as a terminal 24 for making electrical connection to an external circuit device, and a lower surface is used as a terminal 26 for testing the operation of the circuit device 10.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供具有保证的KGD（已知良好的模具）而不增加安装面积的电路装置。解决方案：电路装置10具有这样的结构，其中半导体元件30和与布线层20连接的无源部件40由密封树脂层50密封。密封树脂层50形成为使得周边布线层20的截面残留，布线层20在密封树脂层50的周围突出。在向密封树脂层50突出的部分的布线层20用作电极22.在电极22中，被用作用于与外部电路装置进行电连接的端子24，并且下表面用作用于测试电路装置10的操作的端子26.（C）2007年，JPO和INPIT

8. 发明专利

JP2006101494A Antenna integrated circuit device 有权
标题翻译：天线集成电路设备
公开(公告)号：JP2006101494A
公开(公告)日：2006-04-13
申请号：JP2005243651
申请日：2005-08-25
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： IMAOKA SHUNICHI , SAWAI TETSUO
IPC分类号： H04B1/38 , H01Q1/38 , H01Q23/00
CPC分类号： H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137 , H01L2224/24195 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48464 , H01L2224/73267 , H01L2924/01079 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide an antenna integrated circuit device to obtain an excellent circuit characteristic controlling an increase of a mounting area.
SOLUTION: The antenna integrated circuit device 100 includes an insulating substrate 20, a semiconductor circuit element 30, a chip part 40, a mold resin 50, an antenna conductor 60, a grounding conductor 70, and an external drawing-out electrode 80. A plurality of chip parts 40 are mounted on the insulating substrate 20 and are connected to an electrode of a wiring conductor 10a of an upper face of the insulating substrate 20 electrically and physically by a solder. The insulating substrate 20 has a multilayer structure and is formed by laminating a plurality of insulator layers 20a to 20c. The wiring conductor 10c which is adjacent to the antenna conductor 60 is provided with the grounding conductor 70 as overlapped to the antenna conductor 60.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种天线集成电路器件，以获得控制安装面积的增加的优异的电路特性。解决方案：天线集成电路器件100包括绝缘基板20，半导体电路元件30，芯片部分40，模制树脂50，天线导体60，接地导体70和外部引出电极多个芯片部件40安装在绝缘基板20上，并通过焊料在物理上与绝缘基板20的上表面的布线导体10a的电极连接。绝缘基板20具有多层结构，并且通过层叠多个绝缘体层20a至20c而形成。与天线导体60相邻的布线导体10c设置有与天线导体60重叠的接地导体70.（C）2006年，JPO＆NCIPI

9. 发明专利

JP2005259908A Wiring board 审中-公开
标题翻译：接线板
公开(公告)号：JP2005259908A
公开(公告)日：2005-09-22
申请号：JP2004068014
申请日：2004-03-10
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： IMAOKA SHUNICHI , YAMAGUCHI TAKESHI
IPC分类号： H05K3/28 , H05K1/02
CPC分类号： H01L2924/3011 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To reduce the transmission loss of a line for transmitting a high frequency signal at low costs.
SOLUTION: This high frequency wiring board 10 is provided with a dielectric substrate 20, a signal line 30 formed on one surface of the dielectric substrate 20, a ground conductor 40 formed on the other surface of the dielectric substrate 20, a coating layer 50 for coating the signal line 30 and a sealing layer 60 for sealing the signal line 30 coated with the coating layer 50. The dielectric substrate 20 is constituted of resin materials, and materials whose dielectric tangent is smaller than that of the materials of the sealing layer 60 are used for the coating substrate 50.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：以低成本降低用于发送高频信号的线路的传输损耗。解决方案：该高频布线板10设置有电介质基板20，形成在电介质基板20的一个表面上的信号线30，形成在电介质基板20的另一个表面上的接地导体40，用于涂覆信号线30的层50和用于密封涂覆有涂层50的信号线30的密封层60.电介质基板20由树脂材料和材料的介质切线小于密封层60用于涂覆基底50.版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2005217199A Signal line circuit device 审中-公开
标题翻译：信号线路电路
公开(公告)号：JP2005217199A
公开(公告)日：2005-08-11
申请号：JP2004022203
申请日：2004-01-29
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： YAMAGUCHI TAKESHI , IMAOKA SHUNICHI
IPC分类号： H01L23/12 , H01P3/08
CPC分类号： H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To simply trim a signal line in a signal line circuit device and to adjust the characteristics of the device.
SOLUTION: The signal line circuit device 102 is arranged on a mounting substrate 120. The signal line circuit device 102 is provided with a dielectric layer 104, the signal line 106 formed on the surface of the dielectric layer 104, and a spacer (solder 130 or photo solder resist 132) formed between the mounting substrate 120 and the dielectric layer 104 for generating a clearance between the signal line 106 and the mounting substrate 120.
COPYRIGHT: (C)2005,JPO&NCIPI

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