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1. 发明专利

JP2011049967A Imaging apparatus unit 审中-公开
标题翻译：成像装置
公开(公告)号：JP2011049967A
公开(公告)日：2011-03-10
申请号：JP2009198248
申请日：2009-08-28
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI
IPC分类号： H04N5/222 , G03B15/00 , G03B17/56 , H04N5/225
摘要： PROBLEM TO BE SOLVED: To correct position shift of a monitoring camera without depending on user operation in the case where a position of the monitoring camera is shifted during mode processing of an auto-preset mode, or the like. SOLUTION: During mode processing of an auto-preset mode or the like, a predetermined time is measured and after the lapse of the predetermined time, it is automatically discriminated whether position shift occurs. If position shift occurs, an initial operation is performed, thereby correcting the position deviation. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：在自动预设模式的模式处理期间在监视摄像机的位置偏移的情况下，不依赖于用户操作来校正监视摄像机的位置偏移等。解决方案：在自动预设模式等的模式处理期间，测量预定时间，并且在经过预定时间之后，自动识别是否发生位置偏移。如果发生位置偏移，则执行初始操作，从而校正位置偏差。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JP2005109225A Circuit device 审中-公开
标题翻译：电路设备
公开(公告)号：JP2005109225A
公开(公告)日：2005-04-21
申请号：JP2003342081
申请日：2003-09-30
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： NAKANO ATSUSHI , KATO ATSUSHI
IPC分类号： H05K3/28 , H01L21/52 , H01L21/56 , H01L21/58 , H01L23/12 , H01L23/498 , H05K1/18
CPC分类号： H01L24/06 , H01L23/49838 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/27013 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/4912 , H01L2224/49171 , H01L2224/73265 , H01L2224/83051 , H01L2224/83192 , H01L2224/83385 , H01L2224/8385 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01059 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/10161 , H01L2924/10162 , H01L2924/12042 , H01L2924/13055 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/18301 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To provide a circuit device wherein the adhesion between a circuit element and other constituent members is improved. SOLUTION: The circuit device 10A of this configuration comprises a conductive pattern 12, a coating resin 14 covering the conductive pattern 12 except for a first opening 11A, and a semiconductor element 13A electrically connected by a conductive paste 9 to the conductive pattern 12 exposed in the first opening 11A. The first opening 11A is formed to be smaller than the semiconductor element 13A, and the conductive paste 9 contacts with both the conductive pattern 12 exposed in the first opening 11A and with the coating resin 14. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种电路装置，其中电路元件和其它构成部件之间的粘附性得到改善。解决方案：该结构的电路装置10A包括导电图案12，覆盖除了第一开口11A之外的导电图案12的涂覆树脂14和通过导电浆料9电连接到导电图案的半导体元件13A 12暴露在第一开口11A中。第一开口11A形成为比半导体元件13A小，并且导电膏9与在第一开口11A中露出的导电图案12和涂覆树脂14接触。版权所有（C）2005， JPO＆NCIPI

3. 发明专利

JP2005101179A Circuit device 有权
标题翻译：电路设备
公开(公告)号：JP2005101179A
公开(公告)日：2005-04-14
申请号：JP2003331635
申请日：2003-09-24
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI , NAKANO ATSUSHI
IPC分类号： H01L23/50 , H01L23/31 , H01L23/48 , H01L23/495
CPC分类号： H01L24/48 , H01L23/3107 , H01L23/49541 , H01L24/05 , H01L24/06 , H01L24/45 , H01L24/49 , H01L24/73 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/05647 , H01L2224/32225 , H01L2224/32245 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2224/85447 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/10161 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a circuit device internally having a wiring part for constituting an electric circuit. SOLUTION: The circuit device comprising a circuit element 13 and a conductive pattern 12 constituting an electric circuit and resin molded integrally has a conductive pattern 12A for passing an electric signal communicating between the electric circuit and the outside, and a wiring part 12B branched from the conductive pattern 12A and passing an electric signal being inputted to other part of the electric circuit. According to the inventive circuit device, the electric signal communicating between the incorporated electric circuit and the outside can be inputted to other part of the electric circuit through wiring formed in the device. Consequently, the pattern structure of a mounting substrate can be simplified. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种内部具有用于构成电路的布线部分的电路装置。解决方案：包括电路元件13和构成电路的导电图案12和一体地模制的树脂的电路装置具有用于使通过电路和外部之间的电信号通过的导电图案12A和布线部分12B 从导电图案12A分支并且将输入到电路的其他部分的电信号通过。根据本发明的电路装置，通过在装置中形成的布线，可以将并入的电路和外部之间的电信号通过布线输入到电路的其他部分。因此，可以简化安装基板的图案结构。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2013058726A Mounting substrate and circuit device using the same 审中-公开
标题翻译：使用该安装基板和电路装置
公开(公告)号：JP2013058726A
公开(公告)日：2013-03-28
申请号：JP2012073467
申请日：2012-03-28
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI , NARUSE TOSHIMICHI , IGARASHI YUUSUKE
IPC分类号： H01L23/12 , H01L25/07 , H01L25/18 , H05K1/11
CPC分类号： H05K1/0213 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H05K1/0265 , H05K1/141 , H05K3/427 , H05K2203/049 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a mounting substrate which does not complicate steps and is capable of achieving fine patterning even if conductive patterns for high current and low current are formed, and a circuit device using the same.SOLUTION: A mounting substrate comprises: a core layer 52 composed of an insulating resin; a first conductive pattern 53 provided on a surface side of the core layer 52; a second conductive pattern 54 provided on a rear side of the core layer 52; and a Via 72 provided between a first electrode 64 for high current in the first conductive pattern 53 and an external electrode 73 of the second conductor pattern 54 provided so as to correspond to the first electrode 64. The first conductive pattern 53 and the second conductive pattern 54 have the same film thickness, and a resistance value of the Via 72 is lowered so that high current flows in the external electrode 73 via the Via 72.
摘要翻译：要解决的问题：提供一种即使形成用于高电流和低电流的导电图案也能够使步骤复杂化并且能够实现精细图案化的安装基板，以及使用该安装基板的电路装置。解决方案：安装基板包括：由绝缘树脂构成的芯层52; 设置在芯层52的表面侧的第一导电图案53; 设置在芯层52的后侧的第二导电图案54; 以及设置在第一导电图案53中的高电流用的第一电极64和与第一电极64对应地设置的第二导体图案54的外部电极73之间的通孔72.第一导电图案53和第二导电图案54具有相同的膜厚度，并且Via 72的电阻值降低，使得高电流通过Via 72在外部电极73中流动。版权所有：（C）2013，JPO＆INPIT

5. 发明专利

JP2008131422A Monitoring camera 审中-公开
标题翻译：监控摄像机
公开(公告)号：JP2008131422A
公开(公告)日：2008-06-05
申请号：JP2006315087
申请日：2006-11-22
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI
IPC分类号： H04N5/225 , G03B15/00 , G03B17/56
摘要： PROBLEM TO BE SOLVED: To provide a monitoring camera capable of accurately executing mask processing regardless of a tilt angle.
SOLUTION: In the monitoring camera, an image sensor 14 includes an imaging plane for capturing a part of a monitoring zone from the upside. A direction of the imaging plane is changed into a designated direction by a pan rotating mechanism 32 and a tilt rotating mechanism 34, and a tilt angle of the imaging plane is iteratively detected by a main CPU 28. When the detected tilt angle belongs to a range of 55°-125°, a circle function is defined as a designated function. Furthermore, if the detected tilt angle belongs to 0°-55° or 125°-180°, a secondary function is defined as a designated function. The main CPU 28 refers to the designated function to specify a tilting angle of a privacy area when the privacy area assigned to the monitoring zone is captured on the imaging plane. Moreover, the main CPU 28 executes mask processing for masking a partial image generated on the imaging plane in accordance with the privacy area on the basis of the specified tilting angle.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够精确地执行掩模处理而不管倾斜角度的监视摄像机。解决方案：在监视摄像机中，图像传感器14包括用于从上侧捕获监视区域的一部分的成像平面。成像平面的方向通过平转旋转机构32和倾斜旋转机构34变成指定方向，并且主CPU 28迭代地检测成像平面的倾斜角。当检测到的倾斜角属于范围为55°-125°，圆函数被定义为指定函数。此外，如果检测到的倾斜角度属于0°-55°或125°-180°，则二次功能被定义为指定功能。当在成像平面上捕获分配给监视区域的隐私区域时，主CPU28参考指定的功能来指定隐私区域的倾斜角度。此外，主CPU28执行掩模处理，用于根据指定的倾斜角度根据隐私区域屏蔽在成像平面上生成的部分图像。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2008091396A Semiconductor module and semiconductor device 审中-公开
标题翻译：半导体器件和半导体器件
公开(公告)号：JP2008091396A
公开(公告)日：2008-04-17
申请号：JP2006267485
申请日：2006-09-29
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： TAMURA HIROYUKI , KATO ATSUSHI , HOSOI TOSHIRO
IPC分类号： H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L2224/48091 , H01L2924/01019 , H01L2924/09701 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor module in which elements built in a stack structure can be easily connected to each other using a metal fine wire, and to provide a semiconductor device.
SOLUTION: The semiconductor module 10 has a wiring board 16 having at least one wiring layer, and a semiconductor element 12A disposed on the upper surface of the wiring board 16. On the upper surface of the wiring board 16, a plurality of pads are provided along sides and the semiconductor element 12A etc. are disposed on the upper surface of the wiring board 16 on a region surrounded by the pads. Further, a wiring for electrically connecting the pads through the lower part of the semiconductor elements is provided on the wiring board.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：提供一种半导体模块，其中使用金属细线将堆叠结构中的元件彼此容易地连接，并提供半导体器件。解决方案：半导体模块10具有至少一个布线层的布线板16和布置在布线板16的上表面上的半导体元件12A。在布线板16的上表面上，焊盘沿着侧面设置，并且半导体元件12A等被布置在由焊盘包围的区域上的布线板16的上表面上。此外，在布线板上设置用于将焊盘电连接到半导体元件的下部的布线。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2005277356A Circuit device 审中-公开
标题翻译：电路设备
公开(公告)号：JP2005277356A
公开(公告)日：2005-10-06
申请号：JP2004092561
申请日：2004-03-26
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI
IPC分类号： H01L25/18 , H01L21/58 , H01L23/02 , H01L23/12 , H01L23/31 , H01L23/552 , H01L25/00 , H01L25/065 , H01L25/07 , H01L27/00
CPC分类号： H01L24/32 , H01L23/3128 , H01L23/552 , H01L24/29 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/2908 , H01L2224/32013 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/48465 , H01L2224/73265 , H01L2224/92247 , H01L2225/0651 , H01L2225/06527 , H01L2225/06586 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/07802 , H01L2924/1305 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2924/00012 , H01L2924/01026 , H01L2924/01028 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To solve the problem that, in stacked mounting, an IC chip in an upper layer and an IC chip in a lower layer are insulated by an insulating adhesive, etc., and therefore, if an analog IC chip is stacked in an upper layer, a substrate comes into a floated state and hence desired characteristics cannot be obtained. SOLUTION: A conductive layer is formed on the IC chip, and the analog IC chip is fastened on the conductive layer. By connecting the conductive layer to a fixed potential pattern by a bonding wire, etc., the rear surface (the substrate) of the analog IC chip can be applied with a fixed potential. Due to this structure, a mounting structure can be realized wherein the analog IC chip is stacked in an upper layer, and hence the versatility of stacked mounting of a circuit device including an analog IC chip is expanded while the mounting area is reduced, and characteristics can be improved. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决的问题为了解决在层叠安装中，上层的IC芯片和下层的IC芯片被绝缘粘合剂等绝缘的问题，因此如果模拟IC 芯片堆叠在上层中，基板进入浮动状态，因此不能获得期望的特性。解决方案：在IC芯片上形成导电层，并将模拟IC芯片紧固在导电层上。通过用导线等将导电层连接到固定电位图案，可以将模拟IC芯片的背面（基板）施加固定电位。由于这种结构，可以实现其中模拟IC芯片堆叠在上层中的安装结构，因此包括模拟IC芯片的电路装置的堆叠安装的多功能性在安装面积减小的同时被扩大，并且特性可以改进。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2005129904A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005129904A
公开(公告)日：2005-05-19
申请号：JP2004264134
申请日：2004-09-10
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： IMAOKA SHUNICHI , USUI RYOSUKE , NAKANO ATSUSHI , KATO ATSUSHI
IPC分类号： H01L23/12 , H01L23/498
CPC分类号： H01L23/49827 , H01L23/49816 , H01L23/49833 , H01L24/48 , H01L2224/48237 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： PROBLEM TO BE SOLVED: To improve heat dissipation and high-frequency properties of a semiconductor device.
SOLUTION: A semiconductor device 100 comprises a first conductive film 102 and a second conductive film 104 which are provided on both sides of an insulating resin film 106. A circuit element 120 is placed on the second conductive film 104. The circuit element 120 is electrically connected to the second conductive film 104. The second conductive film 104 is provided to cover a via plug 110. The via plug 110 is formed such that its diameter tapers from the first conductive film 102 toward the second conductive film 104.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提高半导体器件的散热和高频特性。解决方案：半导体器件100包括设置在绝缘树脂膜106两侧的第一导电膜102和第二导电膜104.电路元件120放置在第二导电膜104上。电路元件 120电连接到第二导电膜104.第二导电膜104设置成覆盖通孔塞110.通孔插塞110形成为使得其直径从第一导电膜102向第二导电膜104逐渐变细。 P>版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2005101180A Circuit device 有权
标题翻译：电路设备
公开(公告)号：JP2005101180A
公开(公告)日：2005-04-14
申请号：JP2003331636
申请日：2003-09-24
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI , NAKANO ATSUSHI
IPC分类号： H05K1/02 , H01L21/60 , H01L23/12 , H01L23/48 , H01L23/495 , H01L23/66 , H05K1/00 , H05K1/18 , H05K5/06
CPC分类号： H01L23/66 , H01L23/49517 , H01L24/05 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2223/6622 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/32225 , H01L2224/32245 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2224/85447 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10161 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/18301 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/3011 , H01L2224/45099 , H01L2924/00 , H01L2924/00012 , H01L2924/00015
摘要： PROBLEM TO BE SOLVED: To provide a circuit device having a structure for suppressing a leak current between patterns. SOLUTION: The circuit device 10 has a circuit element 13 and a desired conductive pattern 12 and resin molded integrally. The conductive pattern 12 includes a first conductive pattern 12A connected with the high impedance input terminal of the circuit element 13, a second conductive pattern 12B provided in proximity to the first conductive pattern, and a guard conductive pattern 12C extending between the first and second conductive patterns wherein a leak current is prevented between the first conductive pattern 12A and the second conductive pattern 12B. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种具有抑制图案之间的漏电流的结构的电路装置。解决方案：电路装置10具有电路元件13和期望的导电图案12和一体地模制的树脂。导电图案12包括与电路元件13的高阻抗输入端连接的第一导电图案12A，设置在第一导电图案附近的第二导电图案12B，以及在第一导电图案和第二导电图案之间延伸的保护导电图案12C 在第一导电图案12A和第二导电图案12B之间防止泄漏电流的图案。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2014049604A Mounting board and circuit device using the same 审中-公开
标题翻译：安装板和使用该安装板的电路设备
公开(公告)号：JP2014049604A
公开(公告)日：2014-03-17
申请号：JP2012191274
申请日：2012-08-31
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： KATO ATSUSHI , NARUSE TOSHIMICHI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To solve such a problem that the process is complicated to cause increase in cost when trying to obtain a thick conductive pattern for a large current and a thin conductive pattern for a small current on a substrate, and such a problem that a fine pattern cannot be drawn on the substrate when trying to use a thick conductive pattern for a large current also as a thin conductive pattern for a small current, because the film thickness is thick.SOLUTION: A mounting board has a core layer 52 composed of insulation resin, a first conductive pattern 53 provided on the surface side of the core layer 52, and a second conductive pattern 54 provided on the back side of the core layer 52. Interval d of the second conductive patterns 54 is set on the basis of the voltage being applied, and the second conductive pattern 54 is expanded to have a uniform interval on the basis of the set value. Consequently, the area of a conductive pattern on the back side is enlarged and heat dissipation effect is magnified.
摘要翻译：要解决的问题为了解决在试图获得大电流的粗导电图案和基板上的小电流的薄导电图案的过程复杂的过程复杂的问题，以及这样的问题，即由于薄膜厚度较厚，所以当试图对较大电流使用厚导电图形作为小电流的薄导电图案时，在基板上不能绘制精细图案。解决方案：安装板具有芯层52 绝缘树脂，设置在芯层52的表面侧的第一导电图案53和设置在芯层52的背面上的第二导电图案54.第二导电图案54的间隔d基于的电压，并且第二导电图案54根据设定值被扩展为具有均匀的间隔。因此，后侧的导电图案的面积被扩大，散热效果被放大。

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