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1. 发明专利

JP2005340544A Resin sheet, manufacturing method of ceramic structure using it, and ceramic structure 有权
标题翻译：使用它的陶瓷结构的制造方法和陶瓷结构
公开(公告)号：JP2005340544A
公开(公告)日：2005-12-08
申请号：JP2004158459
申请日：2004-05-27
申请人： Kyocera Corp , 京セラ株式会社
发明人： TAKASE HIROYUKI , SUZUKI SHINICHI , TANAKA YUJI
IPC分类号： B28B11/00 , B32B18/00 , C03B29/00 , C03C14/00 , C04B35/634 , C04B35/638 , H01L21/48 , H01L23/02 , H01L23/12 , H05K1/03 , H05K1/18 , H05K3/00 , H05K3/46
CPC分类号： B32B18/00 , C03C14/00 , C03C14/004 , C03C2214/20 , C04B35/634 , C04B35/63424 , C04B35/638 , C04B2237/34 , C04B2237/341 , C04B2237/343 , C04B2237/346 , C04B2237/348 , C04B2237/365 , C04B2237/366 , C04B2237/368 , C04B2237/62 , C04B2237/64 , C04B2237/68 , C04B2237/704 , H01L21/4857 , H01L21/4867 , H01L2924/15174 , H05K1/0306 , H05K1/183 , H05K3/0011 , H05K3/005 , H05K3/4629 , H05K3/4697 , H05K2203/308
摘要： PROBLEM TO BE SOLVED: To provide a ceramic structure without interlayer peeling and with the sufficient accuracy of a dimension, and to provide its manufacturing method so as to prevent the deformation of the periphery of a recess or a hollow and the malfunction of a conductor section formed there. SOLUTION: A plurality of ceramic green sheets A and B are laminated and fired. At the time of manufacturing the ceramic structure having at least one side of a surface recess 7 and an inner hollow, a resin sheet 2 is placed at the part used as the recess 7 and the inner hollow of the ceramic green sheet. When the plurality of ceramic green sheets are laminated and fired, the resin sheet 2 is carried out by thermal decomposition and removed. A relation T a b ≤T c is satisfied, when the 80% weight reduction temperature of the top layer of the resin sheet 2 is T a °C, the 80% weight reduction temperature of the bottom layer is T b °C, and the 20% weight reduction temperature of the resin binder contained in the resin binder is T c °C included in the ceramic green sheet wherein the resin sheet 2 is placed. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供没有层间剥离并且具有足够的尺寸精度的陶瓷结构，并且提供其制造方法以防止凹部或中空部的周边的变形和故障在那里形成的导体部分。解决方案：将多个陶瓷生片A和B层压并烧制。在制造具有表面凹部7和内部中空的至少一个侧面的陶瓷结构体时，将树脂片2放置在用作凹部7的部分和陶瓷生片的内部中空部分。当多个陶瓷生片被层压和烧制时，树脂片2通过热分解和去除来进行。满足关系T a b ≤T c 当树脂片2顶层的80％重量降低温度是T a ℃，底层的80％重量降低温度为T SB> b ℃，而含有的树脂粘合剂的20％重量降低温度树脂粘合剂是包含在其中放置树脂片2的陶瓷生片中的T c C。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2005159256A Ceramic paste and method of manufacturing ceramic multilayer wiring board using the same 有权
标题翻译：陶瓷粉末及其制造方法使用陶瓷多层接线板
公开(公告)号：JP2005159256A
公开(公告)日：2005-06-16
申请号：JP2004048446
申请日：2004-02-24
申请人： Kyocera Corp , 京セラ株式会社
发明人： TAKASE HIROYUKI , SUZUKI SHINICHI , IKI YUTAKA
IPC分类号： C04B35/632 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a ceramic paste which has good screen printability and can effectively prevent interlayer adhesion failure as well as bending deformation of the ceramic multilayer wiring board by providing sufficient flowability so as not to deform or break internal wiring lines, and a method of manufacturing a ceramic multilayer wiring board using the same.
SOLUTION: In manufacturing a ceramic multilayer wiring board in which a plurality of ceramic layers are laminated and internal wiring lines are formed, ceramic filling layers containing the same ceramic component as that of the ceramic layers are formed between the ceramic layers on regions where internal wiring lines are not formed. For this purpose, the ceramic paste is printed by a screen printing method on portions other than those of the internal wiring lines of green sheets that are to be converted to the ceramic layers on which internal wiring lines are formed. The ceramic paste contains a ceramic component, acrylic resin, and cellulose resin, and its tan δ = (loss modulus)/(storage modulus) in the dry state after the printing is larger than the tan δ in the dry state of the conductive paste which becomes internal wiring lines.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种具有良好的丝网印刷性的陶瓷浆料，并且通过提供足够的流动性而不会使内部布线发生变形或断裂，可以有效地防止陶瓷多层布线板的层间粘合破坏以及弯曲变形以及使用其制造陶瓷多层布线板的方法。解决方案：在制造其中形成多个陶瓷层并形成内部布线的陶瓷多层布线板的制造中，在陶瓷层之间形成陶瓷填充层，陶瓷填充层包含与陶瓷层相同的陶瓷成分其中没有形成内部布线。为此，通过丝网印刷法将陶瓷糊料印刷到不同于要转化为形成有内部布线的陶瓷层的生片的内部布线的部分以外的部分。陶瓷浆料含有陶瓷成分，丙烯酸树脂和纤维素树脂，印刷后的干燥状态下的tanδ=（损耗模量）/（储能模量）大于导电膏的干燥状态下的tanδ 这成为内部布线。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2005131971A Ceramic green sheet-resin sheet composite and its manufacturing method 有权
标题翻译：陶瓷绿板材复合材料及其制造方法
公开(公告)号：JP2005131971A
公开(公告)日：2005-05-26
申请号：JP2003371331
申请日：2003-10-30
申请人： Kyocera Corp , 京セラ株式会社
发明人： SUZUKI SHINICHI , TAKASE HIROYUKI , TANAKA YUJI , IKEUCHI TAKAYUKI
IPC分类号： C04B35/64 , B28B11/00 , B28B11/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To solve the problem that poor adhesion between green sheets is caused when pressure is reduced so as to prevent deformation easily caused at the lamination of the green sheet because variations in pressure occur between a recess and parts except the recess, at the lamination of the green sheet wherein a through-hole serving as the recess after the lamination is formed, in the manufacturing of a ceramic multilayer wiring substrate with the recess. SOLUTION: In this green sheet-resin sheet composite A1, a resin sheet 2 is fitted into the through-hole 3 which is formed in the green sheet 1; a sintered compact, wherein the through-hole 3 is formed, is manufactured by thermally decomposing the resin sheet 2 when the green sheet 1 is sintered; and the resin sheet 2 includes cross-linked acrylic resin beads, an acrylic resin binder and a plasticizer. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：解决的问题为了解决当压力降低时引起生片之间粘附性差的问题，以便防止在生坯层压时容易引起的变形，因为在凹部和除了在制造具有凹部的陶瓷多层布线基板的生片的叠层时，形成层叠后形成凹部的通孔。解决方案：在生坯片材树脂复合材料A1中，将树脂片材2嵌入生坯片1中形成的通孔3中，其中形成通孔3的烧结体是通过烧结生片1而使树脂片2热分解而制造的; 树脂片2包括交联丙烯酸树脂珠，丙烯酸树脂粘合剂和增塑剂。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2004106540A Composite and its manufacturing process, and manufacturing process of ceramic substrate 审中-公开
公开(公告)号：JP2004106540A
公开(公告)日：2004-04-08
申请号：JP2003304951
申请日：2003-08-28
申请人： Kyocera Corp , 京セラ株式会社
发明人： SUZUKI SHINICHI , NAGATA KOICHI , IKEUCHI TAKAYUKI , TANAKA YUJI
IPC分类号： C04B35/64 , B28B11/12 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To obtain a composite suitable for use in manufacturing a void section-incorporated ceramic substrate, its manufacturing process, and the void section-incorporated ceramic substrate free from delamination or deformation by using the same. SOLUTION: A ceramic substrate D, in which a void 7 is formed in place of a sheet to be burnt down, is obtained as follows. A ceramic green sheet 1 and a sheet 2 to be burnt down of substantially identical thickness are obtained separately, and a through hole 3 is formed to a predetermined location of the ceramic green sheet 1. The sheet 2 to be burnt down is stacked on the ceramic green sheet 1 provided with the through hole 3, and by pressing the through hole 3 location of the ceramic green sheet 1 from the sheet 2 to be burnt down side, a part of the sheet 2 to be burnt down is filled into the through hole 3 to form the composite in which the ceramic green sheet 1 and the sheet 2 to be burnt down are united. The composite is laminated with another ceramic green sheet and/or another composite to form a laminated body, and burnt to remove the sheet to be burnt down by pyrolysis. COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2002111220A MULTILAYERED WIRING BOARD AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JP2002111220A
公开(公告)日：2002-04-12
申请号：JP2000297226
申请日：2000-09-28
申请人： KYOCERA CORP
发明人： SUZUKI SHINICHI , AZUMA MASAHIKO , TAMI YASUHIDE , NAGAE KENICHI , NAKAO YOSHIHIRO
IPC分类号： H05K3/46 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To reduce the thickness fluctuation of the capacitor section of a high dielectric glass ceramic layer in a multilayered wiring board composed of the high dielectric glass ceramic layer and low dielectric glass ceramic layer and incorporating a capacitor. SOLUTION: The multilayered wiring board is provided with a ceramic insulating substrate 1 constituted by laminating insulating layers 1a-1c upon another, and wiring circuit layers 2 formed on and/or in the substrate 1. The insulating layers 1a and 1c constituting the substrate 1 have low dielectric constants, and the insulating layer 1b also constituting the substrate 1 has a high dielectric constant. In addition, electrodes 3 are respectively provided in the interfaces between the high dielectric layer 1b and low dielectric layers 1a and 1c. The thicknesses 5a of the electrodes 3 on the sides of the low dielectric layers 1a and 1c are made larger than those 5b of the electrodes 3 on the side of the high dielectric layer 1b.

6. 发明专利

JP2011187906A Solar cell element and method of manufacturing the same 审中-公开
标题翻译：太阳能电池元件及其制造方法
公开(公告)号：JP2011187906A
公开(公告)日：2011-09-22
申请号：JP2010072709
申请日：2010-03-26
申请人： Kyocera Corp , 京セラ株式会社
发明人： MIURA YOSHIO , SUZUKI SHINICHI , OTA DAISUKE
IPC分类号： H01L31/04
CPC分类号： H01L31/02245 , Y02E10/50
摘要： PROBLEM TO BE SOLVED: To provide a solar cell element which improves reliability and makes photoelectric conversion efficiency excellent by enhancing the joining of a semiconductor substrate side and an electrode for taking out generated power and the extraction of a carrier, and a method of manufacturing the same. SOLUTION: The invention relates to a solar cell element 1 which has a semiconductor substrate 2 including a semiconductor layer of one conductivity type and a semiconductor layer of a reverse conductivity type and in which at least one principal surface of the semiconductor substrate 2 is the semiconductor layer of the reverse conductivity type and electrodes 3-6 for taking out generated power are formed on the other principal surface opposed to the one principal surface of the semiconductor substrate and on the semiconductor layer of the reverse conductivity type where the electrodes 3 and 4 formed on the semiconductor layer of the reverse conductive type contain at least silver and copper. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：解决的问题：提供一种提高可靠性的太阳能电池元件，通过增强半导体衬底侧和用于取出发电的电极和载体的提取的接合而使光电转换效率优异，以及方法的制造相同。解决方案：本发明涉及一种太阳能电池元件1，其具有包括一种导电类型的半导体层的半导体衬底2和具有反向导电类型的半导体层，并且半导体衬底2的至少一个主表面是反向导电型的半导体层，并且在与半导体衬底的一个主表面相对的另一个主表面上和在反向导电类型的半导体层上形成用于取出发电的电极3-6，其中电极3 和4形成在反向导电类型的半导体层上至少含有银和铜。版权所有（C）2011，JPO＆INPIT

7. 发明专利

JP2007062186A Method for manufacturing ceramic structure 有权
标题翻译：制造陶瓷结构的方法
公开(公告)号：JP2007062186A
公开(公告)日：2007-03-15
申请号：JP2005251970
申请日：2005-08-31
申请人： Kyocera Corp , 京セラ株式会社
发明人： TAKASE HIROYUKI , TANAKA YUJI , IKEUCHI TAKAYUKI , SUZUKI SHINICHI
IPC分类号： B28B1/48 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a ceramic structure having a recess or void with high dimensional accuracy. SOLUTION: In manufacturing the ceramic structure E having at least either of the surface recess 7 and the internal void 10 by laminating a plurality of ceramic green sheets, followed by baking, the manufacturing method comprises a step of laying, on the vacancy part that has a volume V and which forms the recess 7 of the ceramic green sheet and on the vacancy part which forms the void 10, a resin sheet 2a having an occupying volume of 0.8-1.1V (the occupying volume includes the volume of the air bubbles contained in the inside of the resin sheet), a step of laminating a plurality of the above ceramic green sheets, and a step of pyrolizing and removing the resin sheet 2a upon baking the laminated body of the ceramic green sheets. The resin sheet 2a contains air bubbles, and the volume V liq. of the resin sheet 2a in the molten state immediately before thermal decomposition is 0.2-0.6V. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造具有高尺寸精度的具有凹陷或空隙的陶瓷结构的方法。解决方案：在通过层叠多个陶瓷生片来制造具有表面凹部7和内部空隙10中的至少一个的陶瓷结构E之后，进行烘烤，制造方法包括在空位上铺设的步骤具有体积V并形成陶瓷生片的凹部7的部分和形成空隙10的空位部分，占据体积为0.8-1.1V的树脂片2a（占据体积包括包含在树脂片的内部的气泡），层叠多个上述陶瓷生片的步骤，以及在烘烤陶瓷生片的层叠体时热塑除去树脂片2a的步骤。树脂片2a包含气泡，在热分解之前的熔融状态下的树脂片2a的体积V 为0.2-0.6V。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2006181744A Ceramic structure 有权
标题翻译：陶瓷结构
公开(公告)号：JP2006181744A
公开(公告)日：2006-07-13
申请号：JP2004375124
申请日：2004-12-27
申请人： Kyocera Corp , 京セラ株式会社
发明人： TAKASE HIROYUKI , TANAKA YUJI , SUZUKI SHINICHI , FURUMOTO YUICHI
IPC分类号： B28B11/00 , B28B11/12 , H01L23/08 , H01L23/13 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a ceramic structure constituted by integrally laminating a plurality of ceramic green sheets to bake them, in detail a ceramic structure not requiring special surface treatment or the like after baking and having recessed parts on its surface, which is formed from a sintered surface enhanced in orthogonal angle, smoothness and dimensional precision and comprises a thin side wall or cavities under its surface. SOLUTION: The ceramic structure is manufactured by placing the regions becoming the side walls of the recessed parts or cavities of the ceramic green sheet, laminating a plurality of the ceramic green sheets and pyrolyzing the resin sheet when the laminate of the ceramic green sheets is baked to remove the same. The recessed parts or cavities are characterized in that the angle formed by the inside surfaces and bases of the recessed parts or cavities is within 90±3°, the smoothness of the bases and inside surfaces of the recessed parts or cavities is 30 μm or below and the radius of carvature of the corner part between the mutual surfaces surrounding the recessed parts or cavities is 50 μm or below, in a state the inner surfaces of the recessed parts or cavities are sintered to become sintered surfaces as they are. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供通过一体层压多个陶瓷生片以烘烤它们的陶瓷结构，详细地，在烘烤后不需要特殊表面处理等的陶瓷结构体，并且在其表面上具有凹陷部分，其由正交角度，平滑度和尺寸精度增强的烧结表面形成，并且在其表面下方包括薄的侧壁或空腔。解决方案：通过将区域变成陶瓷生片的凹陷部分或空腔的侧壁，层叠多个陶瓷生片并且当陶瓷绿色的层压体层压时热解树脂片来制造陶瓷结构烘烤片材以除去它们。凹部或凹部的特征在于，由凹部或空腔的内表面和基部形成的角度在90±3°内，凹部或凹部的基部和内表面的平滑度为30μm以下在凹部或空腔周围的相互表面之间的角部的圆周的半圆形为50μm以下，在将凹部或空腔的内表面原样烧结成烧结面的状态下。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2004063812A Method of manufacturing multilayer wiring board 审中-公开
公开(公告)号：JP2004063812A
公开(公告)日：2004-02-26
申请号：JP2002220484
申请日：2002-07-29
申请人： Kyocera Corp , 京セラ株式会社
发明人： SUZUKI SHINICHI , NAKAO YOSHIHIRO , NAGAE KENICHI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer wiring board which can reduce the transmission loss even if a high dielectric constant layer is arranged in the main board, and can reduce warpage.
SOLUTION: Between one main surface and the other main surface of this board, two kinds of low dielectric constant green sheets L1G, L2G and a high dielectric constant green sheet H1G are interposed so that the high dielectric constant green sheet H1G is arranged within the thickness of Z/2 from the other main surface, when the thickness of the laminated molded body between one main surface and the other main surface is defined as Z; the low dielectric constant green sheet L2G is arranged within the thickness of Z/2 from one main surface; and the low dielectric constant green sheet L2G and the high dielectric constant green sheet H1G are arranged so as to make contact with the low dielectric constant green sheet L1G at least with one surface of each of them. When shrinkage starting temperatures of the low dielectric constant green sheets L1G, L2G and high dielectric constant green sheet H1G are defined as T1, T2 and T3, the following relations are satisfied: T1>T3, T1>T2, and |T2-T3|≤5°C.
COPYRIGHT: (C)2004,JPO

10. 发明专利

JP2003101229A CERAMIC MULTILAYER WIRING BOARD AND ITS MANUFACTURING METHOD 审中-公开
公开(公告)号：JP2003101229A
公开(公告)日：2003-04-04
申请号：JP2001298546
申请日：2001-09-27
申请人： KYOCERA CORP
发明人： SUZUKI SHINICHI , NAKAO YOSHIHIRO , NAGAE KENICHI
IPC分类号： B32B18/00 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a ceramic multilayer wiring board in which a wring layer formed of a low permittivity ceramic layer is disposed near a chip, and a capacitor layer formed of a high permittivity ceramic layer is disposed on a rear surface side of the substrate and which does not have a warpage and to provide a method for manufacturing the same. SOLUTION: The ceramic multilayer wiring board comprises the low permittivity ceramic layer 5 and the high permittivity ceramic layer 7. The substrate satisfies t1

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