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1. 发明专利

JP2008239408A Heat-resistant ceramic member 审中-公开
标题翻译：耐热陶瓷会员
公开(公告)号：JP2008239408A
公开(公告)日：2008-10-09
申请号：JP2007082910
申请日：2007-03-27
申请人： Kyocera Corp , 京セラ株式会社
发明人： TATEYAMA TAIJI , SHIGEOKA TOSHIAKI , KOSAKA SHOJI
IPC分类号： C04B35/46
摘要： PROBLEM TO BE SOLVED: To provide a heat-resistant ceramic member which has no partial erosion and has high heat resistance and high heat decomposition resistance. SOLUTION: The heat-resistant ceramic member 1 comprises a solid solution which is shown by the compositional formula: Al 2(1-x) Fe 2x TiO 5 (wherein 0.4≤x≤0.9) and in which the content of other metal components except Al, Fe, Ti and O is ≤1.0 mass% in terms of metal oxides. Thereby, the heat-resistant ceramic member 1 which has no partial erosion and which is excellent in heat resistance and heat decomposition resistance can be provided. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种不具有部分侵蚀并且具有高耐热性和高耐热分解性的耐热陶瓷构件。解决方案：耐热陶瓷构件1包括由以下组成式表示的固溶体：Al 2（1-x） Fe 2x TiO SB > 5 （其中0.4≤x≤0.9），其中除Al，Fe，Ti和O之外的其它金属组分的含量以金属氧化物计≤1.0质量％。因此，可以提供不具有部分侵蚀并且耐热性和耐热分解性优异的耐热陶瓷构件1。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2006156522A Wiring board and its manufacturing method 有权
标题翻译：接线板及其制造方法
公开(公告)号：JP2006156522A
公开(公告)日：2006-06-15
申请号：JP2004341658
申请日：2004-11-26
申请人： Kyocera Corp , 京セラ株式会社
发明人： SHIGEOKA TOSHIAKI
IPC分类号： H05K1/09 , H01L23/13 , H01L23/15 , H05K3/12
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive wiring board that is insensitive to the change of a baking atmosphere and can be manufactured easily, and to provide a method of manufacturing the board.
SOLUTION: In the wiring board 1 provided with an insulating layer 3a and a wiring layer 5 formed by simultaneously baking with the insulating layer 3a, the metal of the wiring layer 5 contains P.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种廉价的布线板，其对烘烤气氛的变化不敏感，并且可以容易地制造，并且提供一种制造该板的方法。解决方案：在具有由绝缘层3a同时烘烤形成的绝缘层3a和布线层5的布线板1中，布线层5的金属包含（C）2006 ，JPO＆NCIPI

3. 发明专利

JP2005210031A Wiring substrate 审中-公开
标题翻译：接线基板
公开(公告)号：JP2005210031A
公开(公告)日：2005-08-04
申请号：JP2004017595
申请日：2004-01-26
申请人： Kyocera Corp , 京セラ株式会社
发明人： HORIUCHI NOBUOKI , SHIGEOKA TOSHIAKI
IPC分类号： H05K1/09 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To reduce a substrate curvature by calcination without reducing conductivity, plating nature, and the appearance of a metallize wiring layer and with adhesive strength between the metallize wiring layer and an insulating substrate maintained in a wiring substrate, comprising the insulating substrate and the metalize wiring layer formed on the front surface or in the interior portion of the insulating substrate. SOLUTION: In a wiring substrate comprising an insulating substrate and a metallize wiring layer formed on the front surface or in the interior portion of the insulating substrate, the metallize wiring layer is joined to the insulating substrate via an insulating wiring pattern layer formed in the form of a wiring pattern. A metal component in the metallize wiring layer is spread and distributed in the insulating wiring pattern layer. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：通过煅烧而不降低导电性，电镀性质和金属化布线层的外观以及金属布线层和保持在布线基板中的绝缘基板之间的粘合强度来降低基板曲率，包括绝缘基板和形成在绝缘基板的前表面或内部的金属化布线层。解决方案：在包括绝缘基板和形成在绝缘基板的前表面或内部的金属布线层的布线基板中，金属化布线层通过形成的绝缘布线图案层与绝缘基板接合以布线图案的形式。金属化布线层中的金属成分扩散并分布在绝缘布线图案层中。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2004235346A Manufacturing method of multilayer wiring board 审中-公开
标题翻译：多层布线板的制造方法
公开(公告)号：JP2004235346A
公开(公告)日：2004-08-19
申请号：JP2003020862
申请日：2003-01-29
申请人： Kyocera Corp , 京セラ株式会社
发明人： KIMURA TETSUYA , TAMI YASUHIDE , HAMANO SATOSHI , SHIGEOKA TOSHIAKI
IPC分类号： C04B35/64 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer wiring board of fine wiring, low resistance, and high dimensional precision. SOLUTION: A wiring circuit layer 3 is formed on the surface of a ceramic green sheet, and the green sheets 1 are laminated in a plurality of numbers. After a restrictive sheet 5 whose main component is the ceramic material which is hard to be sintered is laminated at least on one surface of the laminate, the laminate is sintered at or below the temperature of the melting point of the wiring circuit layer. The restrictive sheet 5 is removed by blasting the compressed air containing water-soluble abrasive particles. COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供一种精细布线，低电阻和高尺寸精度的多层布线板的制造方法。解决方案：在陶瓷生片的表面上形成布线电路层3，并且生片1以多个层叠。在主要成分是难以烧结的陶瓷材料的限制性片材5之间层叠在层叠体的至少一个表面上之后，层叠体在布线电路层的熔点或以下的温度下烧结。通过喷射含有水溶性磨料颗粒的压缩空气除去限制片5。版权所有（C）2004，JPO＆NCIPI

5. 发明专利

JP2004165601A Conductive paste composition and manufacturing methods of multi-level interconnection substrate which uses the same 审中-公开
公开(公告)号：JP2004165601A
公开(公告)日：2004-06-10
申请号：JP2003083763
申请日：2003-03-25
申请人： Kyocera Corp , 京セラ株式会社
发明人： FURUKUBO YOJI , SHIGEOKA TOSHIAKI , TAMI YASUHIDE , KIMURA TETSUYA , HAMANO SATOSHI
IPC分类号： H05K3/40 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a copper paste composition for forming a via conductor, superior in thermal decomposition characteristics for an organic binder and superior in adhesion properties with an interconnection circuit layer, such as a metal foil, and to provide a multi-level interconnection substrate which uses the composition. SOLUTION: A metal foil is bonded on a surface of a specified copy base 13 and is worked into a prescribed circuit pattern, to form the interconnection circuit layer 15. A through-hole, formed in a prescribed ceramic green sheet 11, is filled with a conductive paste containing a low-resistor metal to form a via conductor 12. The interconnection circuit layer 15, on the surface of the copy base 13 is transferred to the green sheet 11 for calcination. In this case, the conductive paste comprises low-resistor metal powder, the organic binder and a solvent, and 20-100 mass% organic binder contains nitrocellulose by, and 0-80 mass% methacrylic resin and acrylic resin. COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2003163456A METHOD FOR MANUFACTURING MULTILAYER WIRING BOARD 审中-公开
公开(公告)号：JP2003163456A
公开(公告)日：2003-06-06
申请号：JP2001363635
申请日：2001-11-29
申请人： KYOCERA CORP
发明人： SHIGEOKA TOSHIAKI , HAMANO SATOSHI , KIMURA TETSUYA
IPC分类号： H05K3/20 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To prevent oxidation of a surface of a metal foil when a circuit pattern is formed by using the metal foil and reduce contact resistance with viahole conductor. SOLUTION: The metal foil wherein an oxidation preventing film 15 constituted of a metal layer whose thickness is 0.003 to 1 μm and main component is anyone out of Ag, Ni, Zn, Sn, Cr, Pb and Al is formed on at least a surface side which is in contact with air is stuck on a surface of prescribed transfer material 14 and worked to prescribed circuit patterns, and wiring circuit layers 17a, 17b are formed. After the oxidation preventing films 15 on surfaces of the wiring circuit layers 17a, 17b are eliminated, the circuit patterns are transferred to green sheets 11 containing prescribed ceramic component. The green sheets 11a, 11b on which the circuit patterns are transferred are laminated and baked. COPYRIGHT: (C)2003,JPO

7. 发明专利

JP2003152337A METHOD OF MANUFACTURING MULTILAYER WIRING BOARD 审中-公开
公开(公告)号：JP2003152337A
公开(公告)日：2003-05-23
申请号：JP2001352823
申请日：2001-11-19
申请人： KYOCERA CORP
发明人： HAMANO SATOSHI , SHIGEOKA TOSHIAKI , KIMURA TETSUYA , TAMI YASUHIDE
IPC分类号： C04B35/64 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer wiring board whose surface layer can be prevented from varying in thickness even after a constraining sheet is removed. SOLUTION: A constraining green sheet 3 contains ceramic powder, and the same coloring agent is contained in both a glass ceramic green sheet 1 and the constraining green sheet 3.

8. 发明专利

JP2002016176A WIRING BOARD AND CONNECTION STRUCTURE THEREFOR 失效
公开(公告)号：JP2002016176A
公开(公告)日：2002-01-18
申请号：JP2000197266
申请日：2000-06-29
申请人： KYOCERA CORP
发明人： HAMANO SATOSHI , TOMISAKO MASAHIRO , SHIGEOKA TOSHIAKI , KODAMA KAZUYOSHI
IPC分类号： H01L23/12 , H01L21/60 , H01P1/04
摘要： PROBLEM TO BE SOLVED: To provide a wiring board provided with high connection strength and stability with high connection reliability by an Au ribbon with another external electric circuit even after mounting a semiconductor element by brazing metal filler of Au-Sn or the like and the connection structure. SOLUTION: On this wiring board A composed by attaching and forming a wiring circuit layer 2 whose main component is Cu on at least the surface of an insulation substrate 1 composed of a glass ceramic sinter, a connection pad 7 for connecting the other electric circuit by the Au ribbon 8 is provided on the end part of the wiring board A. The connection pad 7 is composed by successively forming an Ni plated film 7b with the thickness of 1-6 μm and an Au plated film 7c with the thickness of 1.5 μm or more on the surface of a conductor layer 7a whose main component is Cu. The width x of the connection pad 7 connected with the Au ribbon 8 is made larger than the width y of the connected Au ribbon 8 for 20 μm or more.

9. 发明专利

JP2002016170A WIRING BOARD FOR MOUNTING SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JP2002016170A
公开(公告)日：2002-01-18
申请号：JP2000197263
申请日：2000-06-29
申请人： KYOCERA CORP
发明人： SHIGEOKA TOSHIAKI , HAMANO SATOSHI , TOMISAKO MASAHIRO , KODAMA KAZUYOSHI , KAWAI SHINYA
IPC分类号： H05K1/02 , H01L23/12 , H01L23/14 , H01L23/15
摘要： PROBLEM TO BE SOLVED: To provide a wiring board with improved heat radiation in a simple and miniaturized structure in the wiring board for mounting semiconductor elements of a flip chip type. SOLUTION: In this wiring board for mounting semiconductor elements, which is composed by providing a mounting part A for flip chip mounting the semiconductor element 2 on one surface of a ceramic insulation substrate 1 composed by forming a wiring circuit layer 6 on a surface and in the inside, an insulation layer right below the semiconductor element mounting part A in the insulation substrate 1 is formed of a highly conductive insulation layer 9 provided with heat conductivity higher than the other insulation layers. Also, a vertical heat conductor 10 is formed so as to pass through the insulation substrate 1 in a vertical direction and the highly heat conductive insulation layer 9 and the vertical heat conductor 10 are connected in an area other than the semiconductor element mounting part A.

10. 发明专利

JP2010228935A Porous ceramic member and filter 有权
标题翻译：多孔陶瓷和过滤器
公开(公告)号：JP2010228935A
公开(公告)日：2010-10-14
申请号：JP2009075746
申请日：2009-03-26
申请人： Kyocera Corp , 京セラ株式会社
发明人： TATEYAMA TAIJI , SHIGEOKA TOSHIAKI , NISHIKAWA YUSUKE , KOSAKA SHOJI
IPC分类号： C04B35/46 , B01D39/20 , C04B38/00
摘要： PROBLEM TO BE SOLVED: To provide a porous ceramic member where heat resistance is enhanced and a filter.
SOLUTION: In the porous ceramic member where crystal particles consisting of an aluminum titanate-type crystal containing Al, Ti, Mg and O are joined respectively with an amorphous material containing Si, vicinities 13b of particles and an intermediate part 13a between the vicinities 13b of the particles in an amorphous phase 13 consisting of the amorphous material between the crystal particles 11 contain Si, Al, Ti, Mg and O and the content of Al in the intermediate part 13a of the amorphous phase 13 is smaller than that in the vicinity 13b of the particles.
COPYRIGHT: (C)2011,JPO&INPIT

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