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1. 发明专利

JP2009177217A Method for manufacturing multi-layer printed wiring board 有权
标题翻译：制造多层印刷线路板的方法
公开(公告)号：JP2009177217A
公开(公告)日：2009-08-06
申请号：JP2009117373
申请日：2009-05-14
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： SHIRAI SEIJI , SHIMADA KENICHI , ASAI MOTOO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a multi-layer printed wiring board capable of preventing warping from occurring and attaining high density. SOLUTION: Since via-holes 50, 70 and 90 are filled with a soldering material, an area of the interlayer resin insulating layer 60 disposed directly above the via-hole 50 of the lower interlayer resin insulating layer 40 can be made smooth. Thus, a conductor circuit 72 for connecting the via-hole 50 of the lower layer to the via-hole of the upper layer can be placed, at a position directly above the via-hole 50 which has been a dead space in a prior art, resulting in a high-density multi-layer printed wiring board. Moreover, since the via-holes 50, 70 and 90 are arranged in a crank shape, they are not localized. For this reason, the multi-layer printed wiring board 10 has property of preventing warpage from occurring therein, and superior mounting reliability in mounting IC chips, and the like, thereon. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种能够防止翘曲发生并实现高密度的多层印刷线路板的制造方法。解决方案：由于通孔50,70和90填充有焊接材料，所以可以使下层层间树脂绝缘层40的通孔50正上方的层间树脂绝缘层60的面积平滑。因此，用于将下层的通孔50连接到上层的通路孔的导体电路72可以放置在现有技术中已经是死空间的通路孔50正上方的位置，产生高密度多层印刷线路板。此外，由于通孔50,70和90布置成曲柄形，所以它们不是局部化的。因此，多层印刷电路板10具有防止翘曲发生的特性，在其上安装IC芯片等的优良的安装可靠性。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2009038390A Method for manufacturing multilayer printed wiring board 审中-公开
标题翻译：制造多层印刷线路板的方法
公开(公告)号：JP2009038390A
公开(公告)日：2009-02-19
申请号：JP2008250777
申请日：2008-09-29
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： SHIRAI SEIJI , SHIMADA KENICHI , ASAI MOTOO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To propose a method for manufacturing a multilayer printed wiring board having filled via structure and advantageous for forming a fine pattern.
SOLUTION: The multilayer printed wiring board includes alternately stacked conductor circuit and interlayer resin insulating layer. Manufacturing steps of the multilayer printed wiring board include at least the following (1)-(6) steps: (1) a step to form a lower layer conductor circuit on a substrate; (2) a step to form an interlayer resin insulating layer coating the lower layer conductor circuit, and to form an opening part to reach the lower layer conductor circuit; (3) a step to form a nonelectrolytic plated film on a surface of the interlayer resin insulating layer; (4) a step to form a plating resist; (5) a step to form a conductor layer by applying electrolytic plating; and (6) a step to remove the plating resist, and also to remove the nonelectrolytic plated film beneath the plating resist. Thickness of the upper layer conductor circuit is less than the half of the via hole diameter, and less than 25 μm.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提出一种具有填充通孔结构并有利于形成精细图案的多层印刷线路板的制造方法。解决方案：多层印刷线路板包括交替堆叠的导体电路和层间树脂绝缘层。多层印刷线路板的制造步骤至少包括以下（1） - （6）步骤：（1）在基板上形成下层导体电路的步骤; （2）形成涂覆下层导体电路的层间树脂绝缘层的步骤，形成到下层导体电路的开口部分; （3）在层间树脂绝缘层的表面形成非电解电镀膜的工序; （4）形成电镀抗蚀剂的工序; （5）通过电镀法形成导体层的步骤; 和（6）除去电镀抗蚀剂的步骤，以及除去电镀抗蚀剂下面的非电解镀膜。上层导体电路的厚度小于通孔直径的一半，小于25μm。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008306201A Multilayer printed wiring board and manufacturing method therefor 有权
标题翻译：多层印刷线路板及其制造方法
公开(公告)号：JP2008306201A
公开(公告)日：2008-12-18
申请号：JP2008188269
申请日：2008-07-22
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： O TOUTO , ASAI MOTOO , SHIMADA KENICHI
IPC分类号： H05K3/46
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board that readily allows formation of a fine pattern and is superior in adhesiveness, between an interlayer resin insulating layer and a conductor circuit, in signal propagation properties in a high-frequency band and solder heat resistance properties, and superior in substrate warpage and crack resistance characteristics. SOLUTION: The multilayer printed wiring board includes a lower interlayer resin insulating layer formed on a core substrate, while coating a lower layer conductor circuit; an upper layer conductor circuit formed on the lower interlayer resin insulating layer; and an upper interlayer resin insulating layer, formed on the lower interlayer resin insulating layer, while coating the upper layer conductor circuit. On at least a part of the surface of the upper layer conductor circuit, there is formed a metal layer constituted of one or more metals selected from among Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Os, Ir, Pt, Au, Rf, Db, Sg, Bh, Hs, Mt, Ds, Rg, Al, and Sn. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种能够容易地形成精细图案并且在层间树脂绝缘层和导体电路之间的粘合性，优异的高频带的信号传播特性的多层印刷布线板和焊料耐热性，并且具有优异的基板翘曲和抗裂特性。解决方案：多层印刷线路板包括在芯基板上形成的下层层间树脂绝缘层，同时涂覆下层导体电路; 形成在下层层间树脂绝缘层上的上层导体电路; 以及上层层间树脂绝缘层，形成在下层层间树脂绝缘层上，同时涂覆上层导体电路。在上层导体电路的表面的至少一部分上，形成由选自Ti，V，Cr，Mn，Fe，Co，Ni，Zr，Nb，Mo中的一种以上的金属构成的金属层， Tc，Ru，Rh，Pd，Ag，Hf，Ta，W，Re，Os，Ir，Pt，Au，Rf，Db，Sg，Bh，Hs，Mt，Ds，Rg，Al和Sn。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2008294459A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2008294459A
公开(公告)日：2008-12-04
申请号：JP2008181170
申请日：2008-07-11
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： O TOUTO , SEKINE KOJI , ASAI MOTOO , SHIMADA KENICHI
IPC分类号： H05K3/46 , H05K1/03
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board having a resin interlayer dielectric layer excellent in reliability of connection of conductor circuits with each other, because dielectric constant and dielectric loss tangent are small, a signal delay and a signal error scarcely occur, and mechanical characteristics are excellent. SOLUTION: The multilayer printed wiring board includes a lower layer conductor circuit 4 formed on a substrate 1, a lower layer-resin interlayer dielectric layer 2 formed on the substrate and lower layer conductor circuit, an upper layer-conductor circuit 5 formed on the lower layer-resin interlayer dielectric layer, and an upper layer-resin interlayer dielectric layer formed on the lower layer-resin interlayer dielectric layer and upper layer conductor circuit, and is configured by connecting these conductor circuits through a via hole 7, wherein the upper layer-resin interlayer dielectric layer and lower layer-resin interlayer dielectric layer are formed of thermosetting cycloolefin based resin. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种具有彼此连接导体电路的可靠性优异的树脂层间绝缘层的多层印刷布线板，因为介电常数和介电损耗角正切较小，信号延迟和信号误差几乎不发生，机械特性优异。＆lt; P＆gt;解决方案：多层印刷线路板包括形成在基板1上的下层导体电路4，形成在基板上的下层树脂层间电介质层2和下层导体电路，形成上层导体电路5 在下层树脂层间绝缘层和下层树脂层间绝缘层和上层导体电路上形成的上层树脂层间绝缘层，通过通孔7连接这些导体电路，其中，上层树脂层间电介质层和下层树脂层间电介质层由热固性环烯烃类树脂形成。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2008288623A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2008288623A
公开(公告)日：2008-11-27
申请号：JP2008228039
申请日：2008-09-05
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： O TOUTO , SHIMADA KENICHI , ASAI MOTOO
IPC分类号： H05K3/46 , H05K3/38
摘要： PROBLEM TO BE SOLVED: To make a proposal of a multilayer printed wiring board which prevents peeling off between a conductor circuit and an interlayer resin insulating layer even under a heat cycle condition, and reduction in noise in a high-frequency band signal can be realized.
SOLUTION: In the multilayer printed wiring board, inner-layer conductor circuits are formed on both sides of a substrate, the inner-layer conductor circuits are electrically connected via a through hole formed in the substrate, and an external-layer conductor circuit is formed on an interlayer resin insulating layer which is deposited on the inner-layer conductor circuit. The interlayer resin insulating layer is composed of an adhesive layer located on the side being in contact with the inner-layer conductor circuit on the substrate and an insulating layer provided on the adhesive layer, wherein the thickness of the adhesive layer is set to not lower than 1 μm and less than 50 μm, the thickness of the adhesive layer is set to not lower than 5% and less than 30% of the entire thickness of the interlayer resin insulating layer, and the adhesive layer is formed to a concavo-convex shape in accordance with a surface shape of the inner-layer conductor-circuit formation substrate.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提出即使在热循环条件下也能够防止在导体电路与层间树脂绝缘层之间剥离的多层印刷布线板，并且降低高频带信号中的噪声可以实现。解决方案：在多层印刷线路板中，在基板的两侧形成内层导体电路，内层导体电路经由形成于基板的通孔与外层导体电路形成在沉积在内层导体电路上的层间树脂绝缘层上。层间树脂绝缘层由位于与基板上的内层导体电路接触的一侧的粘合层和设置在粘合剂层上的绝缘层构成，其中粘合剂层的厚度设定为不下降不到1μm，小于50μm时，粘合剂层的厚度设定为不低于层间树脂绝缘层的整个厚度的5％且小于30％，并且粘合剂层形成为凹凸根据内层导体电路形成基板的表面形状形状。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2008263222A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2008263222A
公开(公告)日：2008-10-30
申请号：JP2008163431
申请日：2008-06-23
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： ASAI MOTOO , SEGAWA HIROSHI , NODA KOTA , KARIYA TAKASHI
IPC分类号： H05K3/46 , H05K3/28
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board capable of reducing the number of buildup layers by forming a high-density through-hole on a core substrate.
SOLUTION: The front side of a buildup layer 90A and the rear side of the buildup layer 90B are connected via a through-hole 16 formed on a core substrate 30. The through-hole 16 is filled up with filler 22, and a conductor layer 26a is formed so that the exposed surface of the filler 22 from the through-hole 16 may be covered. Then, a via hole 60 on the side of an upper layer is connected to the conductor layer 26a. Finally, the number of the buildup layers can be reduced by forming a high-density through-hole on the core substrate, and it can be achieved by making the land pattern of the through-hole 16 circular, which can be made possible by forming the conductor layer 26a in a circular fashion.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供能够通过在芯基板上形成高密度通孔来减少堆积层数的多层印刷线路板。解决方案：堆积层90A的前侧和积聚层90B的后侧经由形成在芯基板30上的通孔16连接。通孔16填充有填充物22，并且形成导体层26a，从而可以覆盖填充物22从通孔16露出的表面。然后，上层侧的通孔60与导体层26a连接。最后，通过在芯基板上形成高密度的通孔可以减少积累层的数量，并且可以通过使通孔16的焊盘图案形成圆形，这可以通过形成导体层26a以圆形方式。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2008252146A Multilayer printed wiring board and its manufacturing method 审中-公开
标题翻译：多层印刷线路板及其制造方法
公开(公告)号：JP2008252146A
公开(公告)日：2008-10-16
申请号：JP2008188271
申请日：2008-07-22
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： O TOUTO , ASAI MOTOO , SHIMADA KENICHI
IPC分类号： H05K3/46 , H05K3/24
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To propose a multilayer printed wiring board of which adhesive property between an interlayer resin insulating film and a conductor circuit, formability of a fine pattern, signal propagating property in a high frequency band width, solder dip resistance, and further warping resistance and crack resistance for its substrate are excellent, and its manufacturing method. SOLUTION: In the multilayer printed wiring board constituted by interlayer resin insulating layers and conductor circuits alternatively laminated on the both sides of the substrate, the conductor circuit on the top side and the conductor circuit on the bottom side are connected through via-holes. The multilayer printed wiring board is manufactured by forming a metal layer on at least a part of the surface of the conductor circuit on the top side or the bottom side, which is provided with one or more metals selected from Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Os, Ir, Pt, Au, Rf, Db, Sg, Bh, Hs, Mt, Ds, Rg, Al, and Sn. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提出一种层间树脂绝缘膜和导体电路之间的粘合性的多层印刷布线板，精细图案的成形性，高频带宽的信号传播性，耐焊锡浸渍性，并且其基板的进一步的抗翘曲性和抗裂性优异，且其制造方法。解决方案：在层叠树脂绝缘层和交替层压在基板两侧的导体电路构成的多层印刷线路板中，顶侧的导体电路和底侧的导体电路通过通孔连接，孔。多层印刷线路板通过在上侧或下侧的导体电路的表面的至少一部分上形成金属层而制造，该金属层设置有选自Ti，V，Cr，Mn中的一种以上的金属，Fe，Co，Ni，Zr，Nb，Mo，Tc，Ru，Rh，Pd，Ag，Hf，Ta，W，Re，Os，Ir，Pt，Au，Rf，Db，Sg，Bh，Hs，Mt ，Ds，Rg，Al和Sn。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2008118162A Printed wiring board 审中-公开
标题翻译：印刷线路板
公开(公告)号：JP2008118162A
公开(公告)日：2008-05-22
申请号：JP2008017198
申请日：2008-01-29
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： HIROSE NAOHIRO , ASAI MOTOO
IPC分类号： H01L23/12 , H05K3/34 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board capable of enhancing connection reliability of a solder pad. SOLUTION: An opening 71 of a solder resist layer 70 is formed such that the opening 71 overlaps a peripheral portion of a solder pad 75 by 5 μm and overlapping thickness thereof is 20 μm; and therefore, the solder pad 75 does not come off from an interlayer insulating layer 150 and the connection reliability is improved. Furthermore, since the solder pad 75 is closely adhered to the solder resist layer 70, the underlying interlayer insulating layer 150 hardly cracks. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供能够提高焊盘的连接可靠性的印刷线路板。解决方案：阻焊层70的开口71形成为使得开口71与焊盘75的周边部分重叠5μm，重叠厚度为20μm; 因此，焊盘75不会从层间绝缘层150脱落，连接可靠性提高。此外，由于焊料焊盘75紧密地粘附到阻焊层70，所以下面的层间绝缘层150几乎不会破裂。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2007251190A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2007251190A
公开(公告)日：2007-09-27
申请号：JP2007121229
申请日：2007-05-01
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： SHIMADA KENICHI , NODA KOTA , ASAI MOTOO
IPC分类号： H05K1/11 , H05K3/46 , H05K3/38 , H05K3/40 , H05K3/42
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board which easily achieves high density wiring, and advantageously suppresses the occurrence of peeling or cracks, diffusion of metal ion in a filler, and corrosion of the filler by the laser beam. SOLUTION: In this multilayer printed wiring board having such a structure that a conductive circuit is formed on a substrate through a resin insulating interlayer, a through-hole is provided in the substrate, and the through-hole is filled with filler, a conductive layer is formed, which covers a surface the filler exposed from the through-hole directly above the through-hole and is made of an electroless plating film and an electrolytic plating film on the electroless plating film, and a roughened layer is formed on an inner wall of the through-hole. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种容易实现高密度布线的多层印刷布线板，并且有利地抑制了金属离子在填料中的剥离或裂纹扩散，以及填料的腐蚀。解决方案：在具有通过树脂绝缘中间层在基板上形成导电电路的结构的多层印刷布线板中，在基板中设置通孔，并且通孔填充有填充物，形成导电层，其覆盖从通孔正上方的通孔露出的填料的表面，并且在化学镀膜上由化学镀膜和电解镀膜构成，并且在粗糙化层上形成粗糙层通孔的内壁。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2007251189A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2007251189A
公开(公告)日：2007-09-27
申请号：JP2007121225
申请日：2007-05-01
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： ASAI MOTOO , KARIYA TAKASHI , SHIMADA KENICHI , SEGAWA HIROSHI
IPC分类号： H05K3/46 , H05K1/11 , H05K3/40
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board in which electric connection with an inner layer circuit in a core substrate can sufficiently be secured through a through hole, even if the core substrate is divided into multiple layers and which is advantageous for the high density of the through holes. SOLUTION: In the multilayer printed wiring board, a built-up wiring layer where interlayer resin insulating layers and conductor layers are alternately laminated and the conductor layers are connected by a via hole is formed on the multilayer core substrate having the conductor layers on an inner layer. The through hole is formed in the multilayer core substrate. The through hole is filled with a filling material and the conductor layer covering the face of the filling material exposed from the through hole is formed. The conductor layer is composed of a nonelectrolytic plating film and an electrolytic plating film on the nonelectrolytic plating film. The via hole is connected to the conductor layer. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种多层印刷线路板，其中与核心基板中的内层电路的电连接可以通过通孔充分地固定，即使芯基板被分成多层并且是有利于通孔的高密度。解决方案：在多层印刷线路板中，在具有导体层的多层芯基板上形成层间树脂绝缘层和导体层交替层叠并且导体层通过通孔连接的积层布线层在内层。通孔形成在多层芯基板中。通孔填充有填充材料，并且形成覆盖从通孔露出的填充材料的表面的导体层。导体层由非电解镀膜和非电解镀膜上的电解镀膜构成。通孔连接到导体层。版权所有（C）2007，JPO＆INPIT

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