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1. 发明专利

JP2002368023A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2002368023A
公开(公告)日：2002-12-20
申请号：JP2001170968
申请日：2001-06-06
申请人： Hitachi Ltd , Hitachi Tokyo Electronics Co Ltd , 日立東京エレクトロニクス株式会社 , 株式会社日立製作所
发明人： TAKANO RYUICHI , MAKI HIROSHI , MAKITA YOSHIAKI
IPC分类号： H01L21/52
CPC分类号： H01L24/743 , H01L2224/743 , H01L2924/14 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To properly supply a resin film to a pellet bonding area.
SOLUTION: Before a collet 33 transfers the resin film 6 to a land 13, the angle of inclination with reference to the land 13 of the resin film 6 is corrected so as to align the resin film 6 with the land 13. A suction port 35 in the collet 33 is opened and formed on the conical surface of a suction face 34, and a folding part 8 due to the suction of the suction port 35 is formed in the peripheral part of the resin film 6 so as to prevent an airtight space from being formed in the contact face of the resin film 6 with the land 13 due to the folding part 8. When the resin film 6 is thermocompression-bonded to the land 13 by a pressure tool 44, air or gas inside a space formed in the peripheral part of the resin film 6 and the land 13 is evacuated to around the center, and a phenomenon that a void is generated in a bonding layer 7 is prevented. Consequently, the resin film is prevented from being hooked on an internal terminal, and a proper wire bonding operation is ensured. Generation of the void in the bonding layer is prevented, and a crack can be prevented.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：将树脂膜适当地供应到颗粒粘合区域。解决方案：在夹头33将树脂膜6转移到台肩13之前，修正相对于树脂膜6的台肩13的倾斜角度，以将树脂膜6与台肩13对准。吸入口35 夹头33被打开并形成在吸入面34的锥形表面上，并且在树脂膜6的周边部分形成有由于吸入口35的吸引而产生的折叠部8，以防止气密空间在树脂膜6的接触面上由于折叠部分8而在接合面13上形成。当树脂膜6通过压力工具44热压粘合到焊盘13上时，空气或气体形成在树脂膜6的周边部分和焊盘13被抽气到中心附近，并且防止了在接合层7中产生空隙的现象。因此，防止树脂膜钩在内部端子上，并且确保了适当的引线接合操作。防止了粘合层中的空隙的产生，可以防止裂缝。

2. 发明专利

JP2003068774A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2003068774A
公开(公告)日：2003-03-07
申请号：JP2001253203
申请日：2001-08-23
申请人： Hitachi Ltd , Hitachi Tokyo Electronics Co Ltd , 日立東京エレクトロニクス株式会社 , 株式会社日立製作所
发明人： TAKANO RYUICHI , HOSONO AKISHI
IPC分类号： H01L21/52
CPC分类号： H01L24/743 , H01L2224/743 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To reduce defective products due to a cobwebbing phenomenon of an adhesive or the like in a pellet bonding process.
SOLUTION: In an applying process of a paste such as an adhesive 40 prior to the pellet bonding process, after the adhesive 40 is applied from a paste nozzle 13 onto a tab 21 of a lead frame 20, the paste nozzle 13 is raised as it is rotated so that a cobwebbing part 41 due to the viscosity of the adhesive 40 is surely wrung off to prevent generation of a application failure or a bonding failure caused by falling or scattering of the cobwebbing part 41.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了在丸粒接合工艺中减少由于粘合剂等的蜘蛛网形成现象引起的缺陷产物。解决方案：在颗粒粘结工艺之前，在粘合剂40等糊料的涂布过程中，在将粘合剂40从膏状喷嘴13涂布到引线框架20的突片21上之后，将膏状喷嘴13升高旋转，使得由于粘合剂40的粘度而产生的网纹部分41被可靠地拧下，以防止由于丝网印刷部分41的下落或散射引起的施加故障或粘合失败。

3. 发明专利

JP2003068772A Method for die bonding and manufacturing method for semiconductor device 有权
标题翻译：用于半导体器件的DIE结合和制造方法的方法
公开(公告)号：JP2003068772A
公开(公告)日：2003-03-07
申请号：JP2001253204
申请日：2001-08-23
申请人： Hitachi Ltd , Hitachi Tokyo Electronics Co Ltd , 日立東京エレクトロニクス株式会社 , 株式会社日立製作所
发明人： TAKANO RYUICHI , MAKI HIROSHI , HASEBE ARIHIRO
IPC分类号： H01L21/677 , H01L21/52 , H01L21/67 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To reduce a required time and labor, and improve adjusting accuracy in a bonding tool for a pick-up operation and a positioning operation for a pick-up tool. SOLUTION: After a specific die 51 on an adhesive tape 11 is picked up by a collet 40 supported with a bonding head through a supporting shaft 41, the die is returned to the original position on the adhesive tape 11. And then, the attaching error of the collet 40 on the bonding head is automatically detected based on the displacement between a die position (x1, y1, θ1) before the pick-up and a die position (x2, y2, θ2) after the pick-up. While the attaching error of the collet 40 is automatically compensated based on the error, the die-bonding by a direct pick-up method using the collet 40 is performed.
摘要翻译：要解决的问题：为了减少所需的时间和人力，并提高用于拾取操作的接合工具和拾取工具的定位操作的调节精度。解决方案：在通过支撑轴41由粘合头支撑的夹头40拾取粘合带11上的特定模具51之后，将模具返回到胶带11上的原始位置。然后，附着误差基于拾取前的模具位置（x1，y1，θ1）和拾取后的模具位置（x2，y2，θ2）之间的位移自动地检测粘合头上的夹头40的位置。虽然基于误差自动补偿夹头40的附着误差，但是通过使用夹头40的直接拾取方法进行芯片接合。

4. 发明专利

JP2004087533A Process for producing semiconductor device and bonder for use therein 审中-公开
公开(公告)号：JP2004087533A
公开(公告)日：2004-03-18
申请号：JP2002242593
申请日：2002-08-22
申请人： Hitachi Tokyo Electronics Co Ltd , Renesas Technology Corp , 日立東京エレクトロニクス株式会社 , 株式会社ルネサステクノロジ
发明人： TAKANO RYUICHI , TANI YUKIO
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To bond two chips to the opposite sides of a carrier, e.g. a wiring board.
SOLUTION: The bonder 30 comprises a feeder 32 for pitch feeding a wiring board 20, a pickup head 77 for picking up a chip 10, a Θ-axis robot 75 for inverting the pickup head 77, a first bonding head 44 for receiving the chip 10 picked up by means of the pickup head 77 and bonding it to the lower surface of the wiring board 20, and a second bonding head 56 for receiving the chip 10 picked up and inverted by means of the pickup head 77 and bonding it to the upper surface of the wiring board 20. Two chips can thereby be bonded simultaneously to the opposite sides of the wiring board by means of the first and second bonding heads. Since a memory module having chips on the opposite sides of the wiring board can be produced by means of a single bonder, investment in plant and equipment, production cost and production time can be reduced.
COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2004140140A Manufacturing method of semiconductor device 审中-公开
公开(公告)号：JP2004140140A
公开(公告)日：2004-05-13
申请号：JP2002302691
申请日：2002-10-17
申请人： Hitachi Tokyo Electronics Co Ltd , Renesas Technology Corp , 日立東京エレクトロニクス株式会社 , 株式会社ルネサステクノロジ
发明人： TAKANO HARUYUKI , TAKANO RYUICHI , TANI YUKIO
IPC分类号： H01L21/52
摘要： PROBLEM TO BE SOLVED: To provide a technique capable of improving the bonding accuracy of a semiconductor chip in a die bonding process for bonding the semiconductor chip to a frame.
SOLUTION: The positional correction of a mount stage unit 9a and a mount head unit 9b is effected based on the recognizing information of the position of the semiconductor chip 2 and the position of the frame 17 clamped by a second frame clamper 18 installed on a frame transfer unit 9c, and further, the frame 17 is clamped by a first frame clamper 13 installed on the mount stage unit 9a. Thereafter, a mount stage 10 is elevated to a specified position and a mount tool, constituting the mount head unit 9b, is lowered to the specified position to bond the semiconductor chip 2 to the main surface of the frame 17.
COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2003086612A DIE BONDING METHOD 审中-公开
公开(公告)号：JP2003086612A
公开(公告)日：2003-03-20
申请号：JP2001279065
申请日：2001-09-14
申请人： HITACHI LTD , HITACHI TOKYO ELECTRONICS
发明人： HASEBE ARIHIRO , MAKI HIROSHI , TAKANO RYUICHI , KUSUNOKI HIDEKI
IPC分类号： H01L21/52
摘要： PROBLEM TO BE SOLVED: To improve the setting precision of reference height in the thrust mechanism of a die bonder. SOLUTION: A plate PL is kept above the thrust mechanism 2, and the collet C of a suction mechanism 1 is lowered. The collet C is brought into contact with the surface of the plate PL and a thrust needle N is gradually raised. The thrust needle N reaches the rear face of the plate PL and the plate PL is lifted. Thus, the position of the thrust needle N when the position of the collet C starts rising or when it rises by a prescribed distance is stored in the thrust mechanism 2 (die bonder) as reference height.

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