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1. 发明专利

JP2005190499A Storage subsystem and storage controller 审中-公开
标题翻译：存储子系统和存储控制器
公开(公告)号：JP2005190499A
公开(公告)日：2005-07-14
申请号：JP2005070362
申请日：2005-03-14
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： NAKAYAMA SHINICHI , YOKOHATA SHIZUO
IPC分类号： G06F12/08 , G06F3/06
摘要： PROBLEM TO BE SOLVED: To improve performance and reliability of a storage controller especially for offering high performance making the best use of high-speed data transfer brought by a fiber channel.
SOLUTION: A loop 133 is a shared loop transmission path having a fiber channel interface. HIFC 103, 104, and 105 are connected to host computers 100, 101, and 102 different in interface respectively and provided with a conversion function with the fiber channel interface if necessary. Control processors 114-117 are shared between the HIFC 103-105. The control processors 114-117 refer to FCAL management information 113 respectively, incorporate a frame having a set address from frames flowing through the loop 133, and process an input/output request within a set LUN area.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提高存储控制器的性能和可靠性，特别是提供高性能，最大限度地利用光纤通道带来的高速数据传输。解决方案：环路133是具有光纤通道接口的共享环路传输路径。 HIFC 103,104和105分别连接到不同接口的主计算机100,101和102，并且如有必要，提供具有光纤通道接口的转换功能。控制处理器114-117在HIFC 103-105之间共享。控制处理器114-117分别参考FCAL管理信息113，并入一帧，该帧具有来自流经循环133的帧的设置地址，并处理设置的LUN区域内的输入/输出请求。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2003316521A Storage controller 审中-公开
标题翻译：存储控制器
公开(公告)号：JP2003316521A
公开(公告)日：2003-11-07
申请号：JP2002120975
申请日：2002-04-23
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OGASAWARA YUTAKA , YOKOHATA SHIZUO
IPC分类号： G06F3/06 , G06F3/00 , G06F13/12
CPC分类号： G06F3/0658 , G06F3/0607 , G06F3/0689
摘要： PROBLEM TO BE SOLVED: To provide a storage unit capable of efficiently linking an NAS engine with an RAID controller. SOLUTION: The storage controller is provided with a plurality of logical devices connected to an external device to transmit/receive data, and made correspond to identifiers whose number is not more than a normal number and an input/output means for receiving a data input/output request added with the identifier from the external device, and for inputting/outputting data to the logical device made correspond to the identifier. The storage controller is provided with a plurality of identifier groups including identifiers whose number is the normal number or less, and each of those groups is applied with first ID, and the data input/output request added with the first ID and the identifier is received from the external device, and the input/output request is executed for the logical device belonging to the group specified by the first ID, and made correspond to the identifier. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供能够有效地将NAS引擎与RAID控制器连接的存储单元。解决方案：存储控制器设置有连接到外部设备的多个逻辑设备以发送/接收数据，并且对应于数量不大于正常号码的标识符和用于接收数据的输入/输出装置从外部设备添加有标识符的数据输入/输出请求，以及用于输入/输出对所述逻辑设备的数据对应于该标识符。存储控制器设置有多个标识符组，其包括标号为正常数或更小的标识符，并且这些组中的每一个被应用第一ID，并且接收到添加了第一ID和标识符的数据输入/输出请求并且对属于由第一ID指定的组的逻辑设备执行输入/输出请求，并且使其对应于该标识符。版权所有（C）2004，JPO

3. 发明专利

JP2003288270A Data verifying method, host computer, and storage controller 有权
标题翻译：数据验证方法，主机计算机和存储控制器
公开(公告)号：JP2003288270A
公开(公告)日：2003-10-10
申请号：JP2002092685
申请日：2002-03-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OHASHI KAZUNOBU , SATO TAKAO , URABE KIICHIRO , NAKANO TOSHIO , YOKOHATA SHIZUO
IPC分类号： G06F12/14 , G06F3/00 , G06F3/06 , G06F11/00 , G06F12/00 , G06F13/00 , G06F13/12 , G06F21/24 , G11C5/00
CPC分类号： G06F11/0751 , G06F3/0601 , G06F11/0727 , G06F2003/0697
摘要： PROBLEM TO BE SOLVED: To provide a data verifying method, a host computer, and a storage controller capable of more surely verifying and securing data consistency in a storage system. SOLUTION: In this data verifying method in the storage system, the host computer 20 transmits area management data specifying a storage area range of a storage means used by an application program having structure for verifying data compatibility to the storage controller 10. When the storage controller receives an input/output request transmitted from the host computer, verification carried out by the application program is performed on the received data inputted/outputted to/from the storage area specified by the area designation data among the data to be processed by the data input/output request. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供能够更可靠地验证和保护存储系统中的数据一致性的数据验证方法，主计算机和存储控制器。解决方案：在存储系统的数据验证方法中，主计算机20发送区域管理数据，该区域管理数据指定具有用于验证数据兼容性的结构的应用程序使用的存储装置的存储区域范围到存储控制器10.当存储控制器接收从主计算机发送的输入/输出请求，对由应用程序执行的验证对从由区域指定数据指定的存储区域输入/输出的接收数据执行处理的数据数据输入/输出请求。版权所有（C）2004，JPO

4. 发明专利

JP2008140413A Storage device system 审中-公开
标题翻译：存储设备系统
公开(公告)号：JP2008140413A
公开(公告)日：2008-06-19
申请号：JP2008002274
申请日：2008-01-09
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MATSUNAMI NAOTO , KITAMURA MANABU , SONODA KOJI , YOKOHATA SHIZUO
IPC分类号： G06F3/06 , G06F12/00 , G06F13/10
摘要： PROBLEM TO BE SOLVED: To reduce management operation cost by a storage device including both functions of NAS and SAN, and having flexibility in a system constitution. SOLUTION: The storage device is equipped with a plurality of interface slots capable of loading a plurality of interface control parts, a block I/O interface control part having the function of SAN loadable on the slot, a file I/O interface control part having the function of NAS, a storage capacity pool constituted of a plurality of disk devices accessible from an optional interface control part, and a storage capacity pool control part for controlling the storage capacity pool. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过包括NAS和SAN的功能的存储设备来降低管理操作成本，并且在系统结构中具有灵活性。解决方案：存储设备配备有能够加载多个接口控制部件的多个接口插槽，具有可插槽的SAN功能的块I / O接口控制部件，文件I / O接口具有NAS功能的控制部分，由可选接口控制部分可访问的多个盘装置构成的存储容量池，以及用于控制存储容量池的存储容量池控制部。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2005190498A Storage controller 有权
标题翻译：存储控制器
公开(公告)号：JP2005190498A
公开(公告)日：2005-07-14
申请号：JP2005070361
申请日：2005-03-14
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： NAKAYAMA SHINICHI , YOKOHATA SHIZUO
IPC分类号： G06F13/14 , G06F13/10
摘要： PROBLEM TO BE SOLVED: To improve performance and reliability of a storage controller especially for offering high performance making the best use of high-speed data transfer brought by a fiber channel.
SOLUTION: A loop 133 is a common loop transmission path having a fiber channel interface. HIFC 103, 104, and 105 are connected to host computers 100, 101, and 102 different in interface respectively and provided with a conversion function with the fiber channel interface if necessary. Control processors 114-117 are shared between the HIFC 103-105. The control processors 114-117 refer to FCAL management information 113 respectively, incorporate a frame having a set address from frames flowing through the loop 133, and process an input/output request within a set LUN area.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提高存储控制器的性能和可靠性，特别是提供高性能，最大限度地利用光纤通道带来的高速数据传输。解决方案：环路133是具有光纤通道接口的公共环路传输路径。 HIFC 103,104和105分别连接到不同接口的主计算机100,101和102，并且如有必要，提供具有光纤通道接口的转换功能。控制处理器114-117在HIFC 103-105之间共享。控制处理器114-117分别参考FCAL管理信息113，并入一帧，该帧具有来自流经循环133的帧的设置地址，并处理设置的LUN区域内的输入/输出请求。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2004021556A Memory control device and control process thereof 审中-公开
公开(公告)号：JP2004021556A
公开(公告)日：2004-01-22
申请号：JP2002174944
申请日：2002-06-14
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MUROTANI AKIRA , NAKANO TOSHIO , YOKOHATA SHIZUO , TAKAMOTO KENICHI
IPC分类号： G06F11/16 , G06F3/06 , G06F11/00 , G06F11/07 , G06F11/20 , G06F11/30 , G06F12/08 , G06F13/12
CPC分类号： G06F11/0775 , G06F11/0727 , G06F11/0757 , G06F12/0866
摘要： PROBLEM TO BE SOLVED: To provide a memory control device which efficiently manages mobile information, using an internal communication channel, realizes a low-cost monitoring function of the mobile information, has high performance and reliability, and is easy to construct.
SOLUTION: The memory control device comprises: a plurality of control parts which receive a input and output requirement input through an external communication channel and send a data input and output instruction to a memorizing means; an internal communication channel for the input and output instruction and performing input and output of data between the control parts; and an monitoring means in which the control parts mutually monitor operation status thereof by sending own operation status to the other control parts through the internal communication channel.
COPYRIGHT: (C)2004,JPO

7. 发明专利

JP2003316713A Storage device system 审中-公开
标题翻译：存储设备系统
公开(公告)号：JP2003316713A
公开(公告)日：2003-11-07
申请号：JP2002125172
申请日：2002-04-26
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： MATSUNAMI NAOTO , KITAMURA MANABU , SONODA KOJI , YOKOHATA SHIZUO
IPC分类号： G06F13/12 , G06F3/06 , G06F11/20 , G06F12/00 , G06F12/14 , G06F13/14 , G06F21/24 , H04L29/08
CPC分类号： G06F3/0605 , G06F3/0604 , G06F3/0631 , G06F3/0632 , G06F3/067 , G06F11/2089 , G06F12/0866 , H04L67/1097 , Y10S707/99932 , Y10S707/99933 , Y10S707/99934 , Y10S707/99942 , Y10S707/99943
摘要： PROBLEM TO BE SOLVED: To reduce the management operation cost with a storage device which incorporates both NAS function and SAN function and has the degree of freedom in system constitution.
SOLUTION: This storage device system is provided with a plurality of interface slots to which a plurality of interface controllers can be loaded, a block I/O interface controller having the SAN function capable of being loaded to the slot, a file I/O interface controller having the NAS function, a storage capacity pool composed of a plurality of disk devices capable of being accessed from an arbitrary interface controller, and a storage capacity pool controller which controls the storage capacity pool.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：通过结合NAS功能和SAN功能的存储设备来降低管理操作成本，并具有系统构成的自由度。解决方案：该存储设备系统具有可以加载多个接口控制器的多个接口槽，具有能够加载到该槽的SAN功能的块I / O接口控制器，文件I 具有NAS功能的/ O接口控制器，由能够从任意接口控制器访问的多个磁盘装置构成的存储容量池和控制存储容量池的存储容量池控制器。版权所有（C）2004，JPO

8. 发明专利

JP2004206496A Storage system and data backup method for the same 有权
公开(公告)号：JP2004206496A
公开(公告)日：2004-07-22
申请号：JP2002375857
申请日：2002-12-26
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KOBAYASHI NAOTAKA , YOKOHATA SHIZUO
IPC分类号： G06F3/06 , G06F11/14 , G06F12/00 , G06F12/16 , H04L29/08
CPC分类号： G06F3/0611 , G06F3/0631 , G06F3/065 , G06F3/067 , G06F11/1456 , G06F11/1458 , H04L67/1097
摘要： PROBLEM TO BE SOLVED: To efficiently and quickly back up data in a backup device. SOLUTION: A network adapter has ports connected to a LAN, a NAS processor and I/O processors. On a file access request via a port, the NAS processor commands access data stored in a storage device and commands a backup of the data stored in the storage device. An I/O processor transfers the access to the data stored in the storage device to a cache memory and transfers the command to back up the data stored in the storage device to a shared memory. A channel adapter has ports and I/O processors. The ports are connected to devices for storing backup data. In response to the backup command from the network adapter, an I/O processor sends the data stored in the storage device to a device for storing backup data. COPYRIGHT: (C)2004,JPO&NCIPI

9. 发明专利

JPH08221349A CONTROL METHOD FOR COMPUTER SYSTEM 失效
公开(公告)号：JPH08221349A
公开(公告)日：1996-08-30
申请号：JP3043895
申请日：1995-02-20
申请人： HITACHI LTD
发明人： NAKANO MASAO , YOKOHATA SHIZUO , IDO KENJI
IPC分类号： G06F13/14 , G06F15/16 , G06F15/177
摘要： PURPOSE: To provide a control method without the deviation of processings owing to the difference of the performance of CPUs when the processings are multiplexed in a computer system provided with the plural CPUs, an input/ output controller and plural input/output devices. CONSTITUTION: In the input/output controller 701 connected to the plural CPUs 001-004, IOC control parts 401 and 402 for controlling input and output monitor the input/output device for which the processing is not performed for the fixed period of time after connection is requested to the CPU at all times and prepare and hold the channel path route of the processing of the input/output device. Based on the data, the IOC control parts 401 and 402 select the CPU to be connected. When activation is simultaneously performed from the plural CPUs 001-004, the CPU is selected so as to preferentially perform the processing of the input/output device for which the processing is not performed for the fixed period of time. Thus, this control method without the deviation in the processings of the plural CPUs 001-004 is realized.

10. 发明专利

JPH0433129A METHOD AND DEVICE FOR CONTROLLING EXECUTION OF TASK 失效
公开(公告)号：JPH0433129A
公开(公告)日：1992-02-04
申请号：JP13849990
申请日：1990-05-30
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： YOKOHATA SHIZUO , ABE YUKIO , ICHINOMIYA HIROSHI , KUWABARA YOSHINAGA , NAKAMURA KATSUNORI
IPC分类号： G06F15/16 , G06F9/46 , G06F15/177
摘要： PURPOSE:To improve the throughput of an information processor by preventing a task from being activated on a channel processor when a different task for which driving processors are required to execute together on the driving processor. CONSTITUTION:When a first task is activated in a first processor, it is checked whether or not the first task designates the execution of a second task group. When it designates the execution as the result of check, busy information confirms the state of a second processor group executing the second task group. When the second processor group is in a free state, a second task activation requirement is set in simultaneous execution requiring information. Then, the presence or absence of a response from the second processor group and the content are judged. The first task is activated only when the judgement result is that all in the second processor group can immediately start the second task. When a second processor detects a second task activation requirement a task execution control part responds to the first processor being a requirement source and immediately executes a second task.

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