专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH05233476A 失效
公开(公告)号：JPH05233476A
公开(公告)日：1993-09-10
申请号：JP3029092
申请日：1992-02-18
申请人： HITACHI LTD
发明人： KASAHARA TOSHIRO
IPC分类号： G05B19/05 , G05B19/048 , G06F1/32 , G06F12/16
摘要： PURPOSE:To decrease the frequency of replacement of a backup battery and to extend the power failure guarantee time of backup operation by a large- capacity capacitor. CONSTITUTION:This programmable controller is provided with flip-flops 5-8 which hold data for operating the set coils 13a-16a of keep relays, flip-flops 40-43 which hold data for operating the reset coils of the keep relays, drivers 9-12 which drive the set coils 13a-16a according to the data set in the flip-flops, disconnection control means which use drivers 44-47 for driving the reset coils 13b-16b, and disconnecting means which uses the (a) contacts 13c-16c of the keep relays; and elements which are not used are disconnected from a power supply line 48 to reduce the load on the backup battery 1 or large-capacity capacitor.

2. 发明专利

JPS62145329A PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPS62145329A
公开(公告)日：1987-06-29
申请号：JP28550285
申请日：1985-12-20
申请人： HITACHI LTD
发明人： FUJIWARA KATSUHIRO , OSHIGA TAKAYUKI , KASAHARA TOSHIRO , ITO ATSUSHI
IPC分类号： G06F9/48 , G05B19/05 , G06F9/46
摘要： PURPOSE:To operate a whole control system without any contradiction even when a process interruption is inputted in an optional state by setting a specific instruction which identifies the start of a relay sequence circuit and permitting the process interruption only when the instruction is read out. CONSTITUTION:When an interruption request is inputted from a process, a flip-flop 61 is set and when a signal which indicates a relay sequence head circuit is inputted from a control line (c) in this state, an interruption request a' to an arithmetic part 2 is outputted in the period. Then, when the control line (c) is reset, i.e. when an instruction except a relay sequence head circuit instruction is read, the flip-flop 61 is reset, so that the signal a' is never outputted after this resetting even if a signal (c) is inputted before a signal (a) is inputted. When an interruption acceptance mode select input (d) goes up to a level H, on the other hand, an AND gate 65 is opened on condition that the signal (c) and the output of the flip-flop 61 are both at the level H, so that the request a' is outputted through a OR gate 67.

3. 发明专利

JPS62117001A Input and output processing method for programmable sequence controller 失效
标题翻译：可编程序控制器的输入和输出处理方法
公开(公告)号：JPS62117001A
公开(公告)日：1987-05-28
申请号：JP25583585
申请日：1985-11-16
申请人： Hitachi Ltd
发明人： FUJIWARA KATSUHIRO , OSHIGA TAKAYUKI , KASAHARA TOSHIRO
IPC分类号： G05B19/05
CPC分类号： G05B19/054
摘要： PURPOSE: To secure the application of a programmable sequence controller to any type of controlled system by reducing satisfactorily the scan time of the sequence controller with use of an image memory and at the same time coping with a desired controlled system in a satisfactorily short answer time less than a single scan time.
CONSTITUTION: When the input/output control instructions (I/O set and reset instructions) are supplied through an arithmetic part 3, the control lines (set and reset lines) delivered from an instruction decoding part 31 are changed. The set and reset lines are connected to the set and reset inputs of a flip-flop 43 respectively at an input/output control part 4. Then the output of the flip-flop 43 is changed every time the IOC set and reset instructions emerge and then supplied to a data selector 42. Thus the selector 43 selects the external input/ output data given directly from an input part 6 and an output part 7 or the data given from an input/output image memory 41 and sends it to the part 3.
COPYRIGHT: (C)1987,JPO&Japio
摘要翻译：目的：通过使用图像存储器令人满意地减少序列控制器的扫描时间，同时在令人满意的短的应答时间内处理所需的受控系统，从而确保将可编程序控制器应用于任何类型的受控系统少于单次扫描时间。构成：通过运算部3供给输入输出控制指令（I / O设定和复位指令）时，从指令译码部31发送的控制线（置位和复位线）发生变化。设置和复位线分别在触发器43的输入/输出控制部分4处连接到触发器43的设置和复位输入。然后，每当IOC置位和复位指令出现时，触发器43的输出被改变，并且然后提供给数据选择器42.因此，选择器43选择直接从输入部分6和输出部分7给出的外部输入/输出数据或从输入/输出图像存储器41给出的数据，并将其发送到部分3 。

4. 发明专利

JPS62109767A PACKER 失效
公开(公告)号：JPS62109767A
公开(公告)日：1987-05-20
申请号：JP24887685
申请日：1985-11-08
申请人： HITACHI LTD , HITACHI KEIYO ENG
发明人： AOKI TAKASHI , KOZUKA MICHIAKI , OSHIGA TAKAYUKI , FUJIWARA KATSUHIRO , KASAHARA TOSHIRO
IPC分类号： B65D61/00

5. 发明专利

JPS62107318A INTERNAL CIRCUIT STRUCTURE FOR LSI 失效
公开(公告)号：JPS62107318A
公开(公告)日：1987-05-18
申请号：JP24700385
申请日：1985-11-06
申请人： HITACHI LTD
发明人： KIMURA HIROYUKI , KASAHARA TOSHIRO , OSHIGA TAKAYUKI , FUJIWARA KATSUHIRO
IPC分类号： G06F3/00 , G06F5/06 , G06F5/16
摘要： PURPOSE:To reduce the capacity without lowering the function, by using one register in common by plural inputs and outputs. CONSTITUTION:A register 4 is a common register of input/output buffers 2, 3, and in which input/output buffer a data is stored is determined by a data selector 5. In this way, the number of gates can be curtailed by 5-10 gates per 1 bit. Also, a through-path which does not pass through the register 4 is provided, and a selector 6 is provided on the post-stage of the register (not shown in the figure), by which even against that which requires a simultaneity of 16 bits in an external equipment of a 16-bit access of an input/output buffer side, read-out and write can be executed by an access timing of a CPU itself.

6. 发明专利

JPS6215597A DISPLAY FOR INPUT/OUTPUT APPARATUS 失效
公开(公告)号：JPS6215597A
公开(公告)日：1987-01-23
申请号：JP15396685
申请日：1985-07-15
申请人： HITACHI LTD
发明人： KIMURA HIROYUKI , FUJIWARA KATSUHIRO , OSHIGA TAKAYUKI , KASAHARA TOSHIRO
IPC分类号： G05B19/05 , G02F1/133 , G05B19/02 , G05B19/048 , G05B23/02 , G09G3/00 , G09G3/20

7. 发明专利

JPS61256445A SEQUENCE CONTROLLER 失效
公开(公告)号：JPS61256445A
公开(公告)日：1986-11-14
申请号：JP9770485
申请日：1985-05-10
申请人： HITACHI LTD
发明人： KASAHARA TOSHIRO , OSHIGA TAKAYUKI , FUJIWARA KATSUHIRO
IPC分类号： G05B19/05 , G05B19/02 , G06F9/06
摘要： PURPOSE:To cope flexibly with the extension of facilities by storing programs to be added in a part excepting the storing areas of existing programs and rewriting the end instruction of the program so that the programs can be added without stopping a system working. CONSTITUTION:When an additional program is supplied from a key input part 4, an arithmetic control part 8 stores the additional program in a part excepting the areas storing the existing programs. Meanwhile the existing programs are protected to undergo operations continuously. The grammatical checking is carried out through the existing programs and the additional program with operations carried out through the part 4 after the additional program is stored. An error if detected is displayed through a display part 3. Meanwhile the arithmetic processing is continued. When no error is detected, the end instruction of the existing program is rewritten into an MOP instruction for the first time and included within the control range of the additional program to undergo the control according to a new program.

8. 发明专利

JPH032904A PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPH032904A
公开(公告)日：1991-01-09
申请号：JP13600189
申请日：1989-05-31
申请人： HITACHI LTD
发明人： KASAHARA TOSHIRO
IPC分类号： G05B19/05
摘要： PURPOSE:To attain the highly accurate control with high response by interrupting the process of a main program and to quickly start a high speed program process when the count value of input pulse trains reaches a target level. CONSTITUTION:A reversible counter 10 counts the pulse trains which are outputted in accordance with the movement and the rotation of a control subject. The target value of the counter 10 is set to a target value register 8 based on a sequence program. Then a comparison part 9 compares the count value of the counter 10 with its target level. Thus a comparison process is carried out via the hardware, and at the same time a break detecting part 4 is added to detect the breaks for each instruction or circuit. Therefore the process of a CPU can be shifted to an interruption program only when the break of an instruction or a circuit is detected at production of a coincidence signal. Thus it is possible to perform the positioning control, the speed control, the local cut length control, etc., with high accuracy and with high reliability.

9. 发明专利

JPH0158522B2 失效
公开(公告)号：JPH0158522B2
公开(公告)日：1989-12-12
申请号：JP6358283
申请日：1983-04-13
申请人： HITACHI LTD
发明人： KASAHARA TOSHIRO
IPC分类号： G05B19/05 , G05B19/042 , G06F9/06

10. 发明专利

JPS63223902A PROGRAMMABLE SEQUENCE CONTROLLER 失效
公开(公告)号：JPS63223902A
公开(公告)日：1988-09-19
申请号：JP5655287
申请日：1987-03-13
申请人： HITACHI LTD
发明人： TAKAHASHI YOSHINORI , KASAHARA TOSHIRO
IPC分类号： G05B23/02 , G05B19/02 , G05B19/048 , G05B19/05
摘要： PURPOSE:To reduce the power consumption by turning off a signal to a pilot lamp or cutting off a power source, when a setting means is turned off forcibly, in a process for transmitting and displaying an input state from a signal input terminal, on the pilot lamp, or in a process for displaying a result of operation from an arithmetic means. CONSTITUTION:An input signal from a terminal 1 is changed to a TTL signal by a buffer circuit 3 and inputted to an arithmetic means 5 through a gate 4 and a parallel I/O bus 16, but in this case, in a process for transmitting the signal to the gate 4, it is changed to a serial signal by a parallel-serial converting circuit 8, and subsequently, brought to a parallel conversion by a latch 11 and displayed on a pilot lamp 13. When the display is unnecessary, the lamp is turned off by turning on a setting means 30 and clearing the latch 11. Also, when an output from the means 5 has been transmitted to a user program storage means 6, this output is sent to a gate 17 through the bus 16, converted to a serial one by a converting circuit 21 and the lamp is turned on through a shift register 23 and a latch 24, and it is turned off by the means 30 or cutting off a power source in the same way.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式